gem5  v20.1.0.0
smmu_v3_deviceifc.hh
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37 
38 #ifndef __DEV_ARM_SMMU_V3_DEVICEIFC_HH__
39 #define __DEV_ARM_SMMU_V3_DEVICEIFC_HH__
40 
41 #include <list>
42 
44 #include "dev/arm/smmu_v3_defs.hh"
46 #include "dev/arm/smmu_v3_ports.hh"
47 #include "dev/arm/smmu_v3_proc.hh"
48 #include "params/SMMUv3DeviceInterface.hh"
49 #include "sim/clocked_object.hh"
50 
52 class SMMUv3;
53 class SMMUDevicePort;
54 
56 {
57  protected:
58  friend class SMMUTranslationProcess;
59 
60  public:
64 
65  const bool microTLBEnable;
66  const bool mainTLBEnable;
67 
71 
74 
78 
79  // in bytes
80  const unsigned portWidth;
81 
85 
86  const bool prefetchEnable;
88 
91 
95 
96  // Receiving translation requests from the requestor device
98  bool recvTimingReq(PacketPtr pkt);
99  void schedTimingResp(PacketPtr pkt);
100 
102  bool atsRecvTimingReq(PacketPtr pkt);
103  bool atsRecvTimingResp(PacketPtr pkt);
104  void schedAtsTimingResp(PacketPtr pkt);
105 
106  void scheduleDeviceRetry();
107  void sendDeviceRetry();
108  void atsSendDeviceRetry();
109 
112 
114  EventWrapper<
117 
118  Port& getPort(const std::string &name, PortID id) override;
119 
120  public:
121  SMMUv3DeviceInterface(const SMMUv3DeviceInterfaceParams *p);
122 
124  {
125  delete microTLB;
126  delete mainTLB;
127  }
128 
129  const SMMUv3DeviceInterfaceParams *
130  params() const
131  {
132  return static_cast<const SMMUv3DeviceInterfaceParams *>(_params);
133  }
134 
135  DrainState drain() override;
136 
137  void setSMMU(SMMUv3 *_smmu) { smmu = _smmu; }
138  void sendRange();
139 };
140 
141 #endif /* __DEV_ARM_SMMU_V3_DEVICEIFC_HH__ */
SMMUv3DeviceInterface::atsDevicePort
SMMUATSDevicePort atsDevicePort
Definition: smmu_v3_deviceifc.hh:76
SMMUv3DeviceInterface::schedTimingResp
void schedTimingResp(PacketPtr pkt)
Definition: smmu_v3_deviceifc.cc:106
SMMUv3DeviceInterface::drain
DrainState drain() override
Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are pa...
Definition: smmu_v3_deviceifc.cc:254
SMMUv3DeviceInterface::~SMMUv3DeviceInterface
~SMMUv3DeviceInterface()
Definition: smmu_v3_deviceifc.hh:123
SMMUv3DeviceInterface::smmu
SMMUv3 * smmu
Definition: smmu_v3_deviceifc.hh:61
SMMUv3DeviceInterface::prefetchReserveLastWay
const bool prefetchReserveLastWay
Definition: smmu_v3_deviceifc.hh:87
SMMUv3DeviceInterface::devicePort
SMMUDevicePort * devicePort
Definition: smmu_v3_deviceifc.hh:75
SMMUATSMemoryPort
Definition: smmu_v3_ports.hh:109
SMMUv3DeviceInterface::wrBufSlotsRemaining
unsigned wrBufSlotsRemaining
Definition: smmu_v3_deviceifc.hh:82
SMMUv3DeviceInterface::mainTLB
SMMUTLB * mainTLB
Definition: smmu_v3_deviceifc.hh:63
SMMUv3DeviceInterface::atsRecvTimingResp
bool atsRecvTimingResp(PacketPtr pkt)
Definition: smmu_v3_deviceifc.cc:214
SMMUv3DeviceInterface::recvTimingReq
bool recvTimingReq(PacketPtr pkt)
Definition: smmu_v3_deviceifc.cc:139
EventWrapper
Definition: eventq.hh:1070
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
SMMUv3DeviceInterface::mainTLBEnable
const bool mainTLBEnable
Definition: smmu_v3_deviceifc.hh:66
PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:237
SMMUv3DeviceInterface::sendDeviceRetryEvent
SMMUDeviceRetryEvent sendDeviceRetryEvent
Definition: smmu_v3_deviceifc.hh:113
SMMUv3DeviceInterface::SMMUv3DeviceInterface
SMMUv3DeviceInterface(const SMMUv3DeviceInterfaceParams *p)
Definition: smmu_v3_deviceifc.cc:45
SMMU_MAX_TRANS_ID
@ SMMU_MAX_TRANS_ID
Definition: smmu_v3_defs.hh:396
SMMUv3DeviceInterface::atsMemPort
SMMUATSMemoryPort atsMemPort
Definition: smmu_v3_deviceifc.hh:77
smmu_v3_events.hh
SMMUv3DeviceInterface::mainTLBLat
const Cycles mainTLBLat
Definition: smmu_v3_deviceifc.hh:73
ClockedObject
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
Definition: clocked_object.hh:231
SMMUv3DeviceInterface
Definition: smmu_v3_deviceifc.hh:55
DrainState
DrainState
Object drain/handover states.
Definition: drain.hh:71
SMMUv3DeviceInterface::sendRange
void sendRange()
Definition: smmu_v3_deviceifc.cc:80
SMMUv3DeviceInterface::devicePortSem
SMMUSemaphore devicePortSem
Definition: smmu_v3_deviceifc.hh:68
SMMUv3DeviceInterface::deviceNeedsRetry
bool deviceNeedsRetry
Definition: smmu_v3_deviceifc.hh:110
SMMUATSDevicePort
Definition: smmu_v3_ports.hh:123
SMMUDevicePort
Definition: smmu_v3_ports.hh:74
smmu_v3_ports.hh
SMMUv3DeviceInterface::microTLBSem
SMMUSemaphore microTLBSem
Definition: smmu_v3_deviceifc.hh:69
SMMUTLB
Definition: smmu_v3_caches.hh:90
Port
Ports are used to interface objects to each other.
Definition: port.hh:56
SMMUv3DeviceInterface::pendingMemAccesses
unsigned pendingMemAccesses
Definition: smmu_v3_deviceifc.hh:84
SMMUv3DeviceInterface::dependentReqRemoved
SMMUSignal dependentReqRemoved
Definition: smmu_v3_deviceifc.hh:94
SMMUv3DeviceInterface::microTLB
SMMUTLB * microTLB
Definition: smmu_v3_deviceifc.hh:62
SMMUv3DeviceInterface::prefetchEnable
const bool prefetchEnable
Definition: smmu_v3_deviceifc.hh:86
SMMUv3DeviceInterface::getPort
Port & getPort(const std::string &name, PortID id) override
Get a port with a given name and index.
Definition: smmu_v3_deviceifc.cc:92
SimObject::name
virtual const std::string name() const
Definition: sim_object.hh:133
smmu_v3_proc.hh
SMMUv3DeviceInterface::atsRecvAtomic
Tick atsRecvAtomic(PacketPtr pkt)
Definition: smmu_v3_deviceifc.cc:171
smmu_v3_caches.hh
SMMUv3DeviceInterface::schedAtsTimingResp
void schedAtsTimingResp(PacketPtr pkt)
Definition: smmu_v3_deviceifc.cc:112
SMMUv3DeviceInterface::duplicateReqs
std::list< SMMUTranslationProcess * > duplicateReqs
Definition: smmu_v3_deviceifc.hh:89
SMMUSignal
Definition: smmu_v3_proc.hh:88
SMMUv3DeviceInterface::microTLBEnable
const bool microTLBEnable
Definition: smmu_v3_deviceifc.hh:65
SMMUv3DeviceInterface::duplicateReqRemoved
SMMUSignal duplicateReqRemoved
Definition: smmu_v3_deviceifc.hh:90
SimObject::_params
const SimObjectParams * _params
Cached copy of the object parameters.
Definition: sim_object.hh:110
SMMUv3DeviceInterface::xlateSlotsRemaining
unsigned xlateSlotsRemaining
Definition: smmu_v3_deviceifc.hh:83
SMMUv3DeviceInterface::recvAtomic
Tick recvAtomic(PacketPtr pkt)
Definition: smmu_v3_deviceifc.cc:123
clocked_object.hh
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
SMMUTranslationProcess
Definition: smmu_v3_transl.hh:63
SMMUv3DeviceInterface::params
const SMMUv3DeviceInterfaceParams * params() const
Definition: smmu_v3_deviceifc.hh:130
SMMUv3DeviceInterface::dependentWrites
std::list< SMMUTranslationProcess * > dependentWrites[SMMU_MAX_TRANS_ID]
Definition: smmu_v3_deviceifc.hh:93
SMMUv3DeviceInterface::atsRecvTimingReq
bool atsRecvTimingReq(PacketPtr pkt)
Definition: smmu_v3_deviceifc.cc:189
SMMUv3DeviceInterface::atsSendDeviceRetryEvent
EventWrapper< SMMUv3DeviceInterface, &SMMUv3DeviceInterface::atsSendDeviceRetry > atsSendDeviceRetryEvent
Definition: smmu_v3_deviceifc.hh:116
SMMUv3DeviceInterface::atsDeviceNeedsRetry
bool atsDeviceNeedsRetry
Definition: smmu_v3_deviceifc.hh:111
Cycles
Cycles is a wrapper class for representing cycle counts, i.e.
Definition: types.hh:83
SMMUv3DeviceInterface::sendDeviceRetry
void sendDeviceRetry()
Definition: smmu_v3_deviceifc.cc:231
SMMUv3DeviceInterface::setSMMU
void setSMMU(SMMUv3 *_smmu)
Definition: smmu_v3_deviceifc.hh:137
SMMUv3
Definition: smmu_v3.hh:81
SMMUv3DeviceInterface::atsSendDeviceRetry
void atsSendDeviceRetry()
Definition: smmu_v3_deviceifc.cc:237
SMMUv3DeviceInterface::microTLBLat
const Cycles microTLBLat
Definition: smmu_v3_deviceifc.hh:72
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
std::list< SMMUTranslationProcess * >
smmu_v3_defs.hh
SMMUSemaphore
Definition: smmu_v3_proc.hh:77
SMMUv3DeviceInterface::mainTLBSem
SMMUSemaphore mainTLBSem
Definition: smmu_v3_deviceifc.hh:70
SMMUv3DeviceInterface::scheduleDeviceRetry
void scheduleDeviceRetry()
Definition: smmu_v3_deviceifc.cc:244
SMMUv3DeviceInterface::dependentReads
std::list< SMMUTranslationProcess * > dependentReads[SMMU_MAX_TRANS_ID]
Definition: smmu_v3_deviceifc.hh:92
SMMUv3DeviceInterface::portWidth
const unsigned portWidth
Definition: smmu_v3_deviceifc.hh:80
SMMUDeviceRetryEvent
Definition: smmu_v3_events.hh:46

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