gem5  v20.1.0.0
mem.cc
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28 
29 #include "arch/sparc/insts/mem.hh"
30 
31 namespace SparcISA
32 {
33 
34 std::string
36 {
37  std::stringstream response;
38  bool load = flags[IsLoad];
39  bool store = flags[IsStore];
40 
41  printMnemonic(response, mnemonic);
42  if (store) {
43  printReg(response, _srcRegIdx[0]);
44  ccprintf(response, ", ");
45  }
46  ccprintf(response, "[");
47  if (_srcRegIdx[!store ? 0 : 1].index() != 0) {
48  printSrcReg(response, !store ? 0 : 1);
49  ccprintf(response, " + ");
50  }
51  printSrcReg(response, !store ? 1 : 2);
52  ccprintf(response, "]");
53  if (load) {
54  ccprintf(response, ", ");
55  printReg(response, _destRegIdx[0]);
56  }
57 
58  return response.str();
59 }
60 
61 std::string
63 {
64  std::stringstream response;
65  bool load = flags[IsLoad];
66  bool save = flags[IsStore];
67 
68  printMnemonic(response, mnemonic);
69  if (save) {
70  printReg(response, _srcRegIdx[0]);
71  ccprintf(response, ", ");
72  }
73  ccprintf(response, "[");
74  if (_srcRegIdx[!save ? 0 : 1].index() != 0) {
75  printReg(response, _srcRegIdx[!save ? 0 : 1]);
76  ccprintf(response, " + ");
77  }
78  if (imm >= 0)
79  ccprintf(response, "%#x]", imm);
80  else
81  ccprintf(response, "-%#x]", -imm);
82  if (load) {
83  ccprintf(response, ", ");
84  printReg(response, _destRegIdx[0]);
85  }
86 
87  return response.str();
88 }
89 
90 }
StaticInst::flags
std::bitset< Num_Flags > flags
Flag values for this instruction.
Definition: static_inst.hh:99
MipsISA::index
Bitfield< 30, 0 > index
Definition: pra_constants.hh:44
SparcISA::MemImm::imm
const int32_t imm
Definition: mem.hh:69
Loader::SymbolTable
Definition: symtab.hh:59
SparcISA::SparcStaticInst::printReg
static void printReg(std::ostream &os, RegId reg)
Definition: static_inst.cc:95
SparcISA
Definition: asi.cc:31
SparcISA::SparcStaticInst::printSrcReg
void printSrcReg(std::ostream &os, int reg) const
Definition: static_inst.cc:81
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
StaticInst::_srcRegIdx
RegId _srcRegIdx[MaxInstSrcRegs]
See srcRegIdx().
Definition: static_inst.hh:250
StaticInst::_destRegIdx
RegId _destRegIdx[MaxInstDestRegs]
See destRegIdx().
Definition: static_inst.hh:248
StaticInst::mnemonic
const char * mnemonic
Base mnemonic (e.g., "add").
Definition: static_inst.hh:258
SparcISA::MemImm::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: mem.cc:62
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
SparcISA::Mem::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: mem.cc:35
SparcISA::SparcStaticInst::printMnemonic
static void printMnemonic(std::ostream &os, const char *mnemonic)
Definition: static_inst.cc:56
ccprintf
void ccprintf(cp::Print &print)
Definition: cprintf.hh:127
mem.hh

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