gem5  v20.1.0.0
timer_sp804.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2010 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
18  * redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution;
21  * neither the name of the copyright holders nor the names of its
22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef __DEV_ARM_SP804_HH__
39 #define __DEV_ARM_SP804_HH__
40 
41 #include "dev/arm/amba_device.hh"
42 #include "params/Sp804.hh"
43 
48 class BaseGic;
49 
50 class Sp804 : public AmbaPioDevice
51 {
52  protected:
53  class Timer : public Serializable
54  {
55 
56  public:
57  enum {
58  LoadReg = 0x00,
59  CurrentReg = 0x04,
60  ControlReg = 0x08,
61  IntClear = 0x0C,
62  RawISR = 0x10,
63  MaskedISR = 0x14,
64  BGLoad = 0x18,
65  Size = 0x20
66  };
67 
68  BitUnion32(CTRL)
69  Bitfield<0> oneShot;
70  Bitfield<1> timerSize;
71  Bitfield<3,2> timerPrescale;
72  Bitfield<5> intEnable;
73  Bitfield<6> timerMode;
74  Bitfield<7> timerEnable;
76 
77  protected:
78  std::string _name;
79 
81  Sp804 *parent;
82 
85 
87  const Tick clock;
88 
90  CTRL control;
91 
94  bool rawInt;
95 
98  bool pendingInt;
99 
101  uint32_t loadValue;
102 
104  void counterAtZero();
106 
107  public:
110  void restartCounter(uint32_t val);
111 
112  Timer(std::string __name, Sp804 *parent, ArmInterruptPin *_interrupt,
113  Tick clock);
114 
115  std::string name() const { return _name; }
116 
118  void read(PacketPtr pkt, Addr daddr);
119 
121  void write(PacketPtr pkt, Addr daddr);
122 
123  void serialize(CheckpointOut &cp) const override;
124  void unserialize(CheckpointIn &cp) override;
125  };
126 
130 
131  public:
132  typedef Sp804Params Params;
133  const Params *
134  params() const
135  {
136  return dynamic_cast<const Params *>(_params);
137  }
142  Sp804(Params *p);
143 
149  Tick read(PacketPtr pkt) override;
150 
156  Tick write(PacketPtr pkt) override;
157 
158 
159  void serialize(CheckpointOut &cp) const override;
160  void unserialize(CheckpointIn &cp) override;
161 };
162 
163 
164 #endif // __DEV_ARM_SP804_HH__
165 
Sp804::Timer::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: timer_sp804.cc:224
Sp804::Timer::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: timer_sp804.cc:246
Sp804::Timer::timerSize
Bitfield< 1 > timerSize
Definition: timer_sp804.hh:70
Sp804::Timer::LoadReg
@ LoadReg
Definition: timer_sp804.hh:58
Sp804::Timer::read
void read(PacketPtr pkt, Addr daddr)
Handle read for a single timer.
Definition: timer_sp804.cc:85
Sp804::Timer::timerPrescale
Bitfield< 3, 2 > timerPrescale
Definition: timer_sp804.hh:71
Sp804::Timer::parent
EndBitUnion(CTRL) protected Sp804 * parent
Pointer to parent class.
Definition: timer_sp804.hh:75
Sp804
Definition: timer_sp804.hh:50
Sp804::Timer::rawInt
bool rawInt
If timer has caused an interrupt.
Definition: timer_sp804.hh:94
Serializable
Basic support for object serialization.
Definition: serialize.hh:172
Sp804::timer0
Timer timer0
Timers that do the actual work.
Definition: timer_sp804.hh:128
amba_device.hh
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
Sp804::Timer::loadValue
uint32_t loadValue
Value to load into counter when periodic mode reaches 0.
Definition: timer_sp804.hh:101
Sp804::Timer::IntClear
@ IntClear
Definition: timer_sp804.hh:61
Sp804::Timer::RawISR
@ RawISR
Definition: timer_sp804.hh:62
Sp804::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: timer_sp804.cc:271
EventFunctionWrapper
Definition: eventq.hh:1101
Sp804::Timer::control
CTRL control
Control register as specified above.
Definition: timer_sp804.hh:90
Sp804::Timer::write
void write(PacketPtr pkt, Addr daddr)
Handle write for a single timer.
Definition: timer_sp804.cc:139
Sp804::Timer::Size
@ Size
Definition: timer_sp804.hh:65
Sp804::Timer::restartCounter
void restartCounter(uint32_t val)
Restart the counter ticking at val.
Definition: timer_sp804.cc:176
cp
Definition: cprintf.cc:40
Sp804::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: timer_sp804.cc:278
Sp804::Sp804
Sp804(Params *p)
The constructor for RealView just registers itself with the MMU.
Definition: timer_sp804.cc:48
Sp804::Timer::name
std::string name() const
Definition: timer_sp804.hh:115
Sp804::Timer::interrupt
ArmInterruptPin *const interrupt
Pointer to the interrupt pin.
Definition: timer_sp804.hh:84
Sp804::params
const Params * params() const
Definition: timer_sp804.hh:134
AmbaPioDevice
Definition: amba_device.hh:76
X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:769
Sp804::write
Tick write(PacketPtr pkt) override
All writes are simply ignored.
Definition: timer_sp804.cc:121
Sp804::Params
Sp804Params Params
Definition: timer_sp804.hh:132
Sp804::Timer
Definition: timer_sp804.hh:53
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
Sp804::Timer::MaskedISR
@ MaskedISR
Definition: timer_sp804.hh:63
Sp804::Timer::Timer
Timer(std::string __name, Sp804 *parent, ArmInterruptPin *_interrupt, Tick clock)
Definition: timer_sp804.cc:55
Sp804::Timer::zeroEvent
EventFunctionWrapper zeroEvent
Definition: timer_sp804.hh:105
Sp804::Timer::counterAtZero
void counterAtZero()
Called when the counter reaches 0.
Definition: timer_sp804.cc:197
Sp804::Timer::clock
const Tick clock
Number of ticks in a clock input.
Definition: timer_sp804.hh:87
BaseGic
Definition: base_gic.hh:62
AmbaPioDevice::Params
AmbaPioDeviceParams Params
Definition: amba_device.hh:82
SimObject::_params
const SimObjectParams * _params
Cached copy of the object parameters.
Definition: sim_object.hh:110
Sp804::Timer::timerMode
Bitfield< 6 > timerMode
Definition: timer_sp804.hh:73
Sp804::Timer::timerEnable
Bitfield< 7 > timerEnable
Definition: timer_sp804.hh:74
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
ArmInterruptPin
Generic representation of an Arm interrupt pin.
Definition: base_gic.hh:176
Sp804::read
Tick read(PacketPtr pkt) override
Handle a read to the device.
Definition: timer_sp804.cc:66
CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:63
Sp804::Timer::CurrentReg
@ CurrentReg
Definition: timer_sp804.hh:59
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
CheckpointIn
Definition: serialize.hh:67
Sp804::Timer::intEnable
Bitfield< 5 > intEnable
Definition: timer_sp804.hh:72
Sp804::Timer::BGLoad
@ BGLoad
Definition: timer_sp804.hh:64
EndBitUnion
EndBitUnion(UserDescFlags) struct UserDesc32
Definition: process.cc:149
Sp804::timer1
Timer timer1
Definition: timer_sp804.hh:129
Sp804::Timer::ControlReg
@ ControlReg
Definition: timer_sp804.hh:60
Sp804::Timer::pendingInt
bool pendingInt
If an interrupt is currently pending.
Definition: timer_sp804.hh:98
Sp804::Timer::BitUnion32
BitUnion32(CTRL) Bitfield< 0 > oneShot

Generated on Wed Sep 30 2020 14:02:10 for gem5 by doxygen 1.8.17