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fetch_stage.cc
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33 
35 
37 #include "gpu-compute/wavefront.hh"
38 
39 FetchStage::FetchStage(const ComputeUnitParams &p, ComputeUnit &cu)
40  : numVectorALUs(p.num_SIMDs), computeUnit(cu),
41  _name(cu.name() + ".FetchStage"), stats(&cu)
42 {
43  for (int j = 0; j < numVectorALUs; ++j) {
44  FetchUnit newFetchUnit(p, cu);
45  _fetchUnit.push_back(newFetchUnit);
46  }
47 }
48 
50 {
51  _fetchUnit.clear();
52 }
53 
54 void
56 {
57  for (int j = 0; j < numVectorALUs; ++j) {
58  _fetchUnit[j].bindWaveList(&computeUnit.wfList[j]);
59  _fetchUnit[j].init();
60  }
61 }
62 
63 void
65 {
66  for (int j = 0; j < numVectorALUs; ++j) {
67  _fetchUnit[j].exec();
68  }
69 }
70 
71 void
73 {
74  ComputeUnit::SQCPort::SenderState *sender_state =
75  safe_cast<ComputeUnit::SQCPort::SenderState*>(pkt->senderState);
76 
77  Wavefront *wavefront = sender_state->wavefront;
78 
79  const unsigned num_instructions = pkt->req->getSize() /
80  sizeof(TheGpuISA::RawMachInst);
81 
82  stats.instFetchInstReturned.sample(num_instructions);
83  uint32_t simdId = wavefront->simdId;
84  _fetchUnit[simdId].processFetchReturn(pkt);
85 }
86 
87 void
89 {
90  _fetchUnit[wavefront->simdId].fetch(pkt, wavefront);
91 }
92 
94  : Stats::Group(parent, "FetchStage"),
95  ADD_STAT(instFetchInstReturned, "For each instruction fetch request "
96  "received record how many instructions you got from it")
97 {
98  instFetchInstReturned.init(1, 32, 1);
99 }
FetchStage::~FetchStage
~FetchStage()
Definition: fetch_stage.cc:49
FetchStage::FetchStage
FetchStage(const ComputeUnitParams &p, ComputeUnit &cu)
Definition: fetch_stage.cc:39
fetch_stage.hh
FetchStage::FetchStageStats::instFetchInstReturned
Stats::Distribution instFetchInstReturned
Definition: fetch_stage.hh:81
compute_unit.hh
ComputeUnit::SQCPort::SenderState::wavefront
Wavefront * wavefront
Definition: compute_unit.hh:612
FetchStage::stats
FetchStage::FetchStageStats stats
Packet::req
RequestPtr req
A pointer to the original request.
Definition: packet.hh:341
FetchStage::numVectorALUs
int numVectorALUs
Definition: fetch_stage.hh:68
wavefront.hh
ComputeUnit
Definition: compute_unit.hh:200
ArmISA::j
Bitfield< 24 > j
Definition: miscregs_types.hh:54
FetchStage::init
void init()
Definition: fetch_stage.cc:55
ADD_STAT
#define ADD_STAT(n,...)
Convenience macro to add a stat to a statistics group.
Definition: group.hh:71
FetchUnit
Definition: fetch_unit.hh:53
ComputeUnit::wfList
std::vector< std::vector< Wavefront * > > wfList
Definition: compute_unit.hh:290
FetchStage::_fetchUnit
std::vector< FetchUnit > _fetchUnit
Definition: fetch_stage.hh:73
FetchStage::exec
void exec()
Definition: fetch_stage.cc:64
Wavefront::simdId
const int simdId
Definition: wavefront.hh:97
name
const std::string & name()
Definition: trace.cc:48
Stats::Distribution::init
Distribution & init(Counter min, Counter max, Counter bkt)
Set the parameters of this distribution.
Definition: statistics.hh:2113
Wavefront
Definition: wavefront.hh:59
FetchStage::computeUnit
ComputeUnit & computeUnit
Definition: fetch_stage.hh:69
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:258
Stats::Group
Statistics container.
Definition: group.hh:87
FetchStage::FetchStageStats::FetchStageStats
FetchStageStats(Stats::Group *parent)
Definition: fetch_stage.cc:93
Stats::DistBase::sample
void sample(const U &v, int n=1)
Add a value to the distribtion n times.
Definition: statistics.hh:1323
FetchStage::fetch
void fetch(PacketPtr pkt, Wavefront *wave)
Definition: fetch_stage.cc:88
Stats
Definition: statistics.cc:53
FetchStage::processFetchReturn
void processFetchReturn(PacketPtr pkt)
Definition: fetch_stage.cc:72
Gcn3ISA::RawMachInst
uint64_t RawMachInst
used to represnt a GPU inst in its raw format.
Definition: gpu_types.hh:41
Packet::senderState
SenderState * senderState
This packet's sender state.
Definition: packet.hh:509
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
ComputeUnit::SQCPort::SenderState
Definition: compute_unit.hh:610

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