Here is a list of all class members with links to the classes they belong to:

- m -

m : ArmISA::PMU
M : Compressor::BaseDelta< BaseType, DeltaSizeBits > , Compressor::RepeatedQwords
m : Matrix64x12 , UncontendedMutex
m0 : Gcn3ISA::GPUISA
M5_ALIGNED() : ArmLinux32::tgt_stat64 , Stats::DistBase< Derived, Stor > , Stats::ScalarBase< Derived, Stor >
M5_SC_CLK_TCK : FreeBSD , Linux
M5DebugFault() : GenericISA::M5DebugFault
M5DebugOnceFault() : GenericISA::M5DebugOnceFault< Flavor >
m5opRange : ArmISA::TLB , System , X86ISA::TLB
m_abs_cntrl_vec : RubySystem
m_abstract_controls : RubySystem
m_access_backing_store : RubySystem
m_access_mode : Check
m_AccessMode : RubyRequest
m_accessModeType : CacheMemory::CacheMemoryStats
m_active_inv_node : InvalidateGenerator
m_active_node : SeriesRequestGenerator
m_active_read_node : InvalidateGenerator
m_adaptive_routing : SimpleNetwork
m_addr : AccessTraceForAddress , StoreTrace
m_addr_increment_size : InvalidateGenerator , SeriesRequestGenerator
m_Address : AbstractCacheEntry
m_address : Check , InvalidateGenerator , PrefetchEntry , SeriesRequestGenerator , SubBlock , tlm::tlm_generic_payload
m_address_profiler_ptr : Profiler
m_addressMap : SimpleAddressMap
m_addrMap : MultiSocketSimpleSwitchAT
m_all_instructions : AddressProfiler , Profiler
m_alloc : DataBlock , sc_dt::scfx_string
m_allow_zero_latency : MessageBuffer
m_array : RubyPrefetcher , sc_dt::scfx_mant
m_atomics : AccessTraceForAddress
m_average_link_utilization : GarnetNetwork
m_average_vc_load : GarnetNetwork
m_avg_flit_latency : GarnetNetwork
m_avg_flit_network_latency : GarnetNetwork
m_avg_flit_queueing_latency : GarnetNetwork
m_avg_flit_vnet_latency : GarnetNetwork
m_avg_flit_vqueue_latency : GarnetNetwork
m_avg_hops : GarnetNetwork
m_avg_packet_latency : GarnetNetwork
m_avg_packet_network_latency : GarnetNetwork
m_avg_packet_queueing_latency : GarnetNetwork
m_avg_packet_vnet_latency : GarnetNetwork
m_avg_packet_vqueue_latency : GarnetNetwork
m_avg_utilization : Switch::SwitchStats
m_b_f : tlm_utils::callback_binder_fw< TYPES > , tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >
m_b_transport_ptr : tlm_utils::passthrough_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_b_transport_user_id : tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_bandwidth_factor : BasicLink
m_barrier_event : sc_dp::sc_barrier
m_beoe_disabled : tlm_utils::multi_passthrough_initiator_socket< MODULE, BUSWIDTH, TYPES, N, POL >
m_bgn_p : sc_core::sc_byte_heap
m_bi : sc_dt::scfx_index
m_binders : tlm_utils::multi_passthrough_initiator_socket< MODULE, BUSWIDTH, TYPES, N, POL > , tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >
m_binsize : Histogram
m_bit_width : Router
m_bits : NetDest
m_block_map : AbstractController
m_block_size : CacheMemory
m_block_size_bits : RubySystem
m_block_size_bytes : CacheRecorder , RubySystem
m_buf : tlm::circular_buffer< T >
m_buf_msgs : MessageBuffer
m_buffer : flitBuffer , sc_dt::scfx_string
m_buffer_reads : Router
m_buffer_size : AbstractController , SimpleNetwork
m_buffer_writes : Router
m_buffers_per_ctrl_vc : GarnetNetwork
m_buffers_per_data_vc : GarnetNetwork
m_bv : sc_dt::sc_fxnum_fast_subref , sc_dt::sc_fxnum_subref
m_bw_multiplier : SimpleExtLink , SimpleIntLink
m_bw_process : tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL > , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >
m_bwPEQ : MultiSocketSimpleSwitchAT
m_byte_enable : tlm::tlm_generic_payload
m_byte_enable_length : tlm::tlm_generic_payload
m_bytes_read : CacheRecorder
m_cache : CacheMemory
m_cache_assoc : CacheMemory
m_cache_inv_pkt : VIPERCoalescer
m_cache_num_set_bits : CacheMemory
m_cache_num_sets : CacheMemory
m_cache_recorder : RubySystem
m_cache_size : CacheMemory
m_caller_port : tlm_utils::callback_binder_fw< TYPES >
m_carrier : tlm_utils::instance_specific_extension_container
m_cast_switch : sc_dt::scfx_params
m_cb : tlm_utils::peq_with_cb_and_phase< OWNER, TYPES >
m_changed_event_p : sc_core::sc_signal< sc_dt::sc_bigint< W > > , sc_core::sc_signal< sc_dt::sc_biguint< W > > , sc_core::sc_signal< sc_dt::sc_int< W > > , sc_core::sc_signal< sc_dt::sc_uint< W > >
m_check_flush : RubyTester
m_check_vector : CheckTable
m_checks_completed : RubyTester
m_checks_to_complete : RubyTester
m_checkTable_ptr : RubyTester
m_clusterID : AbstractController
m_cntrl_id : TraceRecord
m_command : tlm::tlm_generic_payload
m_connInfoPool : MultiSocketSimpleSwitchAT
m_consumer : MessageBuffer
m_consumer_ptr : TimerTable , WireBuffer
m_container : tlm_utils::instance_specific_extension_carrier , tlm_utils::instance_specific_extensions_per_accessor
m_contextId : RubyRequest
m_control_msg_size : Network
m_controller : RubyPort , RubyPrefetcher
m_cooldown_enabled : RubySystem
m_coreId : Sequencer
m_count : Histogram
m_credit_count : OutVcState
m_credit_link : GarnetIntLink , InputUnit , OutputUnit
m_credit_links : GarnetExtLink
m_creditlinks : GarnetNetwork
m_crossbar_activity : CrossbarSwitch , Router
m_ctrl : sc_dt::sc_lv_base
m_cur_in_port : AbstractController
m_cur_val : sc_gem5::ScSignalBaseT< T, WRITER_POLICY >
m_current_transaction : tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL > , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >
m_data : DataBlock , Histogram , my_extension , sc_dt::sc_bv_base , sc_dt::sc_lv_base , SubBlock , tlm::tlm_generic_payload , TraceRecord
m_data_address : TraceRecord
m_data_block_mask : DMASequencer
m_data_cache_hit_latency : Sequencer
m_data_msg_size : Network
m_data_read_event : tlm::tlm_fifo< T >
m_data_written_event : tlm::tlm_fifo< T >
m_dataAccessTrace : AddressProfiler
m_dataCache_ptr : GPUCoalescer , Sequencer
m_dbg_f : tlm_utils::callback_binder_fw< TYPES > , tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >
m_deadlock_check_scheduled : GPUCoalescer , Sequencer
m_deadlock_threshold : GPUCoalescer , NetworkInterface , RubyTester , Sequencer
m_def_value_ptr : sc_dt::sc_context< T >
m_deferred_msg_map : MessageBuffer
m_DelayedTicks : Message
m_delete : sc_dt::sc_concref_r< X, Y >
m_demand_accesses : CacheMemory::CacheMemoryStats
m_demand_hits : CacheMemory::CacheMemoryStats
m_demand_misses : CacheMemory::CacheMemoryStats
m_dequeue_callback : MessageBuffer
m_dequeue_time : flit
m_description : WireBuffer
m_directed_tester : DirectedGenerator
m_direction : InputUnit , OutputUnit
m_dmi : tlm::tlm_generic_payload
m_dmi_access : tlm::tlm_dmi
m_dmi_end_address : tlm::tlm_dmi
m_dmi_f : tlm_utils::callback_binder_bw< TYPES > , tlm_utils::callback_binder_fw< TYPES > , tlm_utils::multi_passthrough_initiator_socket< MODULE, BUSWIDTH, TYPES, N, POL > , tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >
m_dmi_ptr : tlm::tlm_dmi
m_dmi_read_latency : tlm::tlm_dmi
m_dmi_start_address : tlm::tlm_dmi
m_dmi_write_latency : tlm::tlm_dmi
m_dummy : tlm_utils::multi_passthrough_initiator_socket< MODULE, BUSWIDTH, TYPES, N, POL >
m_e : tlm_utils::peq_with_cb_and_phase< OWNER, TYPES > , tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process::process_handle_class , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process::process_handle_class
m_enable_fault_model : GarnetNetwork
m_enc : sc_dt::scfx_params
m_end_p : sc_core::sc_byte_heap
m_end_request : tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL > , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >
m_end_response : tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_endpoint_bandwidth : SimpleNetwork , Throttle
m_enqueue_time : flit , VirtualChannel
m_entries : DirectoryMemory , tlm::tlm_array< T >
m_entry : PerfectCacheLineState< ENTRY >
m_eoe_disabled : tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >
m_even_delta : tlm_utils::peq_with_cb_and_phase< OWNER, TYPES >
m_event : tlm_utils::peq_with_get< PAYLOAD >
m_event_delta : sc_core::sc_signal< sc_dt::sc_bigint< W > > , sc_core::sc_signal< sc_dt::sc_biguint< W > > , sc_core::sc_signal< sc_dt::sc_int< W > > , sc_core::sc_signal< sc_dt::sc_uint< W > >
m_event_method : tlm::tlm_event_finder_t< IF, T >
m_expand : tlm::tlm_fifo< T >
m_export : tlm::tlm_base_initiator_socket< BUSWIDTH, FW_IF, BW_IF, N, POL >
m_export_callback_created : tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >
m_ext : adapt_gp2ext< BUSWIDTH >
m_ext_link_vector : Topology
m_extensions : tlm::tlm_generic_payload , tlm_utils::instance_specific_extensions_per_accessor
m_first_store : StoreTrace
m_FirstResponseToCompletionDelayHist : GPUCoalescer , Sequencer
m_FirstResponseToCompletionDelayHistCoalsr : Profiler::ProfilerStats::PerMachineTypeStats
m_FirstResponseToCompletionDelayHistSeqr : Profiler::ProfilerStats::PerMachineTypeStats
m_flags : sc_dt::sc_concatref
m_flit_network_latency : GarnetNetwork
m_flit_queueing_latency : GarnetNetwork
m_flits_injected : GarnetNetwork
m_flits_received : GarnetNetwork
m_ForwardToFirstResponseDelayHist : GPUCoalescer , Sequencer
m_ForwardToFirstResponseDelayHistCoalsr : Profiler::ProfilerStats::PerMachineTypeStats
m_ForwardToFirstResponseDelayHistSeqr : Profiler::ProfilerStats::PerMachineTypeStats
m_free : tlm::circular_buffer< T >
m_from : sc_dt::sc_fxnum_fast_subref , sc_dt::sc_fxnum_subref
m_fromNetQueues : Network
m_fw_process : tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL > , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >
m_fwPEQ : MultiSocketSimpleSwitchAT
m_get_direct_mem_ptr : tlm_utils::passthrough_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_get_dmi_user_id : tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_gets_sharing_histogram : AddressProfiler
m_getx_sharing_histogram : AddressProfiler
m_global_quantum : tlm::tlm_global_quantum
m_gp_option : tlm::tlm_generic_payload
m_hi : sc_dt::sc_subref_r< X >
m_hierarch_bind : tlm_utils::multi_passthrough_initiator_socket< MODULE, BUSWIDTH, TYPES, N, POL > , tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >
m_histogram_ptr : AccessTraceForAddress
m_hitLatencyHist : Sequencer
m_hitLatencyHistSeqr : Profiler::ProfilerStats
m_hitMachLatencyHist : Sequencer
m_hitMachLatencyHistSeqr : Profiler::ProfilerStats::PerMachineTypeStats
m_hitTypeLatencyHist : Sequencer
m_hitTypeLatencyHistSeqr : Profiler::ProfilerStats::PerRequestTypeStats
m_hitTypeMachLatencyHist : Sequencer
m_hitTypeMachLatencyHistSeqr : Profiler::ProfilerStats::PerRequestTypeMachineTypeStats
m_hot_lines : AddressProfiler , Profiler
m_htm_transaction_abort_cause : HTMSequencer
m_htm_transaction_cycles : HTMSequencer
m_htm_transaction_instructions : HTMSequencer
m_htmCmdRequestTable : HTMSequencer
m_htmFromTransaction : RubyRequest
m_htmInReadSet : AbstractCacheEntry
m_htmInWriteSet : AbstractCacheEntry
m_htmstart_instruction : HTMSequencer
m_htmstart_tick : HTMSequencer
m_htmTransactionUid : RubyRequest
m_id : AbstractController , BasicRouter , flit , InputUnit , NetworkInterface , NetworkLink , OutputUnit , OutVcState , sc_dt::scfx_ieee_double , tlm::tlm_phase , tlm_utils::callback_binder_bw< TYPES > , tlm_utils::callback_binder_fw< TYPES >
m_idx : sc_dt::sc_fxnum_bitref , sc_dt::sc_fxnum_fast_bitref
m_if : sc_dt::scfx_ieee_float
m_if_p : sc_core::sc_int_sigref , sc_core::sc_signed_sigref , sc_core::sc_uint_sigref , sc_core::sc_unsigned_sigref
m_immediate_yield : tlm_utils::peq_with_cb_and_phase< OWNER, TYPES >
m_in : PerfectSwitch , Throttle
m_in_link : InputUnit
m_in_ports : AbstractController
m_IncompleteTimes : Sequencer
m_IncompleteTimesSeqr : Profiler::ProfilerStats::PerMachineTypeStats
m_index : sc_dt::sc_bitref_r< T > , sc_dt::sc_int_bitref_r , sc_dt::sc_signed_bitref_r , sc_dt::sc_uint_bitref_r , sc_dt::sc_unsigned_bitref_r , tlm_utils::instance_specific_extension_accessor
m_init_val_p : sc_core::sc_inout< sc_dt::sc_bigint< W > > , sc_core::sc_inout< sc_dt::sc_biguint< W > > , sc_core::sc_inout< sc_dt::sc_int< W > > , sc_core::sc_inout< sc_dt::sc_uint< W > >
m_InitialToForwardDelayHist : GPUCoalescer , Sequencer
m_InitialToForwardDelayHistCoalsr : Profiler::ProfilerStats::PerMachineTypeStats
m_InitialToForwardDelayHistSeqr : Profiler::ProfilerStats::PerMachineTypeStats
m_initiatingNode : Check
m_initiator_ext : adapt_gp2ext< BUSWIDTH >
m_inports_dirn2idx : RoutingUnit
m_inports_idx2dirn : RoutingUnit
m_input_arbiter_activity : SwitchAllocator
m_input_link_id : MessageBuffer
m_input_unit : Router
m_inst_cache_hit_latency : Sequencer
m_inst_profiler_ptr : Profiler
m_instance : sc_dt::sc_global< T >
m_instCache_ptr : GPUCoalescer
m_instSeqNum : RubyRequest
m_int_link_buffers : SimpleNetwork
m_int_link_vector : Topology
m_interfaces : tlm::tlm_analysis_port< T >
m_inTrans : AbstractController
m_invalidate : SimpleLTTarget1
m_invalidate_direct_mem_ptr : tlm_utils::simple_initiator_socket_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::simple_initiator_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process
m_invalidate_direct_mem_user_id : tlm_utils::simple_initiator_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process
m_invalidate_dmi_event : SimpleLTTarget1 , SimpleLTTarget_ext
m_invalidate_dmi_time : SimpleLTTarget1 , SimpleLTTarget_ext
m_is_blocking : AbstractController
m_is_free_signal : Credit
m_is_instruction_only_cache : CacheMemory
m_is_valid : PrefetchEntry
m_isCPUSequencer : RubyPort
m_ispex_per_accessor : tlm_utils::instance_specific_extension_container
m_IssueToInitialDelayHist : GPUCoalescer , Sequencer
m_IssueToInitialDelayHistCoalsr : Profiler::ProfilerStats::PerMachineTypeStats
m_IssueToInitialDelayHistSeqr : Profiler::ProfilerStats::PerMachineTypeStats
m_iwl : sc_dt::sc_fxtype_params
m_largest_bin : Histogram
m_last_arrival_time : MessageBuffer
m_last_progress_vector : RubyTester
m_last_store : StoreTrace
m_last_touch_tick : AbstractCacheEntry
m_last_writer : StoreTrace
m_LastEnqueueTime : Message
m_latency : BasicLink , BasicRouter , NetworkLink , Router
m_latencyHist : GPUCoalescer , Sequencer
m_latencyHistCoalsr : Profiler::ProfilerStats
m_latencyHistSeqr : Profiler::ProfilerStats
m_left : sc_dt::sc_concref_r< X, Y > , sc_dt::sc_int_subref_r , sc_dt::sc_signed_subref_r , sc_dt::sc_uint_subref_r , sc_dt::sc_unsigned_subref_r
m_left_p : sc_dt::sc_concatref
m_len : sc_dt::sc_bv_base , sc_dt::sc_concatref , sc_dt::sc_int_base , sc_dt::sc_length_param , sc_dt::sc_lv_base , sc_dt::sc_subref_r< X > , sc_dt::sc_uint_base , sc_dt::scfx_string
m_len_r : sc_dt::sc_concatref
m_length : tlm::tlm_generic_payload
m_LineAddress : RubyRequest
m_link : LinkOrder
m_link_bandwidth_multiplier : Throttle
m_link_latency : Throttle
m_link_map : Topology
m_link_order : PerfectSwitch
m_link_utilization : Throttle::ThrottleStats
m_link_utilization_proxy : Throttle
m_link_utilized : NetworkLink
m_lo : sc_dt::sc_subref_r< X >
m_load_waiting_on_load_cycles : GPUCoalescer
m_load_waiting_on_store_cycles : GPUCoalescer
m_loads : AccessTraceForAddress
m_local_time : tlm_utils::tlm_quantumkeeper
m_locked : AbstractCacheEntry
m_lookup_map : CheckTable
m_lsw : sc_dt::scfx_rep
m_machineID : AbstractController
m_macroBlockAccessTrace : AddressProfiler
m_mandatory_q_ptr : RubyPort
m_mandatory_queue_latency : AbstractController
m_mant : sc_dt::scfx_mant_ref , sc_dt::scfx_rep
m_map : PerfectCacheMemory< ENTRY > , PersistentTable , sc_dt::sc_global< T > , TBETable< ENTRY > , TimerTable
m_marked : PersistentTableEntry
m_masks : MultiSocketSimpleSwitchAT
m_max : Histogram
m_max_credit_count : OutVcState
m_max_outstanding_requests : DMASequencer , GPUCoalescer , Sequencer
m_max_size : MessageBuffer
m_max_vcs_per_vnet : GarnetNetwork
m_memory_size_bits : RubySystem
m_message_queue : WireBuffer
m_missLatencyHist : GPUCoalescer , Sequencer
m_missLatencyHistCoalsr : Profiler::ProfilerStats
m_missLatencyHistSeqr : Profiler::ProfilerStats
m_missMachLatencyHist : GPUCoalescer , Sequencer
m_missMachLatencyHistCoalsr : Profiler::ProfilerStats::PerMachineTypeStats
m_missMachLatencyHistSeqr : Profiler::ProfilerStats::PerMachineTypeStats
m_missTypeLatencyHist : GPUCoalescer , Sequencer
m_missTypeLatencyHistCoalsr : Profiler::ProfilerStats::PerRequestTypeStats
m_missTypeLatencyHistSeqr : Profiler::ProfilerStats::PerRequestTypeStats
m_missTypeMachLatencyHist : GPUCoalescer , Sequencer
m_missTypeMachLatencyHistCoalsr : Profiler::ProfilerStats::PerRequestTypeMachineTypeStats
m_missTypeMachLatencyHistSeqr : Profiler::ProfilerStats::PerRequestTypeMachineTypeStats
m_mm : tlm::tlm_generic_payload
m_mod : tlm_utils::passthrough_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::simple_initiator_socket_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::simple_initiator_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_msg_bytes : SimpleNetwork::NetworkStats , Switch::SwitchStats , Throttle::ThrottleStats
m_msg_counter : Message , MessageBuffer , WireBuffer
m_msg_counts : SimpleNetwork::NetworkStats , Switch::SwitchStats , Throttle::ThrottleStats
m_msg_ptr : flit
m_msgs_this_cycle : MessageBuffer
m_msw : sc_dt::scfx_rep
m_multi_binds : tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >
m_n_bits : sc_dt::sc_fxtype_params
m_name : DirectoryMemory , TimerTable
m_nb_f : tlm_utils::callback_binder_bw< TYPES > , tlm_utils::callback_binder_fw< TYPES > , tlm_utils::multi_passthrough_initiator_socket< MODULE, BUSWIDTH, TYPES, N, POL > , tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >
m_nb_transport_ptr : tlm_utils::passthrough_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_nb_transport_user_id : tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_neg : sc_dt::scfx_pow10
m_net_ptr : AbstractController , NetworkInterface
m_network_link : GarnetIntLink
m_network_links : GarnetExtLink
m_network_ptr : PerfectSwitch , Router , Switch
m_networklinks : GarnetNetwork
m_networks : RubySystem
m_new_val : sc_core::sc_signal< sc_dt::sc_bigint< W > > , sc_core::sc_signal< sc_dt::sc_biguint< W > > , sc_core::sc_signal< sc_dt::sc_int< W > > , sc_core::sc_signal< sc_dt::sc_uint< W > > , sc_gem5::ScSignalBaseT< T, WRITER_POLICY >
m_next_address : TimerTable
m_next_p : sc_core::sc_byte_heap , sc_dt::word_list
m_next_sync_point : tlm_utils::tlm_quantumkeeper
m_next_time : TimerTable
m_next_valid : TimerTable
m_ni_flit_size : GarnetNetwork
m_ni_out_vcs_enqueue_time : NetworkInterface
m_nis : GarnetNetwork
m_node : Throttle
m_nodes : Network , Topology
m_not_avail_count : MessageBuffer
m_not_const : sc_dt::scfx_mant_ref
m_nSize : Set
m_num : sc_dt::sc_fxnum_bitref , sc_dt::sc_fxnum_fast_bitref , sc_dt::sc_fxnum_fast_subref , sc_dt::sc_fxnum_subref
m_num_buffer_reads : InputUnit
m_num_buffer_writes : InputUnit
m_num_cols : GarnetNetwork
m_num_connected_buffers : SimpleNetwork , Switch
m_num_cpus : DirectedGenerator , RubyTester
m_num_entries : DirectoryMemory
m_num_inports : SwitchAllocator
m_num_inst_data_ports : RubyTester
m_num_inst_only_ports : RubyTester
m_num_of_sequencers : AddressProfiler
m_num_outports : SwitchAllocator
m_num_pending_invs : VIPERCoalescer
m_num_read : tlm::tlm_fifo< T >
m_num_read_no_notify : tlm::tlm_fifo< T >
m_num_readable : tlm::tlm_fifo< T >
m_num_readers : Check , CheckTable , RubyTester
m_num_rows : GarnetNetwork
m_num_startup_pfs : RubyPrefetcher
m_num_streams : RubyPrefetcher
m_num_vcs : CrossbarSwitch , Router , SwitchAllocator
m_num_vnets : Profiler
m_num_writers : Check , CheckTable , RubyTester
m_num_written : tlm::tlm_fifo< T >
m_number_of_switches : Topology
m_number_of_TBEs : AbstractController , TBETable< ENTRY >
m_o_flag : sc_dt::sc_fxnum , sc_dt::sc_fxnum_fast
m_o_mode : sc_dt::sc_fxtype_params
m_obj : sc_dt::sc_bitref_r< T > , sc_dt::sc_subref_r< X >
m_obj_p : sc_dt::sc_int_bitref_r , sc_dt::sc_int_subref_r , sc_dt::sc_signed_bitref_r , sc_dt::sc_signed_subref_r , sc_dt::sc_uint_bitref_r , sc_dt::sc_uint_subref_r , sc_dt::sc_unsigned_bitref_r , sc_dt::sc_unsigned_subref_r
m_observer : sc_dt::sc_fxnum , sc_dt::sc_fxnum_fast , sc_dt::sc_fxval , sc_dt::sc_fxval_fast
m_occupancy : MessageBuffer
m_old_value_ptr : sc_dt::sc_context< T >
m_ordered : Network
m_out : PerfectSwitch , Throttle
m_out_link : OutputUnit
m_outport : flit
m_outports_dirn2idx : RoutingUnit
m_outports_idx2dirn : RoutingUnit
m_output_arbiter_activity : SwitchAllocator
m_output_p : sc_core::sc_signal< sc_dt::sc_bigint< W > > , sc_core::sc_signal< sc_dt::sc_biguint< W > > , sc_core::sc_signal< sc_dt::sc_int< W > > , sc_core::sc_signal< sc_dt::sc_uint< W > >
m_output_port : VirtualChannel
m_output_unit : Router
m_output_vc : VirtualChannel
m_outstanding_count : DMASequencer , GPUCoalescer , Sequencer
m_outstandReqHist : GPUCoalescer , Sequencer
m_outstandReqHistCoalsr : Profiler::ProfilerStats
m_outstandReqHistSeqr : Profiler::ProfilerStats
m_outTrans : AbstractController
m_owner : tlm_utils::convenience_socket_cb_holder , tlm_utils::peq_with_cb_and_phase< OWNER, TYPES > , tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::bw_process , tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::bw_process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_packet_network_latency : GarnetNetwork
m_packet_queueing_latency : GarnetNetwork
m_packets_injected : GarnetNetwork
m_packets_received : GarnetNetwork
m_page_shift : RubyPrefetcher
m_params : sc_dt::sc_fxnum , sc_dt::sc_fxnum_fast
m_pc : Check
m_pc_address : TraceRecord
m_pending_message_count : PerfectSwitch
m_pending_trans : tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL > , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >
m_pendingReqs : MultiSocketSimpleSwitchAT
m_pendingResps : MultiSocketSimpleSwitchAT
m_peq : tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_percent_writes : SeriesRequestGenerator
m_Permission : AbstractCacheEntry
m_permission : PerfectCacheLineState< ENTRY >
m_phys_mem : RubySystem
m_PhysicalAddress : RubyRequest
m_pkt : RubyRequest
m_pool : sc_core::sc_int_sigref , sc_core::sc_signed_sigref , sc_core::sc_uint_sigref , sc_core::sc_unsigned_sigref , sc_dt::sc_concat_bool , sc_dt::sc_concatref , sc_dt::sc_int_bitref , sc_dt::sc_int_subref , sc_dt::sc_signed_bitref , sc_dt::sc_signed_subref , sc_dt::sc_uint_bitref , sc_dt::sc_uint_subref , sc_dt::sc_unsigned , sc_dt::sc_unsigned_bitref , sc_dt::sc_unsigned_subref
m_pool_i : sc_core::sc_vpool< T >
m_pool_p : sc_core::sc_vpool< T >
m_port : tlm::tlm_base_target_socket< BUSWIDTH, FW_IF, BW_IF, N, POL >
m_port_buffers : Switch
m_port_requests : SwitchAllocator
m_pos : sc_dt::scfx_pow10
m_ppq : tlm_utils::peq_with_cb_and_phase< OWNER, TYPES >
m_Prefetch : RubyRequest
m_prefetch_accesses : CacheMemory::CacheMemoryStats
m_prefetch_cross_pages : RubyPrefetcher
m_prefetch_hits : CacheMemory::CacheMemoryStats
m_prefetch_misses : CacheMemory::CacheMemoryStats
m_prio_heap : MessageBuffer
m_priority_rank : MessageBuffer
m_proc : sc_dt::sc_global< T >
m_process : tlm_utils::passthrough_target_socket_b< MODULE, BUSWIDTH, TYPES, POL > , tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL > , tlm_utils::simple_initiator_socket_b< MODULE, BUSWIDTH, TYPES, POL > , tlm_utils::simple_initiator_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >
m_process_handle : tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_profiler : AddressProfiler , RubySystem
m_ProgramCounter : RubyRequest
m_programCounterAccessTrace : AddressProfiler
m_q_flag : sc_dt::sc_fxnum , sc_dt::sc_fxnum_fast
m_q_mode : sc_dt::sc_fxtype_params
m_r_flag : sc_dt::scfx_rep
m_randomization : MessageBuffer , RubySystem
m_rc : QTIsaac< ALPHA >
m_records : CacheRecorder
m_records_flushed : CacheRecorder
m_records_read : CacheRecorder
m_recycle_latency : AbstractController
m_ref_count : tlm::tlm_generic_payload
m_refs : sc_dt::sc_concref_r< X, Y >
m_release_fn : tlm_utils::instance_specific_extension_container
m_rep : sc_dt::sc_fxnum , sc_dt::sc_fxval
m_replacementPolicy_ptr : CacheMemory
m_request_to_write : PersistentTableEntry
m_requests_completed : RubyDirectedTester
m_requests_to_complete : RubyDirectedTester
m_RequestTable : DMASequencer , Sequencer
m_reserved : TBEStorage
m_resource_stalls : CacheMemory
m_response_in_progress : tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_response_status : tlm::tlm_generic_payload
m_retryProfileHisto : AddressProfiler
m_retryProfileHistoRead : AddressProfiler
m_retryProfileHistoWrite : AddressProfiler
m_retryProfileMap : AddressProfiler
m_ri : tlm::circular_buffer< T >
m_right : sc_dt::sc_concref_r< X, Y > , sc_dt::sc_int_subref_r , sc_dt::sc_signed_subref_r , sc_dt::sc_uint_subref_r , sc_dt::sc_unsigned_subref_r
m_right_p : sc_dt::sc_concatref
m_round_robin_inport : SwitchAllocator
m_round_robin_invc : SwitchAllocator
m_round_robin_start : PerfectSwitch
m_route : flit
m_router : CrossbarSwitch , InputUnit , OutputUnit , RoutingUnit , SwitchAllocator
m_routers : GarnetNetwork
m_routing_algorithm : GarnetNetwork
m_routing_table : PerfectSwitch , RoutingUnit
m_ruby_system : BankedArray , Profiler , RubyPort , Throttle
m_runningGarnetStandalone : GPUCoalescer , Sequencer
m_scheduled_events : tlm_utils::peq_with_get< PAYLOAD >
m_second_type : SequencerRequest
m_seq_map : CacheRecorder
m_sharing : AccessTraceForAddress
m_sharing_miss_counter : AddressProfiler
m_sign : sc_dt::scfx_rep
m_size : flit
m_Size : RubyRequest
m_size : sc_dt::sc_bv_base , sc_dt::sc_lv_base , sc_dt::scfx_mant , tlm::circular_buffer< T > , tlm::tlm_fifo< T >
m_size_at_cycle_start : MessageBuffer
m_size_bits : DirectoryMemory
m_size_bytes : DirectoryMemory
m_size_last_time_size_checked : MessageBuffer
m_slots_avail : TBEStorage
m_slots_used : TBEStorage
m_sockets : tlm_utils::multi_passthrough_initiator_socket< MODULE, BUSWIDTH, TYPES, N, POL > , tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >
m_stage : flit
m_stall_count : MessageBuffer , NetworkInterface
m_stall_map_size : MessageBuffer
m_stall_msg_map : MessageBuffer
m_stall_queue : NetworkInterface::InputPort
m_stall_time : MessageBuffer
m_stalled_at_cycle_start : MessageBuffer
m_start_cycle : RubySystem
m_start_index_bit : CacheMemory
m_starving : PersistentTableEntry
m_state : sc_dt::scfx_rep
m_stats : TBEStorage
m_status : Check , InvalidateGenerator , SeriesRequestGenerator
m_store_count : Check , StoreTrace
m_store_first_to_last : StoreTrace
m_store_first_to_stolen : StoreTrace
m_store_last_to_stolen : StoreTrace
m_store_waiting_on_load_cycles : GPUCoalescer
m_store_waiting_on_store_cycles : GPUCoalescer
m_stores : AccessTraceForAddress
m_stores_this_interval : StoreTrace
m_streaming_width : tlm::tlm_generic_payload
m_strict_fifo : MessageBuffer
m_stride : PrefetchEntry
m_sumSamples : Histogram
m_sumSquaredSamples : Histogram
m_suspend : tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process::process_handle_class , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process::process_handle_class
m_sw : sc_dt::sc_fxcast_switch
m_sw_input_arbiter_activity : Router
m_sw_output_arbiter_activity : Router
m_switch : PerfectSwitch , Throttle
m_switch_id : PerfectSwitch , Throttle
m_switches : SimpleNetwork
m_systems_to_warmup : RubySystem
m_tag_index : CacheMemory
m_target_count : MultiSocketSimpleSwitchAT
m_tester_ptr : Check , CheckTable
m_thread_n : sc_dp::sc_barrier
m_time : flit , Message , OutVcState , TraceRecord
m_time_last_time_enqueue : MessageBuffer
m_time_last_time_pop : MessageBuffer
m_time_last_time_size_checked : MessageBuffer
m_to : sc_dt::sc_fxnum_fast_subref , sc_dt::sc_fxnum_subref
m_toNetQueues : Network
m_topology_ptr : Network
m_total : AccessTraceForAddress
m_total_ext_in_link_utilization : GarnetNetwork
m_total_ext_out_link_utilization : GarnetNetwork
m_total_hops : GarnetNetwork
m_total_int_link_utilization : GarnetNetwork
m_total_samples : StoreTrace
m_touched_by : AccessTraceForAddress
m_traces : sc_core::sc_in< sc_dt::sc_bigint< W > > , sc_core::sc_in< sc_dt::sc_biguint< W > > , sc_core::sc_in< sc_dt::sc_int< W > > , sc_core::sc_in< sc_dt::sc_uint< W > > , sc_core::sc_inout< sc_dt::sc_bigint< W > > , sc_core::sc_inout< sc_dt::sc_biguint< W > > , sc_core::sc_inout< sc_dt::sc_int< W > > , sc_core::sc_inout< sc_dt::sc_uint< W > >
m_train_misses : RubyPrefetcher
m_trans : tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process::process_handle_class , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process::process_handle_class
m_transitions_per_cycle : AbstractController
m_transport_dbg_ptr : tlm_utils::passthrough_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::simple_target_socket_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_transport_dbg_user_id : tlm_utils::passthrough_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::simple_target_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::fw_process
m_transport_ptr : tlm_utils::simple_initiator_socket_b< MODULE, BUSWIDTH, TYPES, POL >::process , tlm_utils::simple_initiator_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process
m_transport_user_id : tlm_utils::simple_initiator_socket_tagged_b< MODULE, BUSWIDTH, TYPES, POL >::process
m_txn : tlm_utils::instance_specific_extension_container
m_type : flit , NetworkLink , PrefetchEntry
m_Type : RubyRequest
m_type : SequencerRequest , TraceRecord
m_type_params : sc_dt::scfx_params
m_typeLatencyHist : GPUCoalescer , Sequencer
m_typeLatencyHistCoalsr : Profiler::ProfilerStats::PerRequestTypeStats
m_typeLatencyHistSeqr : Profiler::ProfilerStats::PerRequestTypeStats
m_ulen : sc_dt::sc_int_base , sc_dt::sc_uint_base
m_uncompressed_trace : CacheRecorder
m_uncompressed_trace_size : CacheRecorder
m_uneven_delta : tlm_utils::peq_with_cb_and_phase< OWNER, TYPES >
m_units_remaining : Throttle
m_use_occupancy : CacheMemory
m_use_time : PrefetchEntry
m_used : tlm::circular_buffer< T >
m_used_sockets : tlm_utils::multi_passthrough_initiator_socket< MODULE, BUSWIDTH, TYPES, N, POL >
m_user : AccessTraceForAddress
m_usingRubyTester : RubyPort
m_val : sc_dt::sc_bit , sc_dt::sc_fxnum_fast , sc_dt::sc_fxval_fast , sc_dt::sc_int_base , sc_dt::sc_logic , sc_dt::sc_uint_base
m_value : Check , LinkOrder , sc_dt::sc_concat_bool , sc_dt::sc_context< T >
m_value_ptr : sc_dt::sc_global< T >
m_vc : flit
m_vc_allocator : NetworkInterface
m_vc_load : NetworkLink
m_vc_per_vnet : InputUnit , NetworkInterface , OutputUnit , Router , SwitchAllocator
m_vc_state : OutVcState , VirtualChannel
m_vc_winners : SwitchAllocator
m_version : AbstractController , RubyPort
m_virt_nets : NetworkLink
m_virtual_networks : Network , NetworkInterface , PerfectSwitch , Router
m_vnet : flit
m_vnet_id : MessageBuffer
m_vnet_type : GarnetNetwork
m_vnet_type_names : Network
m_vnets : Throttle , Topology
m_waiting_buffers : AbstractController
m_wakeup_event : Consumer
m_wakeup_frequency : RubyTester
m_wakeup_ticks : Consumer
m_wakeups_wo_switch : PerfectSwitch , Throttle
m_warmup_enabled : RubySystem
m_weight : BasicLink
m_weight_table : RoutingUnit
m_wfid : RubyRequest
m_wi : sc_dt::scfx_index , tlm::circular_buffer< T >
m_width : flit
m_wl : sc_dt::sc_fxtype_params
m_wp : sc_dt::scfx_rep
m_wrap : sc_core::sc_vpool< T >
m_writeCompletePktMap : VIPERCoalescer
m_writeMask : RubyRequest
m_writer_p : sc_core::sc_signal< sc_dt::sc_bigint< W > > , sc_core::sc_signal< sc_dt::sc_biguint< W > > , sc_core::sc_signal< sc_dt::sc_int< W > > , sc_core::sc_signal< sc_dt::sc_uint< W > >
m_WTData : RubyRequest
ma : MSICAP
macAddr : IGbE
machine : Linux::utsname , OperatingSystem::utsname , Solaris::utsname
MachineCheck() : X86ISA::MachineCheck
MachineCheckFault() : PowerISA::MachineCheckFault
MachineID() : MachineID
machineToNetwork : RubySystem
machInst : ArmISA::ArmFault , ArmISA::HypervisorTrap , ArmISA::SecureMonitorTrap , ArmISA::SupervisorTrap , GenericISA::BasicDecodeCache< Decoder, EMI >::AddrMapEntry , StaticInst
macro_tile_config_ptr : kfd_ioctl_get_tile_config_args
macrocodeBlock : X86ISA::MacroopBase
MacroMemOp() : ArmISA::MacroMemOp
macroop : BaseDynInst< Impl > , DefaultFetch< Impl >
MacroopBase() : X86ISA::MacroopBase
macroopInProgress : Trace::TarmacParser
macroStaticInst : Trace::InstRecord
MacroTmeOp() : ArmISAInst::MacroTmeOp
MacroVFPMemOp() : ArmISA::MacroVFPMemOp
MAGIC : MmioVirtIO
magic : pcap_file_header
magic_number : BmpWriter::FileHeader
magicNumber : ProtoStream
mailboxFlags : SCMI::Message
mailBoxPtr : HSADriver::EventTableEntry
main() : Fiber , ItsCommand , ItsProcess , ItsTranslation , LinkedFiber , m5::Coroutine< Arg, Ret > , sc_gem5::ScMainFiber , sc_gem5::Thread::Context , SMMUCommandExecProcess , SMMUProcess , SMMUTranslationProcess , SwitchingFiber
mainPacket() : LSQ< Impl >::LSQRequest , LSQ< Impl >::SplitDataRequest
mainPkt : LSQ< Impl >::LSQSenderState
mainReq : LSQ< Impl >::SplitDataRequest , WholeTranslationState
mainRequest() : LSQ< Impl >::LSQRequest , LSQ< Impl >::SplitDataRequest
maintainClusivity() : BaseCache
maintainStepping() : Iris::ThreadContext
maintenanceInterrupt : Gicv3CPUInterface
maintenanceInterruptStatus() : Gicv3CPUInterface
maintInt : VGic
maintIntPosted : VGic
mainTLB : SMMUv3DeviceInterface
mainTLBEnable : SMMUv3DeviceInterface
mainTLBLat : SMMUv3DeviceInterface
mainTLBSem : SMMUv3DeviceInterface
mair : ContextDescriptor
major_version : kfd_ioctl_get_version_args
majority() : ArmISA::Crypto
MAJORITY : ArmISA::Crypto
majorVer : X86ISA::SMBios::BiosInformation
majorVersion : X86ISA::SMBios::SMBiosTable::SMBiosHeader
make_uchar_array() : tlm::tlm_bool< D >
make_warnings_errors() : sc_core::sc_report
makeAtomicOpFunctor() : GPUDynInst
makeAtomicResponse() : Packet
makeBranchInfo() : LoopPredictor , StatisticalCorrector , TAGE_SC_L_TAGE , TAGEBase
makeCacheRecorder() : RubySystem
makeCRField() : PowerISA::FloatOp , PowerISA::IntOp
makeExtInLink() : GarnetNetwork , Network , SimpleNetwork
makeExtOutLink() : GarnetNetwork , Network , SimpleNetwork
makeFragmentPackets() : Minor::LSQ::SplitDataRequest
makeFragmentRequests() : Minor::LSQ::SplitDataRequest
makeHtmTransactionalReqResponse() : Packet
makeInternalLink() : GarnetNetwork , Network , SimpleNetwork
makeLink() : SimpleNetwork , Topology
makePacket() : Minor::Fetch1::FetchRequest , Minor::LSQ::LSQRequest
makeParamsObject() : CxxConfigDirectoryEntry
makeReadCmd() : Packet
makeRequest() : DMASequencer , GPUCoalescer , RubyPort , RubyPortProxy , Sequencer , VIPERCoalescer
makeResponse() : Packet
makeStage2() : ArmISA::TLBIALL , ArmISA::TLBIALLEL , ArmISA::TLBIALLN , ArmISA::TLBIIPA , ArmISA::TLBIVMALL
makeThreadHistory() : MPP_StatisticalCorrector_64KB , MPP_StatisticalCorrector_8KB , StatisticalCorrector , TAGE_SC_L_64KB_StatisticalCorrector , TAGE_SC_L_8KB_StatisticalCorrector
makeTimingResponse() : Packet
makeTopology() : SimpleNetwork
MakeTsbPtr() : SparcISA::TLB
makeWriteCmd() : Packet
makeWriteCompletePkts() : VIPERCoalescer
makezero() : sc_dt::sc_signed , sc_dt::sc_unsigned
Malta() : Malta
malta : MaltaCChip , MaltaIO , MaltaIO::RTC
MaltaCChip() : MaltaCChip
MaltaIO() : MaltaIO
Managed : EventBase
manager : ProbeListener , ProbeListenerObject
manageReadTransfer() : UFSHostDevice
manageWriteTransfer() : UFSHostDevice
manc : iGbReg::Regs
mandatoryQueueLatency() : AbstractController
mantissa() : sc_dt::scfx_ieee_float
mantissa0() : sc_dt::scfx_ieee_double
mantissa1() : sc_dt::scfx_ieee_double
map() : EmulationPageTable , MultiLevelPageTable< EntryTypes >
Map : PCEventQueue
map() : Process , SimpleRenameMap
mapAddressToDownstreamMachine() : AbstractController
mapAddressToLocalIdx() : DirectoryMemory
mapAddressToMachine() : AbstractController
mapc() : ItsCommand
MAPC : ItsCommand
mapd() : ItsCommand
MAPD : ItsCommand
mapi() : ItsCommand
MAPI : ItsCommand
mapIndexToBank() : BankedArray
MapIter : SparcISA::TLB
mapPciInterrupt() : GenericArmPciHost , GenericPciHost
MappedFileBuffer() : VMA::MappedFileBuffer
mapper : AddrMapper::MapperRequestPort , AddrMapper::MapperResponsePort
MapperRequestPort() : AddrMapper::MapperRequestPort
MapperResponsePort() : AddrMapper::MapperResponsePort
mapPid() : ArmISA::FsFreebsd , ArmISA::FsLinux
MappingFlags : EmulationPageTable
mappings : Prefetcher::IrregularStreamBuffer::AddressMappingEntry
mapQIfSlotAvlbl() : HWScheduler
mapRegion() : MemState
mapSgpr() : RegisterManager , RegisterManagerPolicy , StaticRegisterManagerPolicy
mapSize() : Loader::ElfObject , Loader::ObjectFile
mapsTo() : ArmISA::ISA::MiscRegLUTEntryInitializer
mapti() : ItsCommand
MAPTI : ItsCommand
mapType : SimpleAddressMap
mapVgpr() : RegisterManager , RegisterManagerPolicy , StaticRegisterManagerPolicy
mapWaveToExeUnit() : ScoreboardCheckStage
mapWaveToGlobalMem() : ComputeUnit
mapWaveToLocalMem() : ComputeUnit
mapWaveToScalarAlu() : ComputeUnit
mapWaveToScalarAluGlobalIdx() : ComputeUnit
mapWaveToScalarMem() : ComputeUnit
marchid : RiscvISA::RemoteGDB::RiscvGdbRegCache
markActive() : System::Threads
markClean() : ProxyPtrBuffer< Proxy >
markCompletedInsts() : DefaultCommit< Impl >
markDelayed() : ArmISA::Stage2LookUp , ArmISA::Stage2MMU::Stage2Translation , BaseTLB::Translation , DataTranslation< ExecContextPtr > , DefaultFetch< Impl >::FetchTranslation , LSQ< Impl >::LSQRequest , Minor::Fetch1::FetchRequest , Minor::LSQ::LSQRequest , Prefetcher::Queued::DeferredPacket , TimingSimpleCPU::FetchTranslation , X86ISA::GpuTLB::Translation
markDirty() : ProxyPtrBuffer< Proxy >
markedPending : MSHR::Target
markEntries() : PersistentTable
markInService() : BaseCache , MSHR , MSHRQueue , WriteQueue
markInvDone() : HSAQueueEntry
markPending() : MSHRQueue
markReg() : RegisterFile
MarkRegBusyScbEvent() : RegisterFile::MarkRegBusyScbEvent
MarkRegFreeScbEvent() : RegisterFile::MarkRegFreeScbEvent
markRemoved() : Sequencer
markSrcRegReady() : BaseDynInst< Impl >
markupInstDests() : Minor::Scoreboard
markWFReady() : ScoreboardCheckToSchedule
markWgDispatch() : HSAQueueEntry
markWorkItem() : System
mask : Iob::IntCtl , Loader::MemoryImage , Loader::SymbolTable , LockedAddr , MinorFUTiming
Mask : MipsISA::PTE
mask : PixelConverter::Channel
Mask : PowerISA::PTE
mask : Trie< Key, Value >::Node , UFSHostDevice::taskStart , UFSHostDevice::transferStart , X86ISA::I82094AA
mask1 : MaltaIO
mask2 : MaltaIO
maskAll() : X86ISA::I8259
masked : X86ISA::Interrupts
MaskedISR : PL031 , Sp804::Timer
MaskedPattern() : Compressor::DictionaryCompressor< T >::MaskedPattern< mask >
MaskedValuePattern() : Compressor::DictionaryCompressor< T >::MaskedValuePattern< value, mask >
maskInt() : Pl011 , PL031
maskReg : X86ISA::I8237
masks : AddrRange , X86ISA::Decoder::InstBytes
masksLSBs : BloomFilter::Block
masksSizes : BloomFilter::Block
maskToPortList() : SnoopFilter
master : tlm::tlm_req_rsp_channel< REQ, RSP, REQ_CHANNEL, RSP_CHANNEL >
master_export : tlm::tlm_req_rsp_channel< REQ, RSP, REQ_CHANNEL, RSP_CHANNEL >
master_port : tlm::tlm_transport_to_master< REQ, RSP >
MasterPort() : MasterPort
match() : ArmISA::TlbEntry , EmulatedDriver , MinorFUTiming , ObjectMatch
matchAddr() : Packet
matchBlockAddr() : MSHR , Packet , QueueEntry , WriteQueueEntry
matches() : CacheBlk::Lock , Trie< Key, Value >::Node
matchesContext() : LockedAddr
matchEvent : PL031
matchLocation : Compressor::DictionaryCompressor< T >::Pattern
matchPwrState() : PowerState
MatchReg : PL031
matchTag() : TaggedEntry
matchVal : PL031
MathExpr() : MathExpr
MathExprPowerModel() : MathExprPowerModel
mAtomic : WriteMask
mAtomicOp : WriteMask
matrix : LinearSystem
Matrix64x12() : Matrix64x12
max : SMMUSemaphore , Stats::DistData , Stats::DistStor::Params
Max : Trace::TarmacBaseRecord::RegEntry
max_bucket : Stats::HistStor
MAX_BURST_LEN : HDLcd
Max_CPUs : Malta
MAX_CRN : Aapcs32::State
max_cu_id : _amd_queue_s
MAX_DIM : HSAQueueEntry
MAX_FREQ_ENTRIES : SystemCounter
MAX_GRN : Aapcs64::State
MAX_HTM_DEPTH : ArmISA::HTMCheckpoint
max_legacy_doorbell_dispatch_id_plus_1 : _amd_queue_s
max_outstanding : HDLcd
MAX_PIXEL_SIZE : HDLcd
MAX_PRIO : MathExpr
max_scratch_backing_memory_byte_size : AMDKernelCode
max_size : flitBuffer , PollQueue
MAX_SRN : Aapcs64::State
MAX_STRING_SIZE : SCMI::Protocol
MAX_TIMER_FRAMES : GenericTimerMem
max_track : Stats::DistStor
max_val : Stats::DistData , Stats::DistStor
max_valu_insts : Shader
max_wave_id : _amd_queue_s
maxAccessesPerRow : DRAMInterface
maxAddr() : Loader::MemoryImage , Pl111
maxAddrSize : ArmISA::BrkPoint , ArmISA::WatchPoint
maxBankSize : Clint::ClintRegisters , Plic::PlicRegisters
maxBarrierCnt() : ComputeUnit , WFBarrier
MaxBits : Trie< Key, Value >
maxCoalescedReqs : X86ISA::GpuTLB
maxCodeLength : Compressor::Encoder::Huffman
maxCommands() : Gicv3Its
maxCommandsPerWindow : MemInterface
maxCompactorEntries : Prefetcher::PIF
MaxDataBytes : LSQUnit< Impl >
maxDependents : TraceCPU::ElasticDataGen::ElasticDataGenStatGroup
maxDoorbell : UFSHostDevice::UFSHostDeviceStats
maxDynWaveId : Wavefront
maxEntries : InstructionQueue< Impl > , ROB< Impl >
maxEntryCount : SnoopFilter
maxFbSize : FetchUnit::FetchBufDesc
MaxFlags : BaseDynInst< Impl >
maxHist : TAGEBase
maxIbSize : FetchUnit::FetchBufDesc , Wavefront
maxID : PlicOutput
Maximum_Pri : EventBase
maximumCounterCount : ArmISA::PMU
maximumSize : LdsState
maxlen : EtherDump
MaxLineLength : Trace::TarmacParserRecord
maxLineWidth : Minor::Fetch1
maxLoads : MemTest
maxLQEntries : LSQ< Impl >
maxLSQAllocation() : LSQ< Impl >
maxMemorySlot : KvmVM
maxNumAlloc : TAGEBase
maxNumDependents : ElasticTrace::ElasticTraceStats
maxNumEpisodes : ProtocolTester
maxOpLatencies : FUPool
maxOutstandingDma : Pl111
maxOutstandingReqs : BaseTrafficGen
maxOutstandingSnoopCheck : CoherentXBar
maxPendingReads : NVMInterface
maxPendingWrites : NVMInterface
maxPeriod : HybridGen , StochasticGen
maxPhysRegDepMapSize : ElasticTrace::ElasticTraceStats
maxPID : System
maxPrefetchDistance : Prefetcher::IndirectMemory
maxPriority : PlicOutput
maxReadyListSize : TraceCPU::ElasticDataGen::ElasticDataGenStatGroup
maxReqSize : DmaReadFifo
maxRequestors() : System
maxRoutingTableSizeCheck : CoherentXBar
maxSeqCountPerRank : DramRotGen
maxSgprs : Wavefront
maxSize : CircleBuf< T >
maxsize() : PacketFifo
maxSize() : sc_core::sc_port_base , sc_gem5::Port
maxSQEntries : LSQ< Impl >
MaxStandardOp : ArmSemihosting
maxTempStoreSize : ElasticTrace::ElasticTraceStats
MaxThreads : O3CPUImpl
maxTick : sc_gem5::Scheduler
maxTickEvent : sc_gem5::Scheduler
maxTickFunc() : sc_gem5::Scheduler
MaxTickPriority : sc_gem5::Scheduler
maxTokens : TokenManager
maxVal : GenericSatCounter< T >
maxVectorLength : Trace::TarmacParserRecord
maxVgprs : Wavefront
maxVnicDistance : Sinic::Device::DeviceStats
maxWaveRequests : GlobalMemPipeline
MaxWidth : O3CPUImpl
mb : PowerISA::IntRotateOp
mBaseAddress : CoreDecouplingLTInitiator , SimpleATInitiator1 , SimpleATInitiator2 , SimpleLTInitiator1 , SimpleLTInitiator1_dmi , SimpleLTInitiator2 , SimpleLTInitiator2_dmi , SimpleLTInitiator3 , SimpleLTInitiator3_dmi , SimpleLTInitiator_ext
mBeginRequestEvent : SimpleBusAT< NR_OF_INITIATORS, NR_OF_TARGETS >
mBeginResponseEvent : SimpleATTarget1 , SimpleATTarget2 , SimpleBusAT< NR_OF_INITIATORS, NR_OF_TARGETS >
mc : MSICAP
MC146818() : MC146818
mcause : RiscvISA::RemoteGDB::RiscvGdbRegCache
MciCtl : RealViewCtrl
mcounteren : RiscvISA::RemoteGDB::RiscvGdbRegCache
mcr : Uart8250::Registers
McrMrcImplDefined() : McrMrcImplDefined
McrMrcMiscInst() : McrMrcMiscInst
McrrOp() : McrrOp
mCurrentTransaction : ExplicitATTarget , SimpleATInitiator1 , SimpleATInitiator2
md : MSICAP
md5() : Net::TcpOpt
mData : CoreDecouplingLTInitiator , SimpleATInitiator1::MyTransaction< DT > , SimpleATInitiator2::MyTransaction< DT > , SimpleLTInitiator1 , SimpleLTInitiator1_dmi , SimpleLTInitiator2 , SimpleLTInitiator2_dmi , SimpleLTInitiator3 , SimpleLTInitiator3_dmi , SimpleLTInitiator_ext
mday : MC146818
mde : ArmISA::SelfDebug
mdic : iGbReg::Regs
mDMIData : SimpleLTInitiator1_dmi , SimpleLTInitiator_ext
mDMIDataReads : SimpleLTInitiator2_dmi , SimpleLTInitiator3_dmi
mDMIDataWrites : SimpleLTInitiator2_dmi , SimpleLTInitiator3_dmi
me : PowerISA::IntRotateOp
meanDistance : X86ISA::GpuTLB::AccessInfo
mear : dp_regs
medConf : StatisticalCorrector::BranchInfo , TAGE_SC_L_TAGE::BranchInfo
medeleg : RiscvISA::RemoteGDB::RiscvGdbRegCache
MediaOpBase() : X86ISA::MediaOpBase
MediaOpImm() : X86ISA::MediaOpImm
MediaOpReg() : X86ISA::MediaOpReg
mem : AbstractMemory::MemStats
mem_side_port : SerialLink , SerialLink::SerialLinkResponsePort
mem_size : MipsAccess
MEM_SWAP : Request
MEM_SWAP_COND : Request
mem_unit : ArmLinux32::tgt_sysinfo , ArmLinux64::tgt_sysinfo , MipsLinux::tgt_sysinfo , RiscvLinux32::tgt_sysinfo , RiscvLinux64::tgt_sysinfo , Sparc32Linux::tgt_sysinfo , SparcLinux::tgt_sysinfo , X86Linux32::tgt_sysinfo , X86Linux64::tgt_sysinfo
mem_valid : Trace::InstRecord
memAccessFlags : ArmISA::Memory64 , ArmISA::MicroMemOp , ArmISA::MicroMemPairOp , ArmISA::MicroNeonMemOp , ArmISA::SveContigMemSI , ArmISA::SveContigMemSS , ArmISA::SveMemPredFillSpill , ArmISA::SveMemVecFillSpill , PowerISA::MemOp , RiscvISA::AtomicMemOpMicro , RiscvISA::LoadReservedMicro , RiscvISA::MemInst , RiscvISA::StoreCondMicro
MemAccPredicate : BaseDynInst< Impl >
memAccPredicate : Minor::MinorDynInst , SimpleThread
memAddr() : GenericPciHost , PciHost::DeviceInterface , PciHost
memAllocCounter : DependencyGraph< DynInstPtr >
memAttr() : ArmISA::TableWalker::LongDescriptor
memattr : StreamTableEntry
memAttrs() : ArmISA::TableWalker
memAttrsAArch64() : ArmISA::TableWalker
memAttrsLPAE() : ArmISA::TableWalker
MemBackdoor() : MemBackdoor
memBackdoors : DmaPort , NonCachingSimpleCPU
membars : DefaultCommit< Impl >::CommitStats
members : ClockDomain
MemberType : sc_core::sc_member_access< Element, Access > , sc_core::sc_vector_assembly< T, MT >
MemChecker() : MemChecker
memchecker : MemCheckerMonitor
MemCheckerMonitor() : MemCheckerMonitor
MemCheckerMonitorSenderState() : MemCheckerMonitor::MemCheckerMonitorSenderState
MemCmd() : MemCmd
MemCompleteEvent : GarnetSyntheticTraffic
MemCtrl() : MemCtrl , QoS::MemCtrl
memCtrl : QoS::MemCtrl::MemCtrlStats , QoS::Policy , QoS::QueuePolicy , QoS::TurnaroundPolicy
MemCtrlStats() : QoS::MemCtrl::MemCtrlStats
memData : BaseDynInst< Impl >
MemDelay() : MemDelay
MemDepEntry() : MemDepUnit< MemDepPred, Impl >::MemDepEntry
MemDepEntryPtr : MemDepUnit< MemDepPred, Impl >
MemDepHash : MemDepUnit< MemDepPred, Impl >
memDepHash : MemDepUnit< MemDepPred, Impl >
MemDepHashIt : MemDepUnit< MemDepPred, Impl >
memDeps : MemDepUnit< MemDepPred, Impl >::MemDepEntry
MemDepUnit : InstructionQueue< Impl >
memDepUnit : InstructionQueue< Impl >
MemDepUnit() : MemDepUnit< MemDepPred, Impl > , SimpleCPUPolicy< Impl >
MemDepUnitStats() : MemDepUnit< MemDepPred, Impl >::MemDepUnitStats
memDepViolator : LSQUnit< Impl >
MemDispOp() : PowerISA::MemDispOp
MemEntry() : Trace::TarmacBaseRecord::MemEntry
MemFenceMicro() : RiscvISA::MemFenceMicro
MemFenceReq : MemCmd
MemFenceResp : MemCmd
memFlags : X86ISA::MemOp
MemFootprintProbe() : MemFootprintProbe
MemFootprintProbeStats() : MemFootprintProbe::MemFootprintProbeStats
MemImm() : SparcISA::MemImm
MemInst() : RiscvISA::MemInst
memInstsIssued : InstructionQueue< Impl >::IQStats
MemInterface() : MemInterface
memInvalidate() : BaseCache , BaseTLB , SimObject
MemObject() : MemObject
MemOp() : PowerISA::MemOp , X86ISA::MemOp
memOpDone() : BaseDynInst< Impl >
MemOpDone : BaseDynInst< Impl >
memOpsPred : StoreSet
memOrderViolation : LSQUnit< Impl >::LSQUnitStats
memOrderViolationEvents : DefaultIEW< Impl >::IEWStats
memories : PhysicalMemory
Memory() : ArmISA::Memory
memory : DRAMSim2::MemoryPort , DRAMsim3::MemoryPort , memory , QoS::MemSinkCtrl::MemoryPort , SimpleMemory::MemoryPort
Memory64() : ArmISA::Memory64
memory_exception_data : kfd_event_data
MemoryAtomicPair64() : ArmISA::MemoryAtomicPair64
memoryCommitLimit : Minor::Execute
MemoryDImm() : ArmISA::MemoryDImm
MemoryDImm64() : ArmISA::MemoryDImm64
MemoryDImmEx64() : ArmISA::MemoryDImmEx64
MemoryDReg() : ArmISA::MemoryDReg
MemoryEx64() : ArmISA::MemoryEx64
MemoryExDImm() : ArmISA::MemoryExDImm
MemoryExImm() : ArmISA::MemoryExImm
MemoryImage() : Loader::MemoryImage
MemoryImm() : ArmISA::MemoryImm
MemoryImm64() : ArmISA::MemoryImm64
memoryIssueLimit : Minor::Execute
MemoryLiteral64() : ArmISA::MemoryLiteral64
MemoryManager() : Gem5SystemC::MemoryManager
memoryMode : System
MemoryNeedsRetry : Minor::LSQ
MemoryOffset() : ArmISA::MemoryOffset< Base >
memoryPacketSize : QoS::MemSinkCtrl
memoryPort : AbstractController
MemoryPort() : AbstractController::MemoryPort , DRAMSim2::MemoryPort , DRAMsim3::MemoryPort , MemCtrl::MemoryPort , QoS::MemSinkCtrl::MemoryPort , SimpleMemory::MemoryPort
MemoryPostIndex() : ArmISA::MemoryPostIndex< Base >
MemoryPostIndex64() : ArmISA::MemoryPostIndex64
MemoryPreIndex() : ArmISA::MemoryPreIndex< Base >
MemoryPreIndex64() : ArmISA::MemoryPreIndex64
MemoryRaw64() : ArmISA::MemoryRaw64
MemoryReg() : ArmISA::MemoryReg
MemoryReg64() : ArmISA::MemoryReg64
MemoryRunning : Minor::LSQ
memorySlots : KvmVM
memorySpaces : Iris::ThreadContext
MemoryState : Minor::LSQ
MemoryType : ArmISA::TlbEntry
MemPacket() : MemPacket
memPort : ComputeUnit , SimpleCache , SimpleMemobj
memPortTokens : ComputeUnit
memProxy : Gicv3Redistributor , VirtDescriptor , VirtQueue
MemPtr : Trace::TarmacTracer , Trace::TarmacTracerRecord
memQueue : Trace::TarmacTracer
memReadCallback : UFSHostDevice::UFSSCSIDevice
memRecord : Trace::TarmacParserRecord
memRefs : DefaultCommit< Impl >::CommitStats
memReq : DefaultFetch< Impl > , Trace::TarmacParserRecord
MemReqEvent() : ComputeUnit::ScalarDataPort::MemReqEvent
memReqFlags : BaseDynInst< Impl >
memRequestPort : RubyPort
MemRequestPort() : RubyPort::MemRequestPort
memReserve : ArmSemihosting
memResponsePort : RubyPort
MemResponsePort() : RubyPort::MemResponsePort
memSchedPolicy : MemCtrl
memsetBlob() : PortProxy
memsetBlobPhys() : PortProxy
memSidePort : AddrMapper , BaseCache
MemSidePort() : BaseCache::MemSidePort
memSidePort : Bridge::BridgeResponsePort , Bridge , CommMonitor , MemCheckerMonitor , ReqPacketQueue
MemSidePort() : SimpleCache::MemSidePort , SimpleMemobj::MemSidePort
memSidePort : SnoopRespPacketQueue , TLBCoalescer
MemSidePort() : TLBCoalescer::MemSidePort
memSidePort : X86ISA::GpuTLB
MemSidePort() : X86ISA::GpuTLB::MemSidePort
memSidePorts : BaseXBar
MemSinkCtrl() : QoS::MemSinkCtrl
MemSinkCtrlStats() : QoS::MemSinkCtrl::MemSinkCtrlStats
memSize() : AtagMem , System
MemSlot() : KvmVM::MemSlot
memStart() : AtagMem
MemState() : MemState
memState : Process
MemStats() : AbstractMemory::MemStats
memStatusVector : GPUDynInst
MemSyncReq : MemCmd
MemSyncResp : MemCmd
memtest : MemTest::CpuPort
MemTest() : MemTest
MemTestStats() : MemTest::MemTestStats
memTraceBusy : Wavefront
MemTraceProbe() : MemTraceProbe
memWrCheck : Trace::TarmacParser
memWriteback() : BaseCache , MinorCPU , RubySystem , SimObject
memWriteCallback : UFSHostDevice::UFSSCSIDevice
mEndEvent : SimpleLTInitiator1 , SimpleLTInitiator1_dmi , SimpleLTInitiator2 , SimpleLTInitiator2_dmi , SimpleLTInitiator3 , SimpleLTInitiator3_dmi , SimpleLTInitiator_ext
mEndRequestEvent : SimpleATTarget1 , SimpleBusAT< NR_OF_INITIATORS, NR_OF_TARGETS >
mEndRequestPhase : SimpleATInitiator1 , SimpleATInitiator2
mEndRequestQueue : SimpleATTarget1
mEndResponseEvent : SimpleATInitiator1 , SimpleATTarget1 , SimpleATTarget2 , SimpleBusAT< NR_OF_INITIATORS, NR_OF_TARGETS >
mEndResponseQueue : SimpleATInitiator1
mepc : RiscvISA::RemoteGDB::RiscvGdbRegCache
merge() : BloomFilter::Base , BloomFilter::Multi , BloomFilter::Perfect , X86ISA::X86StaticInst
mergeCCEntry() : Trace::TarmacTracerRecord
mergedParent : Stats::Group
mergedStatGroups : Stats::Group
mergedWrBursts : MemCtrl::CtrlStats
mergeFrom() : SubBlock
mergeRegs() : GenericSyscallABI32
mergeStatGroup() : Stats::Group
mergesWith() : AddrRange , VMA
mergeTe() : ArmISA::Stage2LookUp
mergeTo() : SubBlock
message : CxxConfigManager::Exception , GenericISA::M5DebugFault , GoodbyeObject , I2CBus
Message() : Message
message : UFSHostDevice::SCSIReply
messageAttributes() : SCMI::BaseProtocol , SCMI::Protocol
MessageBuffer() : MessageBuffer
messageEnqueuedThisCycle : NetworkInterface::InputPort
messageID() : SCMI::Platform
MessageSizeType_to_int() : Network
messageType() : SCMI::Platform
metadata_ptr : kfd_ioctl_get_dmabuf_info_args
metadata_size : kfd_ioctl_get_dmabuf_info_args
metaGenerator : PyTrafficGen
Method() : sc_gem5::Method
method : Stats::MethodProxy< T, V > , Stats::ValueBase< Derived >
MethodPointer : Stats::MethodProxy< T, V >
MethodProxy() : Stats::MethodProxy< T, V >
mev : StreamTableEntry
mhartid : RiscvISA::RemoteGDB::RiscvGdbRegCache
MHU() : MHU , MhuDoorbell
MHU_SCFG : MHU
MhuDoorbell() : MhuDoorbell
mibc : dp_regs
microArchitectureEventSet : ArmISA::PMU::RegularEvent
microcodeRom : X86ISA::Decoder
MicrocodeRom() : X86ISAInst::MicrocodeRom
MicroIntImmOp() : ArmISA::MicroIntImmOp
MicroIntImmXOp() : ArmISA::MicroIntImmXOp
MicroIntMov() : ArmISA::MicroIntMov
MicroIntOffset : SparcISA::ISA
MicroIntOp() : ArmISA::MicroIntOp
MicroIntRegOp() : ArmISA::MicroIntRegOp
MicroIntRegXOp() : ArmISA::MicroIntRegXOp
MicroMemOp() : ArmISA::MicroMemOp
MicroMemPairOp() : ArmISA::MicroMemPairOp
MicroNeonMemOp() : ArmISA::MicroNeonMemOp
MicroNeonMixLaneOp() : ArmISA::MicroNeonMixLaneOp
MicroNeonMixLaneOp64() : ArmISA::MicroNeonMixLaneOp64
MicroNeonMixOp() : ArmISA::MicroNeonMixOp
MicroNeonMixOp64() : ArmISA::MicroNeonMixOp64
MicroOp() : ArmISA::MicroOp
microOpCount : TraceCPU::ElasticDataGen::InputStream
microopPC : Minor::Decode::DecodeThreadInfo
microOps : ArmISA::PredMacroOp
microops : RiscvISA::RiscvMacroInst , SparcISA::SparcMacroInst , X86ISA::MacroopBase
MicroOpX() : ArmISA::MicroOpX
microPC() : BaseDynInst< Impl > , CheckerCPU , CheckerThreadContext< TC > , DefaultCommit< Impl > , FullO3CPU< Impl > , GenericISA::DelaySlotUPCState< MachInst > , GenericISA::PCStateBase , GenericISA::UPCState< MachInst > , Iris::ThreadContext , O3ThreadContext< Impl > , SimpleThread , ThreadContext
microseconds : pcap_pkthdr
MicroSetPCCPSR() : ArmISA::MicroSetPCCPSR
MicroTcommit64() : ArmISAInst::MicroTcommit64
MicroTfence64() : ArmISAInst::MicroTfence64
microTLB : SMMUv3DeviceInterface
microTLBEnable : SMMUv3DeviceInterface
microTLBLat : SMMUv3DeviceInterface
microTLBLookup() : SMMUTranslationProcess
microTLBSem : SMMUv3DeviceInterface
microTLBUpdate() : SMMUTranslationProcess
MicroTmeBasic64() : ArmISAInst::MicroTmeBasic64
MicroTmeOp() : ArmISAInst::MicroTmeOp
mid : MSICAP , RiscvISA::Decoder
mideleg : RiscvISA::RemoteGDB::RiscvGdbRegCache
mie : RiscvISA::RemoteGDB::RiscvGdbRegCache
MightBeMicro() : ArmISA::MightBeMicro
MightBeMicro64() : ArmISA::MightBeMicro64
mimpid : RiscvISA::RemoteGDB::RiscvGdbRegCache
min : MC146818 , Stats::DistData , Stats::DistStor::Params
min_alrm : MC146818
min_bucket : Stats::HistStor
min_track : Stats::DistStor
min_val : Stats::DistData , Stats::DistStor
minAddr() : Loader::MemoryImage
minAllocatedElements() : DynPoolManager , SimplePoolManager
minAllocation() : PoolManager
minBankPrep() : DRAMInterface
mine : ExtensionPool< T >
minHist : TAGEBase
Minimum_Pri : EventBase
minimumCommitCycle : Minor::MinorDynInst
minor_version : kfd_ioctl_get_version_args
MinorActivityRecorder() : Minor::MinorActivityRecorder
MinorBuffer() : Minor::MinorBuffer< ElemType, ReportTraits, BubbleTraits >
MinorCPU() : MinorCPU
MinorCPUPort() : MinorCPU::MinorCPUPort
MinorDynInst() : Minor::MinorDynInst
MinorFU() : MinorFU
MinorFUPool() : MinorFUPool
MinorFUTiming() : MinorFUTiming
MinorOpClass() : MinorOpClass
MinorOpClassSet() : MinorOpClassSet
MinorStats() : Minor::MinorStats
minorTrace() : Minor::Decode , Minor::Execute , Minor::Fetch1 , Minor::Fetch2 , Minor::InputBuffer< ElemType, ReportTraits, BubbleTraits > , Minor::Latch< Data > , Minor::LSQ , Minor::LSQ::StoreBuffer , Minor::MinorActivityRecorder , Minor::MinorBuffer< ElemType, ReportTraits, BubbleTraits > , Minor::Pipeline , Minor::Queue< ElemType, ReportTraits, BubbleTraits > , Minor::Scoreboard
minorTraceInst() : Minor::MinorDynInst
minorTraceResponseLine() : Minor::Fetch1
minorVer : X86ISA::SMBios::BiosInformation
minorVersion : X86ISA::SMBios::SMBiosTable::SMBiosHeader
minPeriod : HybridGen , StochasticGen
minReadToWriteDataGap() : MemCtrl , MemInterface
minTrackedSize : FALRU::CacheTracking
minWritesPerSwitch : MemCtrl
minWriteToReadDataGap() : MemCtrl , MemInterface
mip : RiscvISA::RemoteGDB::RiscvGdbRegCache
MipsProcess() : MipsProcess
misa : RiscvISA::RemoteGDB::RiscvGdbRegCache
Misc : RealViewCtrl
miscInstsIssued : InstructionQueue< Impl >::IQStats
miscRead : MiscRegOp64
miscReg : McrMrcMiscInst , MiscRegImplDefined64
miscRegContext : ArmISA::TLB
miscRegFile : MipsISA::ISA , RiscvISA::ISA
miscRegFile_WriteMask : MipsISA::ISA
miscRegfileReads : FullO3CPU< Impl >::FullO3CPUStats
miscRegfileWrites : FullO3CPU< Impl >::FullO3CPUStats
miscRegIdMap : ArmV8KvmCPU
miscRegIds : Iris::ThreadContext , PhysRegFile
miscRegIdxNameMap : FastModel::CortexA76TC
miscRegIdxs : CheckerCPU
miscRegImm() : MiscRegImmOp64
MiscRegImmOp64() : MiscRegImmOp64
MiscRegImplDefined64() : MiscRegImplDefined64
MiscRegInfo() : ArmV8KvmCPU::MiscRegInfo
MiscRegLUTEntry() : ArmISA::ISA::MiscRegLUTEntry
MiscRegLUTEntryInitializer() : ArmISA::ISA::MiscRegLUTEntryInitializer
miscRegMap : ArmV8KvmCPU
MiscRegMap : Trace::TarmacParserRecord
miscRegMap : Trace::TarmacParserRecord
miscRegNames : MipsISA::ISA
MiscRegOp64() : MiscRegOp64
MiscRegRegImmOp() : MiscRegRegImmOp
MiscRegRegImmOp64() : MiscRegRegImmOp64
miscRegs : ArmISA::ISA , PowerISA::ISA
miscRegValid : ArmISA::TLB
miscStallCycles : DefaultFetch< Impl >::FetchStatGroup
mismatch : Trace::TarmacParserRecord , Trace::TarmacParserRecord::TarmacParserRecordEvent
mismatchOnPcOrOpcode : Trace::TarmacParserRecord , Trace::TarmacParserRecord::TarmacParserRecordEvent
mispredicted() : BaseDynInst< Impl >
mispredictInst : DefaultIEWDefaultCommit< Impl > , TimeBufStruct< Impl >::commitComm , TimeBufStruct< Impl >::decodeComm
mispredPC : DefaultIEWDefaultCommit< Impl > , TimeBufStruct< Impl >::decodeComm
misrouting : FaultModel
miss : Prefetcher::Base::PrefetchListener
MISS_RETURN : X86ISA::GpuTLB
missCount : BaseCache
misses : ArmISA::TLB::TlbStats , BaseCache::CacheCmdStats , FALRU::CacheTracking , RiscvISA::TLB::TlbStats , SimpleCache::SimpleCacheStats
missingTranslationQueueSize : Prefetcher::Queued
missLatency : BaseCache::CacheCmdStats , SimpleCache::SimpleCacheStats
missLatency1 : X86ISA::GpuTLB
missLatency2 : X86ISA::GpuTLB
missRate : BaseCache::CacheCmdStats
missTime : SimpleCache
mm() : mm
mmap() : EmulatedDriver , HSADriver , Shader
mmap_offset : kfd_ioctl_alloc_memory_of_gpu_args , kfd_ioctl_ipc_import_handle_args
mmapFlagTable : ArmLinux64 , SparcSolaris , X86Linux32
mmapGrowsDown() : Process , RiscvProcess
mmapPerf() : PerfKvmCounter
mmapUsingNoReserve : PhysicalMemory
mmask : MSICAP
mMask : WriteMask
MmDisk() : MmDisk
mMem : ExplicitATTarget , ExplicitLTTarget , SimpleATTarget1 , SimpleATTarget2 , SimpleLTTarget1 , SimpleLTTarget2 , SimpleLTTarget_ext
mmioRing : BaseKvmCPU
MmioVirtIO() : MmioVirtIO
MMMM : Compressor::CPack
MMMMPenultimate : Compressor::FPCD
MMMMPrevious : Compressor::FPCD
MMMX : Compressor::CPack
MMMXPenultimate : Compressor::FPCD
MMMXPrevious : Compressor::FPCD
MMU() : ArmISA::MMU
mmu : CheckerCPU , FullO3CPU< Impl >
MMU() : Iris::MMU , MipsISA::MMU , PowerISA::MMU , RiscvISA::MMU
mmu : SimpleThread
MMU() : SparcISA::MMU , SparcISA::TLB , X86ISA::MMU
mmx : Trace::X86NativeTrace::ThreadState
MMXX : Compressor::CPack
MMXXPenultimate : Compressor::FPCD
MMXXPrevious : Compressor::FPCD
mnem : X86ISA::X86FaultBase
mnemonic : ArmISA::UndefinedInstruction , StaticInst , X86ISA::X86FaultBase
mNrOfTransactions : CoreDecouplingLTInitiator , SimpleATInitiator1 , SimpleATInitiator2 , SimpleLTInitiator1 , SimpleLTInitiator1_dmi , SimpleLTInitiator2 , SimpleLTInitiator2_dmi , SimpleLTInitiator3 , SimpleLTInitiator3_dmi , SimpleLTInitiator_ext
MockInfo() : MockInfo
mod : X86ISA::IntelMP::CompatAddrSpaceMod
mod_histories : MultiperspectivePerceptron::ThreadData
mod_signed_friend : sc_dt::sc_signed
mod_unsigned_friend : sc_dt::sc_unsigned
mode : ArmISA::RfeOp , ArmISA::SrsOp , ArmISA::Stage2LookUp , ArmISA::TableWalker::WalkerState , ArmSemihosting::FileBase
Mode : BaseTLB
mode : Intel8254Timer::Counter , Intel8254Timer , RenameMode< ISA > , RenameMode< ArmISA::ISA > , RiscvISA::Walker::WalkerState , Trace::TarmacBaseRecord::InstEntry , WholeTranslationState , WriteAllocator , X86ISA::Decoder , X86ISA::ExtMachInst
Mode : X86ISA::GpuTLB
mode : X86ISA::I8259 , X86ISA::Walker::WalkerState
mode1 : MaltaIO
mode2 : MaltaIO
mode_t : RiscvLinux64 , Solaris
modeReg : X86ISA::I8237
ModeVal : Intel8254Timer
modghist_length : MultiperspectivePerceptron
MODHIST() : MultiperspectivePerceptron::MODHIST
modhist_indices : MultiperspectivePerceptron
modhist_lengths : MultiperspectivePerceptron
modpath : EmbeddedPython
MODPATH() : MultiperspectivePerceptron::MODPATH
modpath_histories : MultiperspectivePerceptron::ThreadData
modpath_indices : MultiperspectivePerceptron
modpath_lengths : MultiperspectivePerceptron
modRM : X86ISA::ExtMachInst
ModRMState : X86ISA::Decoder
Module() : sc_gem5::Module
mon() : ArmISA::ISA::MiscRegLUTEntryInitializer , CommMonitor::MonitorRequestPort , CommMonitor::MonitorResponsePort , MC146818 , MemCheckerMonitor::MonitorRequestPort , MemCheckerMonitor::MonitorResponsePort
monE2H() : ArmISA::ISA::MiscRegLUTEntryInitializer
monE2HRead() : ArmISA::ISA::MiscRegLUTEntryInitializer
monE2HWrite() : ArmISA::ISA::MiscRegLUTEntryInitializer
MonitorRequestPort() : CommMonitor::MonitorRequestPort , MemCheckerMonitor::MonitorRequestPort
MonitorResponsePort() : CommMonitor::MonitorResponsePort , MemCheckerMonitor::MonitorResponsePort
MonitorStats() : CommMonitor::MonitorStats
monNonSecure() : ArmISA::ISA::MiscRegLUTEntryInitializer
monNonSecureRead() : ArmISA::ISA::MiscRegLUTEntryInitializer
monNonSecureWrite() : ArmISA::ISA::MiscRegLUTEntryInitializer
monSecure() : ArmISA::ISA::MiscRegLUTEntryInitializer
monSecureRead() : ArmISA::ISA::MiscRegLUTEntryInitializer
monSecureWrite() : ArmISA::ISA::MiscRegLUTEntryInitializer
more : RiscvISA::Decoder
moreBytes() : ArmISA::Decoder , MipsISA::Decoder , PowerISA::Decoder , RiscvISA::Decoder , SparcISA::Decoder , X86ISA::Decoder
moreToWb : IGbE::DescCache< T >
mouse : VncInput , X86ISA::I8042
mouseAt() : PS2TouchKit , VncMouse
MouseEvents : VncServer
mouseFullInt : X86ISA::I8042
mouseIntPin : X86ISA::I8042
MouseLeftButton : VncServer
MouseMiddleButton : VncServer
mouseOutputFull : X86ISA::I8042
MouseRightButton : VncServer
movall() : ItsCommand
MOVALL : ItsCommand
move() : Loader::MemoryImage
moveAllPendingState() : Gicv3Its
moveBlock() : BaseSetAssoc , BaseTags , FALRU , SectorTags
moveBlockToHead() : FALRU::CacheTracking
moveBlockToTail() : FALRU::CacheTracking
moveContractions : BaseCache
moveFromRequestsToTransfers() : Minor::Fetch1 , Minor::LSQ
moveToFront() : MSHRQueue
moveToHead() : FALRU
moveToReady() : MemDepUnit< MemDepPred, Impl >
moveToTail() : FALRU
moveToYoungerInst() : InstructionQueue< Impl >
MOVI : ItsCommand
movi() : ItsCommand
mpba : MSIXCAP
mpConfigTable : X86ISA::FsWorkload
mpend : MSICAP
mPendingTransactions : SimpleBusAT< NR_OF_INITIATORS, NR_OF_TARGETS >
mpFloatingPointer : X86ISA::FsWorkload
MPID_MSK : FVPBasePwrCtrl
mpp : MultiperspectivePerceptron::HistorySpec
MPP_LoopPredictor() : MPP_LoopPredictor
MPP_LoopPredictor_8KB() : MPP_LoopPredictor_8KB
MPP_SCThreadHistory() : MPP_StatisticalCorrector::MPP_SCThreadHistory
MPP_StatisticalCorrector() : MPP_StatisticalCorrector
MPP_StatisticalCorrector_64KB() : MPP_StatisticalCorrector_64KB
MPP_StatisticalCorrector_8KB() : MPP_StatisticalCorrector_8KB
MPP_TAGE() : MPP_TAGE
MPP_TAGE_8KB() : MPP_TAGE_8KB
MPPBranchInfo() : MultiperspectivePerceptron::MPPBranchInfo
MPPTAGEBranchInfo() : MultiperspectivePerceptronTAGE::MPPTAGEBranchInfo
mpreds : MultiperspectivePerceptron::ThreadData
MQDDmaEvent() : GPUCommandProcessor::MQDDmaEvent
mQuantumKeeper : CoreDecouplingLTInitiator
mRequestPEQ : SimpleBusAT< NR_OF_INITIATORS, NR_OF_TARGETS >
mResponseEvent : ExplicitATTarget
mResponsePEQ : SimpleBusAT< NR_OF_INITIATORS, NR_OF_TARGETS >
mResponseQueue : SimpleATTarget1 , SimpleATTarget2
MrrcOp() : MrrcOp
MrsOp() : MrsOp
MRU() : ReplacementPolicy::MRU
MRUReplData() : ReplacementPolicy::MRU::MRUReplData
MSB : Intel8254Timer::Counter
msb() : sc_dt::scfx_ieee_double
MsbOnly : Intel8254Timer
msbShift : SkewedAssociative
mscratch : RiscvISA::RemoteGDB::RiscvGdbRegCache
msec() : Time
msg_data : MSIXTable
msgBuffer : SCMI::VirtualChannel
MsgBufType : AbstractController
msgSize : flit , UFSHostDevice::SCSIReply
msgType : DistHeaderPkt::Header
MsgType : DistHeaderPkt , DistIface
MsgVecType : AbstractController
MSHR() : MSHR
mshrHits : BaseCache::CacheCmdStats
mshrMisses : BaseCache::CacheCmdStats
mshrMissLatency : BaseCache::CacheCmdStats
mshrMissRate : BaseCache::CacheCmdStats
mshrQueue : BaseCache
MSHRQueue : MSHR , MSHRQueue
MSHRQueue_MSHRs : BaseCache
MSHRQueue_WriteBuffer : BaseCache
MSHRQueueIndex : BaseCache
mshrUncacheable : BaseCache::CacheCmdStats
mshrUncacheableLatency : BaseCache::CacheCmdStats
msi : Uart8250
MSI_SETSPI_NSR : Gicv2m
MSI_TYPER : Gicv2m
msicap : PciDevice
MSICAP_BASE : PciDevice
msip : Clint::ClintRegisters
msix_pba : PciDevice
MSIX_PBA_END : PciDevice
MSIX_PBA_OFFSET : PciDevice
msix_table : PciDevice
MSIX_TABLE_END : PciDevice
MSIX_TABLE_OFFSET : PciDevice
msixcap : PciDevice
MSIXCAP_BASE : PciDevice
MSIXCAP_ID_OFFSET : PciDevice
MSIXCAP_MPBA_OFFSET : PciDevice
MSIXCAP_MTAB_OFFSET : PciDevice
MSIXCAP_MXC_OFFSET : PciDevice
mSize : WriteMask
msr : PowerISA::RemoteGDB::PowerGdbRegCache , Uart8250::Registers
MsrBase() : MsrBase
MsrImmOp() : MsrImmOp
MsrRegOp() : MsrRegOp
mss() : Net::TcpOpt
mState : Trace::ArmNativeTrace , Trace::X86NativeTrace
mstatus : RiscvISA::RemoteGDB::RiscvGdbRegCache
mtab : MSIXCAP
mtcfg : StreamTableEntry
mtime : Clint::ClintRegisters
mtimecmp : Clint::ClintRegisters
mtimecmpStart : Clint::ClintRegisters
mtimeStart : Clint::ClintRegisters
mTransactionCount : CoreDecouplingLTInitiator , SimpleATInitiator1 , SimpleATInitiator2 , SimpleLTInitiator1 , SimpleLTInitiator1_dmi , SimpleLTInitiator2 , SimpleLTInitiator2_dmi , SimpleLTInitiator3 , SimpleLTInitiator3_dmi , SimpleLTInitiator_ext
mtup() : Net::IpOpt
mtur() : Net::IpOpt
mtval : RiscvISA::RemoteGDB::RiscvGdbRegCache
mtvec : RiscvISA::RemoteGDB::RiscvGdbRegCache
mtype : ArmISA::TlbEntry
mType : Gcn3ISA::BufferRsrcDescriptor , NetworkBridge
mua : MSICAP
mul_signed_friend : sc_dt::sc_signed
mul_unsigned_friend : sc_dt::sc_unsigned
mult : ArmISA::SveAdrOp
Mult3() : ArmISA::Mult3
Mult4() : ArmISA::Mult4
mult_scfx_rep : sc_dt::scfx_rep
multHi() : X86ISA::MediaOpBase
Multi() : BloomFilter::Multi , Compressor::Base , Compressor::Multi , Prefetcher::Multi
multi_init_base() : tlm_utils::multi_init_base< BUSWIDTH, TYPES, N, POL >
multi_passthrough_initiator_socket() : tlm_utils::multi_passthrough_initiator_socket< MODULE, BUSWIDTH, TYPES, N, POL >
multi_passthrough_initiator_socket_optional() : tlm_utils::multi_passthrough_initiator_socket_optional< MODULE, BUSWIDTH, TYPES, N >
multi_passthrough_target_socket() : tlm_utils::multi_passthrough_target_socket< MODULE, BUSWIDTH, TYPES, N, POL >
multi_passthrough_target_socket_optional() : tlm_utils::multi_passthrough_target_socket_optional< MODULE, BUSWIDTH, TYPES, N >
multi_target_base() : tlm_utils::multi_target_base< BUSWIDTH, TYPES, N, POL >
MultiBitSel() : BloomFilter::MultiBitSel
multicast() : Net::EthAddr
multicastHashEnable : NSGigE
MultiCompData() : Compressor::Multi::MultiCompData
MultiLevelPageTable() : MultiLevelPageTable< EntryTypes >
MultiperspectivePerceptron() : MultiperspectivePerceptron
MultiperspectivePerceptron64KB() : MultiperspectivePerceptron64KB
MultiperspectivePerceptron8KB() : MultiperspectivePerceptron8KB
MultiperspectivePerceptronTAGE() : MultiperspectivePerceptronTAGE
MultiperspectivePerceptronTAGE64KB() : MultiperspectivePerceptronTAGE64KB
MultiperspectivePerceptronTAGE8KB() : MultiperspectivePerceptronTAGE8KB
multiply : sc_dt::scfx_rep
multiply_by_ten() : sc_dt::scfx_rep
multiProc : ArmSystem
MultiResult() : InstResult::MultiResult
MultiSocketSimpleSwitchAT() : MultiSocketSimpleSwitchAT
multiStats : Compressor::Multi
MultiStats() : Compressor::Multi::MultiStats
multiThread : System
MUST_EXPORT : Gcn3ISA::StatusReg
mustCheckAbove() : Packet
mustRetry : StubSlavePort
mustSendRetry : BaseCache::CacheResponsePort
mutex() : ArmISA::ISA::MiscRegLUTEntryInitializer , tlm::tlm_transport_to_master< REQ, RSP >
MuxingKvmGic() : MuxingKvmGic
mvendorid : RiscvISA::RemoteGDB::RiscvGdbRegCache
mVnets : BasicLink , NetworkLink
mwait() : BaseCPU , BaseDynInst< Impl > , CheckerCPU , ExecContext , Minor::ExecContext , SimpleExecContext
mwaitAtomic() : BaseCPU , BaseDynInst< Impl > , CheckerCPU , ExecContext , Minor::ExecContext , SimpleExecContext
mxc : MSIXCAP
mxcsr : FXSave
mxcsr_mask : FXSave
mxid : MSIXCAP
my_extension() : my_extension
myBTransport() : ExplicitLTTarget , SimpleLTTarget2
MyClass : LaneData< LS > , VecLaneT< VecElem, Const > , VecPredRegContainer< NumBits, Packed > , VecPredRegT< VecElem, NumElems, Packed, Const > , VecRegContainer< SIZE > , VecRegT< VecElem, NumElems, Const >
myGetDMIPtr() : SimpleLTTarget2 , SimpleLTTarget_ext
myName : HelloObject , SMMUProcess
myNBTransport() : ExplicitATTarget , SimpleATInitiator1 , SimpleATInitiator2 , SimpleATTarget1 , SimpleATTarget2 , SimpleLTInitiator_ext , SimpleLTTarget2 , SimpleLTTarget_ext
mystream : Stats::Text
MyTransaction() : SimpleATInitiator1::MyTransaction< DT > , SimpleATInitiator2::MyTransaction< DT >
mytransaction_type : SimpleATInitiator1 , SimpleATInitiator2