- u -

• uAdvance() : GenericISA::DelaySlotUPCState< MachInst > , GenericISA::UPCState< MachInst >
• Uart() : Uart
• Uart8250() : Uart8250
• UdpPtr() : Net::UdpPtr
• uEnd() : GenericISA::DelaySlotUPCState< MachInst > , GenericISA::UPCState< MachInst > , X86ISA::PCState
• UFSHostDevice() : UFSHostDevice
• UFSHostDeviceStats() : UFSHostDevice::UFSHostDeviceStats
• UFSSCSIDevice() : UFSHostDevice::UFSSCSIDevice
• uid() : Process
• UnaryNode() : Stats::UnaryNode< Op >
• unaryOp() : ArmISA::FpOp
• unbind() : EtherInt , IntSinkPinBase , IntSourcePinBase , Port , RequestPort , ResponsePort , RubyDummyPort , sc_gem5::ScExportWrapper< IF > , sc_gem5::ScInterfaceWrapper< IF > , sc_gem5::ScPortWrapper< IF > , sc_gem5::TlmInitiatorBaseWrapper< BUSWIDTH, FW_IF, BW_IF, N, POL > , sc_gem5::TlmTargetBaseWrapper< BUSWIDTH, FW_IF, BW_IF, N, POL > , tlm::tlm_analysis_port< T > , TokenRequestPort , TokenResponsePort
• unblock() : AbstractController , DefaultDecode< Impl > , DefaultIEW< Impl > , DefaultRename< Impl >
• uncacheable() : X86ISA::LongModePTE
• UncoalescedTable() : UncoalescedTable
• Uncompressed() : Compressor::FPC::Uncompressed
• UncompressedPattern() : Compressor::DictionaryCompressor< T >::UncompressedPattern
• uncondBranch() : BiModeBP , BPredUnit , LocalBP , MultiperspectivePerceptron , MultiperspectivePerceptronTAGE , TAGE , TournamentBP
• UncontendedMutex() : UncontendedMutex
• undefinedFault32() : ArmISA::ArmStaticInst
• undefinedFault64() : ArmISA::ArmStaticInst
• UndefinedInstruction() : ArmISA::UndefinedInstruction
• underrun() : BasePixelPump
• unforceParent() : sc_core::sc_vector_base
• unicast() : Net::EthAddr
• UnifiedFreeList() : UnifiedFreeList
• UnifiedRenameMap() : UnifiedRenameMap
• UnimpFault() : UnimpFault
• unimplemented() : ArmISA::ISA::MiscRegLUTEntryInitializer
• UnimplementedFault() : RiscvISA::UnimplementedFault
• UnimplementedOpcodeFault() : PowerISA::UnimplementedOpcodeFault
• uninstallBp() : Iris::ThreadContext
• uniqueName() : sc_gem5::Module , sc_gem5::Process
• unit() : sc_core::sc_time_tuple , Stats::DataWrap< Derived, InfoProxyType >
• unit_symbol() : sc_core::sc_time_tuple
• UnitFilterEntry() : RubyPrefetcher::UnitFilterEntry
• Unknown() : RiscvISA::Unknown , SparcISA::Unknown
• UnknownInstFault() : RiscvISA::UnknownInstFault
• UnknownOp() : UnknownOp
• UnknownOp64() : UnknownOp64
• unlock() : EventQueue , sc_core::sc_mutex , sc_core::sc_mutex_if , UncontendedMutex
• unlock_observer() : sc_dt::sc_fxnum , sc_dt::sc_fxnum_fast , sc_dt::sc_fxval , sc_dt::sc_fxval_fast
• unmap() : EmulationPageTable , MultiLevelPageTable< EntryTypes >
• unmapQFromRQ() : HWScheduler
• unmapRegion() : MemState
• unmaskAll() : X86ISA::I8259
• unPostMaintInt() : VGic
• unPostVInt() : VGic
• unrecognizedCall() : ArmSemihosting
• unregisterDequeueCallback() : MessageBuffer
• unregisterDrainable() : DrainManager
• unregisterQueue() : HWScheduler
• unregisterTraceFile() : sc_gem5::Scheduler
• unRename() : CxxConfigManager
• unreservedRemainingSpace() : Minor::InputBuffer< ElemType, ReportTraits, BubbleTraits > , Minor::Queue< ElemType, ReportTraits, BubbleTraits >
• unscheduleTickEvent() : FullO3CPU< Impl >
• unserialize() : ArchTimer , ArmInterruptPin , ArmISA::Interrupts , ArmISA::ISA , ArmISA::PMU::CounterState , ArmISA::PMU , ArmISA::PTE , ArmISA::TlbEntry , ArmSemihosting::File , ArmSemihosting::FileBase , ArmSemihosting::FileFeatures , ArmSemihosting , BaseCache , BaseCPU , BasePixelPump::PixelEvent , BasePixelPump , BaseTrafficGen , CheckerCPU , Clint , ClockedObject , CopyEngine::CopyEngineChannel , CopyEngine , CopyEngineReg::ChanRegs , CopyEngineReg::Reg< T > , CopyEngineReg::Regs , CowDiskImage , CpuLocalTimer::Timer , CpuLocalTimer , DeviceFDEntry , DisplayTimings , DistEtherLink::Link , DistEtherLink , DistIface::RecvScheduler::Desc , DistIface::RecvScheduler , DistIface::Sync , DistIface::SyncNode , DistIface::SyncSwitch , DistIface , DmaReadFifo , DumbTOD , DVFSHandler , EmulationPageTable , EnergyCtrl , EtherLink::Link , EtherLink , EtherSwitch::Interface::PortFifo , EtherSwitch::Interface::PortFifoEntry , EtherSwitch::Interface , EtherSwitch , EtherTapBase , EtherTapStub , EthPacketData , Event , FDEntry , FileFDEntry , FlashDevice , FrameBuffer , GenericISA::DelaySlotPCState< MachInst > , GenericISA::DelaySlotUPCState< MachInst > , GenericISA::PCStateBase , GenericISA::UPCState< MachInst > , GenericTimer::CoreTimers , GenericTimer , GenericTimerFrame , GenericWatchdog , GicV2::BankedRegs , GicV2 , Gicv3 , Gicv3CPUInterface , Gicv3Distributor , Gicv3Its , Gicv3Redistributor , Globals , GPUDispatcher , HDLcd::DmaEngine , HDLcd , HiFive , I2CBus , IdeController::Channel , IdeController , IdeDisk , IGbE::DescCache< T > , IGbE::RxDescCache , IGbE::TxDescCache , IGbE , iGbReg::Regs::Reg< T > , iGbReg::Regs , Intel8254Timer::Counter , Intel8254Timer , Iob , Iris::Interrupts , KernelWorkload , Loader::SymbolTable , LocalSimLoopExitEvent , Malta , MaltaCChip , MaltaIO , MC146818 , MemState , MinorCPU , MipsISA::Interrupts , MipsISA::PTE , MipsISA::TLB , MipsISA::TlbEntry , MultiLevelPageTable< EntryTypes > , NoMaliGpu , NSGigE , O3ThreadState< Impl > , PacketFifo , PacketFifoEntry , PciDevice , PhysicalMemory , PipeFDEntry , Pl011 , PL031 , Pl050 , Pl111 , Plic , PollEvent , PowerISA::PTE , PowerISA::TLB , PowerISA::TlbEntry , PowerState , Process , PS2Device , PS2Keyboard , PS2Mouse , PS2TouchKit , Random , RealViewCtrl , RealViewOsc , RegisterBank< BankByteOrder >::Register< Data, RegByteOrder > , RegisterBank< BankByteOrder >::RegisterBase , RegisterBank< BankByteOrder >::RegisterBuf , RegisterBank< BankByteOrder >::RegisterLBuf< BufBytes > , RegisterBank< BankByteOrder >::RegisterRoFill , RiscvISA::Interrupts , RiscvISA::ISA , RiscvISA::TLB , RiscvISA::TlbEntry , RiscvRTC , RubySystem , Serializable , SimObject , SimpleThread , Sinic::Base , Sinic::Device , SMMUv3 , Sp804::Timer , Sp804 , Sp805 , SparcISA::Interrupts , SparcISA::ISA , SparcISA::TLB , SparcISA::TlbEntry , SrcClockDomain , System , SystemCounter , ThreadState , Ticked , TickedObject , Time , TrafficGen , Uart8250::Registers::PairedRegister , Uart8250 , UFSHostDevice , VGic , VirtIO9PProxy , VirtIODeviceBase , VirtQueue , VoltageDomain , X86ISA::Cmos , X86ISA::GpuTLB , X86ISA::I8042 , X86ISA::I82094AA , X86ISA::I8237 , X86ISA::I8254 , X86ISA::I8259 , X86ISA::Interrupts , X86ISA::ISA , X86ISA::PCState , X86ISA::Speaker , X86ISA::TLB , X86ISA::TlbEntry
• unserializeGlobals() : Serializable
• unserializeSection() : Serializable
• unserializeStore() : PhysicalMemory
• unserializeThread() : BaseCPU , BaseKvmCPU , BaseSimpleCPU , FullO3CPU< Impl > , MinorCPU
• unset() : BloomFilter::Base , BloomFilter::Block , BloomFilter::Multi , BloomFilter::Perfect , TimerTable
• unsetDeviceQueueDesc() : HSAPacketProcessor
• unsetReg() : Scoreboard
• unsignedCtrUpdate() : LoopPredictor , TAGEBase
• Unspecified() : Stats::Units::Unspecified
• unstallPort() : ComputeUnit::DTLBPort , ComputeUnit::ITLBPort , ComputeUnit::LDSPort , ComputeUnit::ScalarDTLBPort
• unverifiable() : ArmISA::ISA::MiscRegLUTEntryInitializer
• UnwindExceptionKill() : sc_gem5::UnwindExceptionKill
• UnwindExceptionReset() : sc_gem5::UnwindExceptionReset
• upc() : GenericISA::DelaySlotUPCState< MachInst > , GenericISA::UPCState< MachInst >
• UPCState() : GenericISA::UPCState< MachInst >
• update() : AccessTraceForAddress , AddressManager::LastWriter , ArmISA::ArmFault , BaseTrafficGen , BiModeBP , BPredUnit , Clocked , DecodeCache::AddrMap< Value, CacheChunkShift > , DefaultBTB , Gicv3CPUInterface , Gicv3Distributor , Gicv3Redistributor , LocalBP , LTAGE , MhuDoorbell , MultiperspectivePerceptron::LocalHistories , MultiperspectivePerceptron , MultiperspectivePerceptronTAGE , Prefetcher::STeMS::ActiveGenerationTableEntry , RegisterBank< BankByteOrder >::Register< Data, RegByteOrder > , sc_core::sc_buffer< T, WRITER_POLICY > , sc_core::sc_fifo< T > , sc_core::sc_prim_channel , sc_core::sc_signal< T, WRITER_POLICY > , sc_core::sc_signal< bool, WRITER_POLICY > , sc_core::sc_signal< sc_dt::sc_bigint< W > > , sc_core::sc_signal< sc_dt::sc_biguint< W > > , sc_core::sc_signal< sc_dt::sc_int< W > > , sc_core::sc_signal< sc_dt::sc_logic, WRITER_POLICY > , sc_core::sc_signal< sc_dt::sc_uint< W > > , sc_core::sc_signal_resolved , sc_core::sc_signal_rv< W > , sc_dt::sc_global< T > , sc_gem5::Channel , sc_gem5::Reset , Stats::ScalarPrint , TAGE , TAGE_SC_L , TAGEBase::FoldedHistory , TAGEBase , tlm::tlm_fifo< T > , TournamentBP , Trace::ArmNativeTrace::ThreadState , Trace::TarmacTracerRecord::TraceRegEntry , Trace::X86NativeTrace::ThreadState , VirtDescriptor
• update_extensions_from() : tlm::tlm_generic_payload
• update_original_from() : tlm::tlm_generic_payload
• update_sw_winner() : CrossbarSwitch
• updateAcyclic() : MultiperspectivePerceptron::ThreadData
• updateAllCounters() : ArmISA::PMU
• updateAttachedCounters() : ArmISA::PMU::PMUEvent
• updateAttributes() : ArmISA::TlbEntry
• updateBias() : Loader::ElfObject , Loader::ObjectFile , Process
• updateBlockData() : BaseCache
• updateBranchData() : Minor::Execute
• updateBranchPrediction() : Minor::Fetch2
• updateBrkRegion() : MemState
• updateCC() : Trace::TarmacTracerRecord::TraceRegEntry
• updateChain() : VirtDescriptor
• updateClockPeriod() : Clocked , DerivedClockDomain
• updateComInstStats() : DefaultCommit< Impl >
• updateCommitOrderDep() : ElasticTrace
• updateCompressionData() : BaseCache
• updateContext() : Shader
• updateControl() : ArmISA::BrkPoint , ArmISA::WatchPoint
• updateCounter() : ArchTimer , ArmISA::PMU
• updateCP0ReadView() : MipsISA::ISA
• updateCPU() : MipsISA::ISA
• updateCPUID() : X86KvmCPU
• updateCycleCounters() : BaseCPU
• updateCycleCounts() : TimingSimpleCPU
• updateDBGBCR() : ArmISA::SelfDebug
• updateDBGWCR() : ArmISA::SelfDebug
• updateDelayedTicks() : Message
• updateDirectionInfo() : IndirectPredictor , SimpleIndirectPredictor
• updateDistributor() : Gicv3CPUInterface , Gicv3Redistributor
• UpdateEvent() : DVFSHandler::UpdateEvent
• updateExeInstStats() : DefaultIEW< Impl >
• updateExpectedSeqNums() : Minor::Fetch1
• updateFetchStatus() : DefaultFetch< Impl >
• updateFileOffsets() : FDArray
• updateFlags() : MSHR::TargetList
• updateFloat() : Trace::TarmacTracerRecord::TraceRegEntry
• updateGHist() : TAGEBase
• updateGlobalHistNotTaken() : TournamentBP
• updateGlobalHistReg() : BiModeBP
• updateGlobalHistTaken() : TournamentBP
• updateHandyM5Reg() : X86ISA::ISA
• updateHead() : IGbE::DescCache< T > , IGbE::RxDescCache , IGbE::TxDescCache , ROB< Impl >
• updateHistories() : MPP_TAGE , MultiperspectivePerceptronTAGE , TAGE_SC_L_TAGE , TAGEBase
• updateHistoryStack() : MPP_StatisticalCorrector::MPP_SCThreadHistory
• updateHsaSignal() : GPUCommandProcessor , HSADevice
• updateInstStats() : ComputeUnit
• updateInt() : Plic , Trace::TarmacTracerRecord::TraceRegEntry , Trace::TarmacTracerRecordV8::TraceRegEntryV8
• updateIntCtrl() : Pl050
• updateIntrInfo() : ArmISA::Interrupts , BaseInterrupts , Iris::Interrupts , MipsISA::Interrupts , PowerISA::Interrupts , RiscvISA::Interrupts , SparcISA::Interrupts , X86ISA::Interrupts
• updateIntState() : GicV2 , MuxingKvmGic , VGic
• updateInvCounter() : GPUDispatcher
• updateIRRV() : X86ISA::Interrupts
• updateISRV() : X86ISA::Interrupts
• updateIssueOrderDep() : ElasticTrace
• updateKvmState() : ArmKvmCPU , ArmV8KvmCPU , BaseKvmCPU , X86KvmCPU
• updateKvmStateCoProc() : ArmKvmCPU
• updateKvmStateCore() : ArmKvmCPU
• updateKvmStateFPU() : X86KvmCPU
• updateKvmStateFPULegacy() : X86KvmCPU
• updateKvmStateFPUXSave() : X86KvmCPU
• updateKvmStateMisc() : ArmKvmCPU
• updateKvmStateMSRs() : X86KvmCPU
• updateKvmStateRegs() : X86KvmCPU
• updateKvmStateSRegs() : X86KvmCPU
• updateKvmStateVFP() : ArmKvmCPU
• updateLocalHistNotTaken() : TournamentBP
• updateLocalHistory() : StatisticalCorrector::SCThreadHistory
• updateLocalHistTaken() : TournamentBP
• updateLogTable() : AddressManager
• updateMisc() : Trace::TarmacTracerRecord::TraceRegEntry , Trace::TarmacTracerRecordV8::TraceRegEntryV8
• updateMiscReg() : ArmISA::TLB
• updateMiscRegs() : BaseO3DynInst< Impl >
• updateMode() : WriteAllocator
• updateNext() : TimerTable
• updateNPC() : X86ISA::Decoder
• updateNumOps() : TraceCPU
• updateOffsetState() : X86ISA::Decoder
• updateOSLock() : ArmISA::SelfDebug
• updateOutcome() : X86ISA::GpuTLB::TLBEvent
• updateOutput() : Plic
• updateOutstandingInvs() : HSAQueueEntry
• updateOutstandingWbs() : HSAQueueEntry
• updatePageDivergenceDist() : ComputeUnit
• updatePageFootprint() : X86ISA::GpuTLB
• updatePartial() : MultiperspectivePerceptronTAGE
• updatePathAndGlobalHistory() : MPP_TAGE , TAGE_SC_L_TAGE
• updatePatternTable() : Prefetcher::SignaturePath
• updatePerfLevel() : DVFSHandler::UpdateEvent
• updatePhysAddresses() : TLBCoalescer , X86ISA::GpuTLB
• updatePLAck() : EnergyCtrl
• updatePowerStats() : DRAMInterface::Rank
• updatePred() : Trace::TarmacTracerRecord::TraceRegEntry , Trace::TarmacTracerRecordV8::TraceRegEntryV8
• UpdateReadDispIdDmaEvent() : HSAPacketProcessor::UpdateReadDispIdDmaEvent
• updateReadIndex() : HSAPacketProcessor
• updateReadyList() : ScoreboardCheckToSchedule
• updateRegDep() : ElasticTrace
• updateRegMap() : ArmISA::ISA
• updateReqStats() : CommMonitor::MonitorStats
• updateResources() : UncoalescedTable
• updateResponse() : SnoopFilter
• updateRespStats() : CommMonitor::MonitorStats
• updateRRVars() : HWScheduler
• updateRunPri() : GicV2
• updateRxInt() : Pl050
• updateScore() : QoS::PropFairPolicy
• updateSignals() : I2CBus
• updateSignature() : Prefetcher::SignaturePath
• updateSnoopForward() : SnoopFilter
• updateSnoopResponse() : SnoopFilter
• updateState() : IdeDisk
• updateStats() : GPUDynInst , LoopPredictor , StatisticalCorrector , TAGEBase
• updateStatus() : DefaultCommit< Impl > , DefaultDecode< Impl > , DefaultIEW< Impl > , DefaultRename< Impl >
• updateSum() : StackDistCalc
• updateSumsLeavesToRoot() : StackDistCalc
• updateTail() : ROB< Impl >
• updateTCStateCoProc() : ArmKvmCPU
• updateTCStateCore() : ArmKvmCPU
• updateTCStateMisc() : ArmKvmCPU
• updateTCStateVFP() : ArmKvmCPU
• updateThreadContext() : ArmKvmCPU , ArmV8KvmCPU , BaseKvmCPU , X86KvmCPU
• updateThreadContextFPU() : X86KvmCPU
• updateThreadContextMSRs() : X86KvmCPU
• updateThreadContextRegs() : X86KvmCPU
• updateThreadContextSRegs() : X86KvmCPU
• updateThreadContextXSave() : X86KvmCPU
• updateThreadPriority() : FullO3CPU< Impl >
• updateTick() : SystemCounter
• updateTimings() : BasePixelPump
• updateTree() : StackDistCalc
• updateVaddr() : ArmISA::TlbEntry , MipsISA::TlbEntry , PowerISA::TlbEntry , SparcISA::TlbEntry , X86ISA::TlbEntry
• updateValue() : SystemCounter
• updateVec() : Trace::TarmacTracerRecord::TraceRegEntry , Trace::TarmacTracerRecordV8::TraceRegEntryV8
• updateVideoParams() : Pl111
• updateWbCounter() : GPUDispatcher
• updateWriteFlags() : MSHR::TargetList
• upper() : PciMemBar
• upperBound() : Loader::SymbolTable
• uReset() : GenericISA::UPCState< MachInst >
• urp() : Net::TcpHdr
• uSatInt() : ArmISA::ArmStaticInst
• uSaturateOp() : ArmISA::ArmStaticInst
• useBaseABI() : GuestABI::Argument< Aapcs32Vfp, HA, typename std::enable_if_t< IsAapcs32HomogeneousAggregate< HA >::value > > , GuestABI::Result< Aapcs32Vfp, HA, typename std::enable_if_t< IsAapcs32HomogeneousAggregate< HA >::value > >
• usec() : Time
• used() : tlm::circular_buffer< T > , tlm::tlm_fifo< T > , tlm::tlm_fifo_debug_if< T >
• user() : ArmISA::ISA::MiscRegLUTEntryInitializer , ArmISA::TableWalker::LongDescriptor
• userNonSecureRead() : ArmISA::ISA::MiscRegLUTEntryInitializer
• userNonSecureWrite() : ArmISA::ISA::MiscRegLUTEntryInitializer
• userSecureRead() : ArmISA::ISA::MiscRegLUTEntryInitializer
• userSecureWrite() : ArmISA::ISA::MiscRegLUTEntryInitializer
• userTable() : ArmISA::TableWalker::LongDescriptor
• useSecondChance() : ReplacementPolicy::SecondChance
• utilization() : TBEStorage