#include <tlb.hh>

Inheritance diagram for SparcISA::TLB:

Public Types
typedef SparcTLBParams	Params

Public Types inherited from BaseTLB
enum	Mode { Read, Write, Execute }

Public Types inherited from SimObject
typedef SimObjectParams	Params

Public Member Functions
TlbEntry *	lookup (Addr va, int partition_id, bool real, int context_id=0, bool update_used=true)
	lookup an entry in the TLB based on the partition id, and real bit if real is true or the partition id, and context id if real is false. More...

void	flushAll () override
	Remove all entries from the TLB. More...

	TLB (const Params &p)

void	takeOverFrom (BaseTLB *otlb) override
	Take over from an old tlb context. More...

void	demapPage (Addr vaddr, uint64_t asn) override

void	dumpAll ()

Fault	translateAtomic (const RequestPtr &req, ThreadContext *tc, Mode mode) override

Fault	translateFunctional (const RequestPtr &req, ThreadContext *tc, Mode mode) override

void	translateTiming (const RequestPtr &req, ThreadContext tc, Translation translation, Mode mode) override

Fault	finalizePhysical (const RequestPtr &req, ThreadContext *tc, Mode mode) const override
	Do post-translation physical address finalization. More...

Cycles	doMmuRegRead (ThreadContext tc, Packet pkt)

Cycles	doMmuRegWrite (ThreadContext tc, Packet pkt)

void	GetTsbPtr (ThreadContext tc, Addr addr, int ctx, Addr ptrs)

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

uint64_t	TteRead (int entry)
	Give an entry id, read that tlb entries' tte. More...

Public Member Functions inherited from BaseTLB
virtual Port *	getTableWalkerPort ()
	Get the table walker port if present. More...

void	memInvalidate ()
	Invalidate the contents of memory buffers. More...

Public Member Functions inherited from SimObject
const Params &	params () const

	SimObject (const Params &p)

virtual	~SimObject ()

virtual const std::string	name () const

virtual void	init ()
	init() is called after all C++ SimObjects have been created and all ports are connected. More...

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint. More...

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint. More...

virtual void	regProbePoints ()
	Register probe points for this object. More...

virtual void	regProbeListeners ()
	Register probe listeners for this object. More...

ProbeManager *	getProbeManager ()
	Get the probe manager for this object. More...

virtual Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID)
	Get a port with a given name and index. More...

virtual void	startup ()
	startup() is the final initialization call before simulation. More...

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining. More...

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes. More...

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

Public Member Functions inherited from EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue. More...

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section. More...

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object. More...

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from Drainable
DrainState	drainState () const
	Return the current drain state of an object. More...

virtual void	notifyFork ()
	Notify a child process of a fork. More...

Public Member Functions inherited from Stats::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group. More...

virtual	~Group ()

virtual void	regStats ()
	Callback to set stat parameters. More...

virtual void	resetStats ()
	Callback to reset stats. More...

virtual void	preDumpStats ()
	Callback before stats are dumped. More...

void	addStat (Stats::Info *info)
	Register a stat with this group. More...

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object. More...

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object. More...

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block. More...

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group. More...

void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block. More...

	Group ()=delete

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Protected Types
enum	FaultTypes { OtherFault = 0, PrivViolation = 0x1, SideEffect = 0x2, AtomicToIo = 0x4, IllegalAsi = 0x8, LoadFromNfo = 0x10, VaOutOfRange = 0x20, VaOutOfRangeJmp = 0x40 }

enum	ContextType { Primary = 0, Secondary = 1, Nucleus = 2 }

enum	TsbPageSize { Ps0, Ps1 }

typedef TlbMap::iterator	MapIter

Protected Member Functions
void	insert (Addr vpn, int partition_id, int context_id, bool real, const PageTableEntry &PTE, int entry=-1)
	Insert a PTE into the TLB. More...

uint64_t	TagRead (int entry)
	Given an entry id, read that tlb entries' tag. More...

void	demapAll (int partition_id)
	Remove all non-locked entries from the tlb that match partition id. More...

void	demapContext (int partition_id, int context_id)
	Remove all entries that match a given context/partition id. More...

void	demapPage (Addr va, int partition_id, bool real, int context_id)
	Remve all entries that match a certain partition id, (contextid), and va). More...

bool	validVirtualAddress (Addr va, bool am)
	Checks if the virtual address provided is a valid one. More...

void	writeSfsr (bool write, ContextType ct, bool se, FaultTypes ft, int asi)

void	clearUsedBits ()

void	writeTagAccess (Addr va, int context)

Fault	translateInst (const RequestPtr &req, ThreadContext *tc)

Fault	translateData (const RequestPtr &req, ThreadContext *tc, bool write)

Protected Member Functions inherited from BaseTLB
	BaseTLB (const Params &p)

Protected Member Functions inherited from Drainable
	Drainable ()

virtual	~Drainable ()

virtual void	drainResume ()
	Resume execution after a successful drain. More...

void	signalDrainDone () const
	Signal that an object is drained. More...

Protected Attributes
uint64_t	sfar

uint64_t	c0_tsb_ps0

uint64_t	c0_tsb_ps1

uint64_t	c0_config

uint64_t	cx_tsb_ps0

uint64_t	cx_tsb_ps1

uint64_t	cx_config

uint64_t	sfsr

uint64_t	tag_access

TlbMap	lookupTable

TlbEntry *	tlb

int	size

int	usedEntries

int	lastReplaced

uint64_t	cacheState

bool	cacheValid

std::list< TlbEntry * >	freeList

Protected Attributes inherited from SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters. More...

Protected Attributes inherited from EventManager
EventQueue *	eventq
	A pointer to this object's event queue. More...

Private Member Functions
void	writeSfsr (Addr a, bool write, ContextType ct, bool se, FaultTypes ft, int asi)

uint64_t	MakeTsbPtr (TsbPageSize ps, uint64_t tag_access, uint64_t c0_tsb, uint64_t c0_config, uint64_t cX_tsb, uint64_t cX_config)

Private Attributes
TlbEntry *	cacheEntry [2]

ASI	cacheAsi [2]

Friends
class	MMU

Additional Inherited Members
Static Public Member Functions inherited from SimObject
static void	serializeAll (CheckpointOut &cp)
	Serialize all SimObjects in the system. More...

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it. More...

Static Public Member Functions inherited from Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section. More...

static void	serializeAll (const std::string &cpt_dir)
	Serializes all the SimObjects. More...

static void	unserializeGlobals (CheckpointIn &cp)

Detailed Description

Definition at line 50 of file tlb.hh.

Member Typedef Documentation

◆ MapIter

typedef TlbMap::iterator SparcISA::TLB::MapIter

protected

Definition at line 68 of file tlb.hh.

◆ Params

typedef SparcTLBParams SparcISA::TLB::Params

Definition at line 154 of file tlb.hh.

Member Enumeration Documentation

◆ ContextType

enum SparcISA::TLB::ContextType

protected

Enumerator
Primary
Secondary
Nucleus

Definition at line 93 of file tlb.hh.

◆ FaultTypes

enum SparcISA::TLB::FaultTypes

protected

Enumerator
OtherFault
PrivViolation
SideEffect
AtomicToIo
IllegalAsi
LoadFromNfo
VaOutOfRange
VaOutOfRangeJmp

Definition at line 82 of file tlb.hh.

◆ TsbPageSize

enum SparcISA::TLB::TsbPageSize

protected

Enumerator
Ps0
Ps1

Definition at line 99 of file tlb.hh.

Constructor & Destructor Documentation

◆ TLB()

SparcISA::TLB::TLB ( const Params & p )

Definition at line 56 of file tlb.cc.

References c0_config, c0_tsb_ps0, c0_tsb_ps1, cacheEntry, cx_config, cx_tsb_ps0, cx_tsb_ps1, fatal, freeList, sfar, sfsr, size, tag_access, tlb, and RiscvISA::x.

Member Function Documentation

◆ clearUsedBits()

void SparcISA::TLB::clearUsedBits ( )

protected

Definition at line 84 of file tlb.cc.

References SparcISA::TlbMap::begin(), SparcISA::TlbMap::end(), ArmISA::i, lookupTable, ArmISA::t, and usedEntries.

Referenced by insert(), and lookup().

◆ demapAll()

void SparcISA::TLB::demapAll ( int partition_id )

protected

Remove all non-locked entries from the tlb that match partition id.

Definition at line 304 of file tlb.cc.

References cacheValid, DPRINTF, SparcISA::TlbMap::erase(), freeList, lookupTable, SparcISA::TlbRange::partitionId, SparcISA::TlbEntry::range, size, tlb, SparcISA::TlbEntry::used, usedEntries, SparcISA::TlbEntry::valid, and RiscvISA::x.

Referenced by doMmuRegWrite().

◆ demapContext()

void SparcISA::TLB::demapContext	(	int	partition_id,
		int	context_id
	)

protected

Remove all entries that match a given context/partition id.

Definition at line 282 of file tlb.cc.

References cacheValid, DPRINTF, SparcISA::TlbMap::erase(), freeList, lookupTable, SparcISA::TlbRange::partitionId, SparcISA::TlbEntry::range, size, tlb, SparcISA::TlbEntry::used, usedEntries, SparcISA::TlbEntry::valid, and RiscvISA::x.

Referenced by doMmuRegWrite().

◆ demapPage() [1/2]

void SparcISA::TLB::demapPage	(	Addr	va,
		int	partition_id,
		bool	real,
		int	context_id
	)

protected

Remve all entries that match a certain partition id, (contextid), and va).

Definition at line 250 of file tlb.cc.

References cacheValid, SparcISA::TlbRange::contextId, DPRINTF, SparcISA::TlbMap::end(), SparcISA::TlbMap::erase(), SparcISA::TlbMap::find(), freeList, ArmISA::i, lookupTable, SparcISA::TlbRange::partitionId, SparcISA::TlbRange::real, SparcISA::TlbRange::size, usedEntries, SparcISA::TlbRange::va, and ArmISA::va.

Referenced by doMmuRegWrite().

◆ demapPage() [2/2]

void SparcISA::TLB::demapPage	(	Addr	vaddr,
		uint64_t	asn
	)

inlineoverridevirtual

Implements BaseTLB.

Definition at line 160 of file tlb.hh.

References panic.

◆ doMmuRegRead()

Cycles SparcISA::TLB::doMmuRegRead	(	ThreadContext *	tc,
		Packet *	pkt
	)

Definition at line 950 of file tlb.cc.

Referenced by translateData().

◆ doMmuRegWrite()

Cycles SparcISA::TLB::doMmuRegWrite	(	ThreadContext *	tc,
		Packet *	pkt
	)

Definition at line 1135 of file tlb.cc.

References SparcISA::ASI_DMMU, SparcISA::ASI_DMMU_CTXT_NONZERO_CONFIG, SparcISA::ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS0, SparcISA::ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS1, SparcISA::ASI_DMMU_CTXT_ZERO_CONFIG, SparcISA::ASI_DMMU_CTXT_ZERO_TSB_BASE_PS0, SparcISA::ASI_DMMU_CTXT_ZERO_TSB_BASE_PS1, SparcISA::ASI_DMMU_DEMAP, SparcISA::ASI_DTLB_DATA_ACCESS_REG, SparcISA::ASI_DTLB_DATA_IN_REG, SparcISA::ASI_HYP_SCRATCHPAD, SparcISA::ASI_IMMU, SparcISA::ASI_IMMU_CTXT_NONZERO_CONFIG, SparcISA::ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS0, SparcISA::ASI_IMMU_CTXT_NONZERO_TSB_BASE_PS1, SparcISA::ASI_IMMU_CTXT_ZERO_CONFIG, SparcISA::ASI_IMMU_CTXT_ZERO_TSB_BASE_PS0, SparcISA::ASI_IMMU_CTXT_ZERO_TSB_BASE_PS1, SparcISA::ASI_IMMU_DEMAP, SparcISA::ASI_ITLB_DATA_ACCESS_REG, SparcISA::ASI_ITLB_DATA_IN_REG, SparcISA::ASI_LSU_CONTROL_REG, SparcISA::ASI_MMU, SparcISA::ASI_QUEUE, SparcISA::ASI_SCRATCHPAD, SparcISA::ASI_SPARC_ERROR_EN_REG, SparcISA::ASI_SPARC_ERROR_STATUS_REG, SparcISA::ASI_SWVR_INTR_RECEIVE, SparcISA::ASI_SWVR_UDB_INTR_W, bits(), c0_config, c0_tsb_ps0, c0_tsb_ps1, BaseCPU::clearInterrupt(), cx_config, cx_tsb_ps0, cx_tsb_ps1, data, demapAll(), demapContext(), demapPage(), DPRINTF, findMsbSet(), SparcISA::Interrupts::get_vec(), Packet::getAddr(), Packet::getBE(), ThreadContext::getCpuPtr(), BaseCPU::getInterruptController(), ThreadContext::getMMUPtr(), ThreadContext::getSystemPtr(), ignore(), inform, insert(), SparcISA::IT_INT_VEC, BaseMMU::itb, M5_FALLTHROUGH, Packet::makeAtomicResponse(), mbits(), SparcISA::MISCREG_MMU_LSU_CTRL, SparcISA::MISCREG_MMU_P_CONTEXT, SparcISA::MISCREG_MMU_PART_ID, SparcISA::MISCREG_MMU_S_CONTEXT, SparcISA::MISCREG_QUEUE_CPU_MONDO_HEAD, SparcISA::MISCREG_SCRATCHPAD_R0, panic, SparcISA::PageTableEntry::populate(), ThreadContext::readMiscReg(), Packet::req, ThreadContext::setMiscReg(), sfsr, SparcISA::PageTableEntry::sun4u, SparcISA::PageTableEntry::sun4v, tag_access, System::threads, and ArmISA::va.

Referenced by translateData().

◆ dumpAll()

void SparcISA::TLB::dumpAll ( )

Definition at line 236 of file tlb.cc.

References SparcISA::TlbRange::contextId, DPRINTFN, ArmISA::i, SparcISA::PageTableEntry::paddr(), SparcISA::TlbEntry::pte, SparcISA::TlbEntry::range, SparcISA::TlbRange::real, size, SparcISA::TlbRange::size, tlb, SparcISA::TlbRange::va, and RiscvISA::x.

◆ finalizePhysical()

Fault SparcISA::TLB::finalizePhysical	(	const RequestPtr &	req,
		ThreadContext *	tc,
		Mode	mode
	)		const

overridevirtual

Do post-translation physical address finalization.

This method is used by some architectures that need post-translation massaging of physical addresses. For example, X86 uses this to remap physical addresses in the APIC range to a range of physical memory not normally available to real x86 implementations.

Parameters

req	Request to updated in-place.
tc	Thread context that created the request.
mode	Request type (read/write/execute).

Returns: A fault on failure, NoFault otherwise.

Implements BaseTLB.

Definition at line 943 of file tlb.cc.

References NoFault.

◆ flushAll()

void SparcISA::TLB::flushAll ( )

overridevirtual

Remove all entries from the TLB.

Implements BaseTLB.

Definition at line 323 of file tlb.cc.

References cacheValid, SparcISA::TlbMap::clear(), freeList, lookupTable, size, tlb, SparcISA::TlbEntry::used, usedEntries, SparcISA::TlbEntry::valid, and RiscvISA::x.

◆ GetTsbPtr()

void SparcISA::TLB::GetTsbPtr	(	ThreadContext *	tc,
		Addr	addr,
		int	ctx,
		Addr *	ptrs
	)

Definition at line 1389 of file tlb.cc.

References X86ISA::addr, c0_config, c0_tsb_ps0, c0_tsb_ps1, cx_config, cx_tsb_ps0, cx_tsb_ps1, ThreadContext::getMMUPtr(), BaseMMU::itb, MakeTsbPtr(), mbits(), Ps0, Ps1, and tag_access.

Referenced by translateFunctional().

◆ insert()

void SparcISA::TLB::insert	(	Addr	vpn,
		int	partition_id,
		int	context_id,
		bool	real,
		const PageTableEntry &	PTE,
		int	entry = `-1`
	)

protected

Insert a PTE into the TLB.

Definition at line 98 of file tlb.cc.

References cacheValid, clearUsedBits(), SparcISA::TlbRange::contextId, DPRINTF, SparcISA::TlbMap::end(), SparcISA::TlbMap::erase(), freeList, ArmISA::i, SparcISA::TlbMap::insert(), lastReplaced, lookupTable, SparcISA::PageTableEntry::paddr(), SparcISA::TlbRange::partitionId, SparcISA::TlbEntry::pte, SparcISA::TlbEntry::range, SparcISA::TlbRange::real, size, SparcISA::PageTableEntry::size(), SparcISA::TlbRange::size, tlb, SparcISA::TlbEntry::used, usedEntries, SparcISA::TlbRange::va, ArmISA::va, SparcISA::PageTableEntry::valid(), SparcISA::TlbEntry::valid, and RiscvISA::x.

Referenced by doMmuRegWrite().

◆ lookup()

TlbEntry * SparcISA::TLB::lookup	(	Addr	va,
		int	partition_id,
		bool	real,
		int	context_id = `0`,
		bool	update_used = `true`
	)

lookup an entry in the TLB based on the partition id, and real bit if real is true or the partition id, and context id if real is false.

Parameters

va	the virtual address not shifted (e.g. bottom 13 bits are 0)
paritition_id	partition this entry is for
real	is this a real->phys or virt->phys translation
context_id	if this is virt->phys what context
update_used	should ew update the used bits in the entries on not useful if we are trying to do a va->pa without mucking with any state for a debug read for example.