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mem_dep_unit.hh
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40 
41 #ifndef __CPU_O3_MEM_DEP_UNIT_HH__
42 #define __CPU_O3_MEM_DEP_UNIT_HH__
43 
44 #include <list>
45 #include <memory>
46 #include <set>
47 #include <unordered_map>
48 #include <unordered_set>
49 
50 #include "base/statistics.hh"
51 #include "cpu/inst_seq.hh"
52 #include "debug/MemDepUnit.hh"
53 
54 struct SNHash {
55  size_t operator() (const InstSeqNum &seq_num) const {
56  unsigned a = (unsigned)seq_num;
57  unsigned hash = (((a >> 14) ^ ((a >> 2) & 0xffff))) & 0x7FFFFFFF;
58 
59  return hash;
60  }
61 };
62 
63 struct DerivO3CPUParams;
64 
65 template <class Impl>
66 class InstructionQueue;
67 
79 template <class MemDepPred, class Impl>
81 {
82  protected:
83  std::string _name;
84 
85  public:
86  typedef typename Impl::DynInstPtr DynInstPtr;
87  typedef typename Impl::DynInstConstPtr DynInstConstPtr;
88  typedef typename Impl::O3CPU O3CPU;
89 
91  MemDepUnit();
92 
94  MemDepUnit(const DerivO3CPUParams &params);
95 
97  ~MemDepUnit();
98 
100  std::string name() const { return _name; }
101 
103  void init(const DerivO3CPUParams &params, ThreadID tid, O3CPU *cpu);
104 
106  bool isDrained() const;
107 
109  void drainSanityCheck() const;
110 
112  void takeOverFrom();
113 
115  void setIQ(InstructionQueue<Impl> *iq_ptr);
116 
118  void insert(const DynInstPtr &inst);
119 
121  void insertNonSpec(const DynInstPtr &inst);
122 
124  void insertBarrier(const DynInstPtr &barr_inst);
125 
127  void regsReady(const DynInstPtr &inst);
128 
130  void nonSpecInstReady(const DynInstPtr &inst);
131 
133  void reschedule(const DynInstPtr &inst);
134 
138  void replay();
139 
141  void completeInst(const DynInstPtr &inst);
142 
146  void squash(const InstSeqNum &squashed_num, ThreadID tid);
147 
149  void violation(const DynInstPtr &store_inst,
150  const DynInstPtr &violating_load);
151 
153  void issue(const DynInstPtr &inst);
154 
156  void dumpLists();
157 
158  private:
159 
161  void completed(const DynInstPtr &inst);
162 
164  void wakeDependents(const DynInstPtr &inst);
165 
167 
168  class MemDepEntry;
169 
170  typedef std::shared_ptr<MemDepEntry> MemDepEntryPtr;
171 
176  class MemDepEntry {
177  public:
179  MemDepEntry(const DynInstPtr &new_inst)
180  : inst(new_inst), regsReady(false), memDeps(0),
181  completed(false), squashed(false)
182  {
183 #ifdef DEBUG
184  ++memdep_count;
185 
186  DPRINTF(MemDepUnit, "Memory dependency entry created. "
187  "memdep_count=%i %s\n", memdep_count, inst->pcState());
188 #endif
189  }
190 
193  {
194  for (int i = 0; i < dependInsts.size(); ++i) {
195  dependInsts[i] = NULL;
196  }
197 #ifdef DEBUG
198  --memdep_count;
199 
200  DPRINTF(MemDepUnit, "Memory dependency entry deleted. "
201  "memdep_count=%i %s\n", memdep_count, inst->pcState());
202 #endif
203  }
204 
206  std::string name() const { return "memdepentry"; }
207 
210 
213 
216 
218  bool regsReady;
220  int memDeps;
222  bool completed;
224  bool squashed;
225 
227 #ifdef DEBUG
228  static int memdep_count;
229  static int memdep_insert;
230  static int memdep_erase;
231 #endif
232  };
233 
235  inline MemDepEntryPtr &findInHash(const DynInstConstPtr& inst);
236 
238  inline void moveToReady(MemDepEntryPtr &ready_inst_entry);
239 
240  typedef std::unordered_map<InstSeqNum, MemDepEntryPtr, SNHash> MemDepHash;
241 
242  typedef typename MemDepHash::iterator MemDepHashIt;
243 
246 
248  std::list<DynInstPtr> instList[Impl::MaxThreads];
249 
252 
258  MemDepPred depPred;
259 
261  std::unordered_set<InstSeqNum> loadBarrierSNs;
262 
264  std::unordered_set<InstSeqNum> storeBarrierSNs;
265 
267  bool hasLoadBarrier() const { return !loadBarrierSNs.empty(); }
268 
270  bool hasStoreBarrier() const { return !storeBarrierSNs.empty(); }
271 
273  void insertBarrierSN(const DynInstPtr &barr_inst);
274 
277 
279  int id;
281  {
282  MemDepUnitStats(Stats::Group *parent);
293  } stats;
294 };
295 
296 #endif // __CPU_O3_MEM_DEP_UNIT_HH__
MemDepUnit::MemDepEntry::regsReady
bool regsReady
If the registers are ready or not.
Definition: mem_dep_unit.hh:218
MemDepUnit::MemDepHashIt
MemDepHash::iterator MemDepHashIt
Definition: mem_dep_unit.hh:242
MemDepUnit::replay
void replay()
Replays all instructions that have been rescheduled by moving them to the ready list.
Definition: mem_dep_unit_impl.hh:403
MemDepUnit::DynInstConstPtr
Impl::DynInstConstPtr DynInstConstPtr
Definition: mem_dep_unit.hh:87
MemDepUnit::MemDepEntry::name
std::string name() const
Returns the name of the memory dependence entry.
Definition: mem_dep_unit.hh:206
MemDepUnit::takeOverFrom
void takeOverFrom()
Takes over from another CPU's thread.
Definition: mem_dep_unit_impl.hh:154
MemDepUnit::id
int id
The thread id of this memory dependence unit.
Definition: mem_dep_unit.hh:279
MemDepUnit::ListIt
std::list< DynInstPtr >::iterator ListIt
Definition: mem_dep_unit.hh:166
MemDepUnit::_name
std::string _name
Definition: mem_dep_unit.hh:83
MemDepUnit::nonSpecInstReady
void nonSpecInstReady(const DynInstPtr &inst)
Indicate that a non-speculative instruction is ready.
Definition: mem_dep_unit_impl.hh:383
ArmISA::i
Bitfield< 7 > i
Definition: miscregs_types.hh:63
ThreadID
int16_t ThreadID
Thread index/ID type.
Definition: types.hh:233
MemDepUnit::MemDepUnitStats
Definition: mem_dep_unit.hh:280
MemDepUnit::MemDepHash
std::unordered_map< InstSeqNum, MemDepEntryPtr, SNHash > MemDepHash
Definition: mem_dep_unit.hh:240
MemDepUnit::wakeDependents
void wakeDependents(const DynInstPtr &inst)
Wakes any dependents of a memory instruction.
Definition: mem_dep_unit_impl.hh:480
MemDepUnit::isDrained
bool isDrained() const
Determine if we are drained.
Definition: mem_dep_unit_impl.hh:129
MemDepUnit::hasLoadBarrier
bool hasLoadBarrier() const
Is there an outstanding load barrier that loads must wait on.
Definition: mem_dep_unit.hh:267
MemDepUnit::issue
void issue(const DynInstPtr &inst)
Issues the given instruction.
Definition: mem_dep_unit_impl.hh:581
MemDepUnit::MemDepEntry::~MemDepEntry
~MemDepEntry()
Frees any pointers.
Definition: mem_dep_unit.hh:192
std::vector< MemDepEntryPtr >
MemDepUnit::MemDepUnit
MemDepUnit()
Empty constructor.
Definition: mem_dep_unit_impl.hh:55
MemDepUnit::memDepHash
MemDepHash memDepHash
A hash map of all memory dependence entries.
Definition: mem_dep_unit.hh:245
MemDepUnit::completeInst
void completeInst(const DynInstPtr &inst)
Notifies completion of an instruction.
Definition: mem_dep_unit_impl.hh:448
MemDepUnit::MemDepUnitStats::insertedLoads
Stats::Scalar insertedLoads
Stat for number of inserted loads.
Definition: mem_dep_unit.hh:284
MemDepUnit::violation
void violation(const DynInstPtr &store_inst, const DynInstPtr &violating_load)
Indicates an ordering violation between a store and a younger load.
Definition: mem_dep_unit_impl.hh:569
MemDepUnit::iqPtr
InstructionQueue< Impl > * iqPtr
Pointer to the IQ.
Definition: mem_dep_unit.hh:276
Stats::Scalar
This is a simple scalar statistic, like a counter.
Definition: statistics.hh:1933
MemDepUnit::findInHash
MemDepEntryPtr & findInHash(const DynInstConstPtr &inst)
Finds the memory dependence entry in the hash map.
Definition: mem_dep_unit_impl.hh:591
MemDepUnit::MemDepEntry::MemDepEntry
MemDepEntry(const DynInstPtr &new_inst)
Constructs a memory dependence entry.
Definition: mem_dep_unit.hh:179
MemDepUnit::MemDepUnitStats::insertedStores
Stats::Scalar insertedStores
Stat for number of inserted stores.
Definition: mem_dep_unit.hh:286
MemDepUnit::squash
void squash(const InstSeqNum &squashed_num, ThreadID tid)
Squashes all instructions up until a given sequence number for a specific thread.
Definition: mem_dep_unit_impl.hh:517
MemDepUnit::instsToReplay
std::list< DynInstPtr > instsToReplay
A list of all instructions that are going to be replayed.
Definition: mem_dep_unit.hh:251
MemDepUnit::dumpLists
void dumpLists()
Debugging function to dump the lists of instructions.
Definition: mem_dep_unit_impl.hh:615
MemDepUnit::insertNonSpec
void insertNonSpec(const DynInstPtr &inst)
Inserts a non-speculative memory instruction.
Definition: mem_dep_unit_impl.hh:315
ArmISA::a
Bitfield< 8 > a
Definition: miscregs_types.hh:62
inst_seq.hh
MemDepUnit::init
void init(const DerivO3CPUParams &params, ThreadID tid, O3CPU *cpu)
Initializes the unit with parameters and a thread id.
Definition: mem_dep_unit_impl.hh:99
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:237
MemDepUnit::~MemDepUnit
~MemDepUnit()
Frees up any memory allocated.
Definition: mem_dep_unit_impl.hh:73
statistics.hh
MemDepUnit::reschedule
void reschedule(const DynInstPtr &inst)
Reschedules an instruction to be re-executed.
Definition: mem_dep_unit_impl.hh:396
MemDepUnit::MemDepEntry::listIt
ListIt listIt
The iterator to the instruction's location inside the list.
Definition: mem_dep_unit.hh:212
MemDepUnit::moveToReady
void moveToReady(MemDepEntryPtr &ready_inst_entry)
Moves an entry to the ready list.
Definition: mem_dep_unit_impl.hh:602
MemDepUnit::MemDepEntry::inst
DynInstPtr inst
The instruction being tracked.
Definition: mem_dep_unit.hh:209
InstSeqNum
uint64_t InstSeqNum
Definition: inst_seq.hh:37
MemDepUnit::setIQ
void setIQ(InstructionQueue< Impl > *iq_ptr)
Sets the pointer to the IQ.
Definition: mem_dep_unit_impl.hh:164
MemDepUnit::MemDepEntry::memDeps
int memDeps
Number of memory dependencies that need to be satisfied.
Definition: mem_dep_unit.hh:220
MemDepUnit::instList
std::list< DynInstPtr > instList[Impl::MaxThreads]
A list of all instructions in the memory dependence unit.
Definition: mem_dep_unit.hh:248
MemDepUnit::insertBarrier
void insertBarrier(const DynInstPtr &barr_inst)
Inserts a barrier instruction.
Definition: mem_dep_unit_impl.hh:337
MemDepUnit::regsReady
void regsReady(const DynInstPtr &inst)
Indicate that an instruction has its registers ready.
Definition: mem_dep_unit_impl.hh:360
MemDepUnit::stats
MemDepUnit::MemDepUnitStats stats
MemDepUnit::storeBarrierSNs
std::unordered_set< InstSeqNum > storeBarrierSNs
Sequence numbers of outstanding store barriers.
Definition: mem_dep_unit.hh:264
MemDepUnit::insert
void insert(const DynInstPtr &inst)
Inserts a memory instruction.
Definition: mem_dep_unit_impl.hh:204
MemDepUnit::MemDepUnitStats::conflictingLoads
Stats::Scalar conflictingLoads
Stat for number of conflicting loads that had to wait for a store.
Definition: mem_dep_unit.hh:289
SNHash::operator()
size_t operator()(const InstSeqNum &seq_num) const
Definition: mem_dep_unit.hh:55
MemDepUnit::MemDepEntry::completed
bool completed
If the instruction is completed.
Definition: mem_dep_unit.hh:222
MemDepUnit::insertBarrierSN
void insertBarrierSN(const DynInstPtr &barr_inst)
Inserts the SN of a barrier inst.
Definition: mem_dep_unit_impl.hh:171
MemDepUnit::depPred
MemDepPred depPred
The memory dependence predictor.
Definition: mem_dep_unit.hh:258
Stats::Group
Statistics container.
Definition: group.hh:87
InstructionQueue
A standard instruction queue class.
Definition: inst_queue.hh:81
MemDepUnit::name
std::string name() const
Returns the name of the memory dependence unit.
Definition: mem_dep_unit.hh:100
MemDepUnit::DynInstPtr
Impl::DynInstPtr DynInstPtr
Definition: mem_dep_unit.hh:86
SNHash
Definition: mem_dep_unit.hh:54
MemDepUnit::MemDepEntry::squashed
bool squashed
If the instruction is squashed.
Definition: mem_dep_unit.hh:224
MemDepUnit::MemDepEntryPtr
std::shared_ptr< MemDepEntry > MemDepEntryPtr
Definition: mem_dep_unit.hh:168
MemDepUnit::drainSanityCheck
void drainSanityCheck() const
Perform sanity checks after a drain.
Definition: mem_dep_unit_impl.hh:142
MemDepUnit
Memory dependency unit class.
Definition: mem_dep_unit.hh:80
std::list
STL list class.
Definition: stl.hh:51
MemDepUnit::O3CPU
Impl::O3CPU O3CPU
Definition: mem_dep_unit.hh:88
MemDepUnit::hasStoreBarrier
bool hasStoreBarrier() const
Is there an outstanding store barrier that loads must wait on.
Definition: mem_dep_unit.hh:270
MemDepUnit::completed
void completed(const DynInstPtr &inst)
Completes a memory instruction.
Definition: mem_dep_unit_impl.hh:424
MemDepUnit::MemDepEntry::dependInsts
std::vector< MemDepEntryPtr > dependInsts
A vector of any dependent instructions.
Definition: mem_dep_unit.hh:215
MemDepUnit::MemDepEntry
Memory dependence entries that track memory operations, marking when the instruction is ready to exec...
Definition: mem_dep_unit.hh:176
MemDepUnit::MemDepUnitStats::conflictingStores
Stats::Scalar conflictingStores
Stat for number of conflicting stores that had to wait for a store.
Definition: mem_dep_unit.hh:292
MemDepUnit::loadBarrierSNs
std::unordered_set< InstSeqNum > loadBarrierSNs
Sequence numbers of outstanding load barriers.
Definition: mem_dep_unit.hh:261
MemDepUnit::MemDepUnitStats::MemDepUnitStats
MemDepUnitStats(Stats::Group *parent)
Definition: mem_dep_unit_impl.hh:116

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