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decoder.hh
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28 
29 #ifndef __ARCH_MIPS_DECODER_HH__
30 #define __ARCH_MIPS_DECODER_HH__
31 
33 #include "arch/generic/decoder.hh"
34 #include "arch/mips/types.hh"
35 #include "base/logging.hh"
36 #include "base/types.hh"
37 #include "cpu/static_inst.hh"
38 #include "debug/Decode.hh"
39 
40 namespace MipsISA
41 {
42 
43 class ISA;
44 class Decoder : public InstDecoder
45 {
46  protected:
47  //The extended machine instruction being generated
49  bool instDone;
50 
51  public:
52  Decoder(ISA* isa = nullptr) : instDone(false)
53  {}
54 
55  void
57  {
58  }
59 
60  void
62  {
63  instDone = false;
64  }
65 
66  //Use this to give data to the decoder. This should be used
67  //when there is control flow.
68  void
69  moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
70  {
71  emi = letoh(inst);
72  instDone = true;
73  }
74 
75  bool
77  {
78  return true;
79  }
80 
81  bool
83  {
84  return instDone;
85  }
86 
87  void takeOverFrom(Decoder *old) {}
88 
89  protected:
92 
93  public:
95 
101  {
102  StaticInstPtr si = defaultCache.decode(this, mach_inst, addr);
103  DPRINTF(Decode, "Decode: Decoded %s instruction: %#x\n",
104  si->getName(), mach_inst);
105  return si;
106  }
107 
110  {
111  if (!instDone)
112  return NULL;
113  instDone = false;
114  return decode(emi, nextPC.instAddr());
115  }
116 };
117 
118 } // namespace MipsISA
119 
120 #endif // __ARCH_MIPS_DECODER_HH__
MipsISA::ISA
Definition: isa.hh:51
MipsISA::Decoder::decode
StaticInstPtr decode(MipsISA::PCState &nextPC)
Definition: decoder.hh:109
MipsISA::Decoder::needMoreBytes
bool needMoreBytes()
Definition: decoder.hh:76
MipsISA::Decoder::process
void process()
Definition: decoder.hh:56
types.hh
decode_cache.hh
MipsISA::Decoder::reset
void reset()
Definition: decoder.hh:61
ArmISA::si
Bitfield< 6 > si
Definition: miscregs_types.hh:766
MipsISA::Decoder::instDone
bool instDone
Definition: decoder.hh:49
GenericISA::BasicDecodeCache
Definition: decode_cache.hh:40
MipsISA::Decoder
Definition: decoder.hh:44
MipsISA
Definition: decoder.cc:31
MipsISA::Decoder::defaultCache
static GenericISA::BasicDecodeCache< Decoder, ExtMachInst > defaultCache
A cache of decoded instruction objects.
Definition: decoder.hh:91
MipsISA::Decoder::decodeInst
StaticInstPtr decodeInst(ExtMachInst mach_inst)
letoh
T letoh(T value)
Definition: byteswap.hh:142
decoder.hh
MipsISA::MachInst
uint32_t MachInst
Definition: types.hh:38
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:237
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
MipsISA::Decoder::moreBytes
void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
Definition: decoder.hh:69
MipsISA::Decoder::takeOverFrom
void takeOverFrom(Decoder *old)
Definition: decoder.hh:87
static_inst.hh
GenericISA::PCStateBase::instAddr
Addr instAddr() const
Returns the memory address the bytes of this instruction came from.
Definition: types.hh:80
GenericISA::DelaySlotPCState
Definition: types.hh:312
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:148
X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:80
MipsISA::Decoder::instReady
bool instReady()
Definition: decoder.hh:82
MipsISA::Decoder::Decoder
Decoder(ISA *isa=nullptr)
Definition: decoder.hh:52
types.hh
logging.hh
InstDecoder
Definition: decoder.hh:34
RefCountingPtr< StaticInst >
MipsISA::Decoder::decode
StaticInstPtr decode(ExtMachInst mach_inst, Addr addr)
Decode a machine instruction.
Definition: decoder.hh:100
MipsISA::Decoder::emi
ExtMachInst emi
Definition: decoder.hh:48
MipsISA::ExtMachInst
uint64_t ExtMachInst
Definition: types.hh:39

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