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pl111.cc
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1 /*
2  * Copyright (c) 2010-2012, 2015 ARM Limited
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37 
38 #include "dev/arm/pl111.hh"
39 
40 #include "base/output.hh"
41 #include "base/trace.hh"
42 #include "base/vnc/vncinput.hh"
43 #include "debug/PL111.hh"
44 #include "debug/Uart.hh"
45 #include "dev/arm/amba_device.hh"
46 #include "dev/arm/base_gic.hh"
47 #include "mem/packet.hh"
48 #include "mem/packet_access.hh"
49 #include "sim/system.hh"
50 
51 // clang complains about std::set being overloaded with Packet::set if
52 // we open up the entire namespace std
53 using std::vector;
54 
55 // initialize clcd registers
57  : AmbaDmaDevice(p, 0x10000), lcdTiming0(0), lcdTiming1(0), lcdTiming2(0),
58  lcdTiming3(0), lcdUpbase(0), lcdLpbase(0), lcdControl(0), lcdImsc(0),
59  lcdRis(0), lcdMis(0),
60  clcdCrsrCtrl(0), clcdCrsrConfig(0), clcdCrsrPalette0(0),
61  clcdCrsrPalette1(0), clcdCrsrXY(0), clcdCrsrClip(0), clcdCrsrImsc(0),
62  clcdCrsrIcr(0), clcdCrsrRis(0), clcdCrsrMis(0),
63  pixelClock(p.pixel_clock),
64  converter(PixelConverter::rgba8888_le), fb(LcdMaxWidth, LcdMaxHeight),
65  vnc(p.vnc), bmp(&fb), pic(NULL),
66  width(LcdMaxWidth), height(LcdMaxHeight),
67  bytesPerPixel(4), startTime(0), startAddr(0), maxAddr(0), curAddr(0),
68  waterMark(0), dmaPendingNum(0),
69  readEvent([this]{ readFramebuffer(); }, name()),
70  fillFifoEvent([this]{ fillFifo(); }, name()),
71  dmaDoneEventAll(maxOutstandingDma, this),
72  dmaDoneEventFree(maxOutstandingDma),
73  intEvent([this]{ generateInterrupt(); }, name()),
74  enableCapture(p.enable_capture)
75 {
76  dmaBuffer = new uint8_t[buffer_size];
77 
78  memset(lcdPalette, 0, sizeof(lcdPalette));
79  memset(cursorImage, 0, sizeof(cursorImage));
80  memset(dmaBuffer, 0, buffer_size);
81 
82  for (int i = 0; i < maxOutstandingDma; ++i)
83  dmaDoneEventFree[i] = &dmaDoneEventAll[i];
84 
85  if (vnc)
86  vnc->setFrameBuffer(&fb);
87 }
88 
90 {
91  delete[] dmaBuffer;
92 }
93 
94 // read registers and frame buffer
95 Tick
97 {
98  // use a temporary data since the LCD registers are read/written with
99  // different size operations
100 
101  uint32_t data = 0;
102 
103  assert(pkt->getAddr() >= pioAddr &&
104  pkt->getAddr() < pioAddr + pioSize);
105 
106  Addr daddr = pkt->getAddr() - pioAddr;
107 
108  DPRINTF(PL111, " read register %#x size=%d\n", daddr, pkt->getSize());
109 
110  switch (daddr) {
111  case LcdTiming0:
112  data = lcdTiming0;
113  break;
114  case LcdTiming1:
115  data = lcdTiming1;
116  break;
117  case LcdTiming2:
118  data = lcdTiming2;
119  break;
120  case LcdTiming3:
121  data = lcdTiming3;
122  break;
123  case LcdUpBase:
124  data = lcdUpbase;
125  break;
126  case LcdLpBase:
127  data = lcdLpbase;
128  break;
129  case LcdControl:
130  data = lcdControl;
131  break;
132  case LcdImsc:
133  data = lcdImsc;
134  break;
135  case LcdRis:
136  data = lcdRis;
137  break;
138  case LcdMis:
139  data = lcdMis;
140  break;
141  case LcdIcr:
142  panic("LCD register at offset %#x is Write-Only\n", daddr);
143  break;
144  case LcdUpCurr:
145  data = curAddr;
146  break;
147  case LcdLpCurr:
148  data = curAddr;
149  break;
150  case ClcdCrsrCtrl:
151  data = clcdCrsrCtrl;
152  break;
153  case ClcdCrsrConfig:
155  break;
156  case ClcdCrsrPalette0:
158  break;
159  case ClcdCrsrPalette1:
161  break;
162  case ClcdCrsrXY:
163  data = clcdCrsrXY;
164  break;
165  case ClcdCrsrClip:
166  data = clcdCrsrClip;
167  break;
168  case ClcdCrsrImsc:
169  data = clcdCrsrImsc;
170  break;
171  case ClcdCrsrIcr:
172  panic("CLCD register at offset %#x is Write-Only\n", daddr);
173  break;
174  case ClcdCrsrRis:
175  data = clcdCrsrRis;
176  break;
177  case ClcdCrsrMis:
178  data = clcdCrsrMis;
179  break;
180  default:
181  if (readId(pkt, AMBA_ID, pioAddr)) {
182  // Hack for variable size accesses
183  data = pkt->getUintX(ByteOrder::little);
184  break;
185  } else if (daddr >= CrsrImage && daddr <= 0xBFC) {
186  // CURSOR IMAGE
187  int index;
188  index = (daddr - CrsrImage) >> 2;
190  break;
191  } else if (daddr >= LcdPalette && daddr <= 0x3FC) {
192  // LCD Palette
193  int index;
194  index = (daddr - LcdPalette) >> 2;
195  data = lcdPalette[index];
196  break;
197  } else {
198  panic("Tried to read CLCD register at offset %#x that "
199  "doesn't exist\n", daddr);
200  break;
201  }
202  }
203 
204  pkt->setUintX(data, ByteOrder::little);
205  pkt->makeAtomicResponse();
206  return pioDelay;
207 }
208 
209 // write registers and frame buffer
210 Tick
212 {
213  // use a temporary data since the LCD registers are read/written with
214  // different size operations
215  //
216  const uint32_t data = pkt->getUintX(ByteOrder::little);
217 
218  assert(pkt->getAddr() >= pioAddr &&
219  pkt->getAddr() < pioAddr + pioSize);
220 
221  Addr daddr = pkt->getAddr() - pioAddr;
222 
223  DPRINTF(PL111, " write register %#x value %#x size=%d\n", daddr,
224  pkt->getLE<uint8_t>(), pkt->getSize());
225 
226  switch (daddr) {
227  case LcdTiming0:
228  lcdTiming0 = data;
229  // width = 16 * (PPL+1)
230  width = (lcdTiming0.ppl + 1) << 4;
231  break;
232  case LcdTiming1:
233  lcdTiming1 = data;
234  // height = LPP + 1
235  height = (lcdTiming1.lpp) + 1;
236  break;
237  case LcdTiming2:
238  lcdTiming2 = data;
239  break;
240  case LcdTiming3:
241  lcdTiming3 = data;
242  break;
243  case LcdUpBase:
244  lcdUpbase = data;
245  DPRINTF(PL111, "####### Upper panel base set to: %#x #######\n", lcdUpbase);
246  break;
247  case LcdLpBase:
248  warn_once("LCD dual screen mode not supported\n");
249  lcdLpbase = data;
250  DPRINTF(PL111, "###### Lower panel base set to: %#x #######\n", lcdLpbase);
251  break;
252  case LcdControl:
253  int old_lcdpwr;
254  old_lcdpwr = lcdControl.lcdpwr;
255  lcdControl = data;
256 
257  DPRINTF(PL111, "LCD power is:%d\n", lcdControl.lcdpwr);
258 
259  // LCD power enable
260  if (lcdControl.lcdpwr && !old_lcdpwr) {
262  DPRINTF(PL111, " lcd size: height %d width %d\n", height, width);
263  waterMark = lcdControl.watermark ? 8 : 4;
264  startDma();
265  }
266  break;
267  case LcdImsc:
268  lcdImsc = data;
269  if (lcdImsc.vcomp)
270  panic("Interrupting on vcomp not supported\n");
271 
272  lcdMis = lcdImsc & lcdRis;
273 
274  if (!lcdMis)
275  interrupt->clear();
276 
277  break;
278  case LcdRis:
279  panic("LCD register at offset %#x is Read-Only\n", daddr);
280  break;
281  case LcdMis:
282  panic("LCD register at offset %#x is Read-Only\n", daddr);
283  break;
284  case LcdIcr:
285  lcdRis = lcdRis & ~data;
286  lcdMis = lcdImsc & lcdRis;
287 
288  if (!lcdMis)
289  interrupt->clear();
290 
291  break;
292  case LcdUpCurr:
293  panic("LCD register at offset %#x is Read-Only\n", daddr);
294  break;
295  case LcdLpCurr:
296  panic("LCD register at offset %#x is Read-Only\n", daddr);
297  break;
298  case ClcdCrsrCtrl:
299  clcdCrsrCtrl = data;
300  break;
301  case ClcdCrsrConfig:
303  break;
304  case ClcdCrsrPalette0:
306  break;
307  case ClcdCrsrPalette1:
309  break;
310  case ClcdCrsrXY:
311  clcdCrsrXY = data;
312  break;
313  case ClcdCrsrClip:
314  clcdCrsrClip = data;
315  break;
316  case ClcdCrsrImsc:
317  clcdCrsrImsc = data;
318  break;
319  case ClcdCrsrIcr:
320  clcdCrsrIcr = data;
321  break;
322  case ClcdCrsrRis:
323  panic("CLCD register at offset %#x is Read-Only\n", daddr);
324  break;
325  case ClcdCrsrMis:
326  panic("CLCD register at offset %#x is Read-Only\n", daddr);
327  break;
328  default:
329  if (daddr >= CrsrImage && daddr <= 0xBFC) {
330  // CURSOR IMAGE
331  int index;
332  index = (daddr - CrsrImage) >> 2;
334  break;
335  } else if (daddr >= LcdPalette && daddr <= 0x3FC) {
336  // LCD Palette
337  int index;
338  index = (daddr - LcdPalette) >> 2;
339  lcdPalette[index] = data;
340  break;
341  } else {
342  panic("Tried to write PL111 register at offset %#x that "
343  "doesn't exist\n", daddr);
344  break;
345  }
346  }
347 
348  pkt->makeAtomicResponse();
349  return pioDelay;
350 }
351 
354 {
355  unsigned rw, gw, bw;
356  unsigned offsets[3];
357 
358  switch (lcdControl.lcdbpp) {
359  case bpp24:
360  rw = gw = bw = 8;
361  offsets[0] = 0;
362  offsets[1] = 8;
363  offsets[2] = 16;
364  break;
365 
366  case bpp16m565:
367  rw = 5;
368  gw = 6;
369  bw = 5;
370  offsets[0] = 0;
371  offsets[1] = 5;
372  offsets[2] = 11;
373  break;
374 
375  default:
376  panic("Unimplemented video mode\n");
377  }
378 
379  if (lcdControl.bgr) {
380  return PixelConverter(
382  offsets[2], offsets[1], offsets[0],
383  rw, gw, bw,
384  ByteOrder::little);
385  } else {
386  return PixelConverter(
388  offsets[0], offsets[1], offsets[2],
389  rw, gw, bw,
390  ByteOrder::little);
391  }
392 }
393 
394 void
396 {
397  if (lcdControl.lcdbpp == bpp24) {
398  bytesPerPixel = 4;
399  } else if (lcdControl.lcdbpp == bpp16m565) {
400  bytesPerPixel = 2;
401  }
402 
403  fb.resize(width, height);
405 
406  // Workaround configuration bugs where multiple display
407  // controllers are attached to the same VNC server by reattaching
408  // enabled devices. This isn't ideal, but works as long as only
409  // one display controller is active at a time.
410  if (lcdControl.lcdpwr && vnc)
411  vnc->setFrameBuffer(&fb);
412 }
413 
414 void
416 {
417  if (dmaPendingNum != 0 || readEvent.scheduled())
418  return;
419  readFramebuffer();
420 }
421 
422 void
424 {
425  // initialization for dma read from frame buffer to dma buffer
426  uint32_t length = height * width;
427  if (startAddr != lcdUpbase)
429 
430  // Updating base address, interrupt if we're supposed to
431  lcdRis.baseaddr = 1;
432  if (!intEvent.scheduled())
434 
435  curAddr = 0;
436  startTime = curTick();
437 
438  maxAddr = static_cast<Addr>(length * bytesPerPixel);
439 
440  DPRINTF(PL111, " lcd frame buffer size of %d bytes \n", maxAddr);
441 
442  fillFifo();
443 }
444 
445 void
447 {
448  while ((dmaPendingNum < maxOutstandingDma) && (maxAddr >= curAddr + dmaSize )) {
449  // concurrent dma reads need different dma done events
450  // due to assertion in scheduling state
451  ++dmaPendingNum;
452 
453  assert(!dmaDoneEventFree.empty());
454  DmaDoneEvent *event(dmaDoneEventFree.back());
455  dmaDoneEventFree.pop_back();
456  assert(!event->scheduled());
457 
458  // We use a uncachable request here because the requests from the CPU
459  // will be uncacheable as well. If we have uncacheable and cacheable
460  // requests in the memory system for the same address it won't be
461  // pleased
465  curAddr += dmaSize;
466  }
467 }
468 
469 void
471 {
472  DPRINTF(PL111, "DMA Done\n");
473 
474  Tick maxFrameTime = lcdTiming2.cpl * height * pixelClock;
475 
476  --dmaPendingNum;
477 
478  if (maxAddr == curAddr && !dmaPendingNum) {
479  if ((curTick() - startTime) > maxFrameTime) {
480  warn("CLCD controller buffer underrun, took %d ticks when should"
481  " have taken %d\n", curTick() - startTime, maxFrameTime);
482  lcdRis.underflow = 1;
483  if (!intEvent.scheduled())
485  }
486 
487  assert(!readEvent.scheduled());
489  if (vnc)
490  vnc->setDirty();
491 
492  if (enableCapture) {
493  DPRINTF(PL111, "-- write out frame buffer into bmp\n");
494 
495  if (!pic)
496  pic = simout.create(csprintf("%s.framebuffer.bmp", sys->name()),
497  true);
498 
499  assert(pic);
500  pic->stream()->seekp(0);
501  bmp.write(*pic->stream());
502  }
503 
504  // schedule the next read based on when the last frame started
505  // and the desired fps (i.e. maxFrameTime), we turn the
506  // argument into a relative number of cycles in the future
507  if (lcdControl.lcden)
509  curTick() +
510  maxFrameTime)));
511  }
512 
514  return;
515 
516  if (!fillFifoEvent.scheduled())
518 }
519 
520 void
522 {
523  DPRINTF(PL111, "Serializing ARM PL111\n");
524 
525  uint32_t lcdTiming0_serial = lcdTiming0;
526  SERIALIZE_SCALAR(lcdTiming0_serial);
527 
528  uint32_t lcdTiming1_serial = lcdTiming1;
529  SERIALIZE_SCALAR(lcdTiming1_serial);
530 
531  uint32_t lcdTiming2_serial = lcdTiming2;
532  SERIALIZE_SCALAR(lcdTiming2_serial);
533 
534  uint32_t lcdTiming3_serial = lcdTiming3;
535  SERIALIZE_SCALAR(lcdTiming3_serial);
536 
539 
540  uint32_t lcdControl_serial = lcdControl;
541  SERIALIZE_SCALAR(lcdControl_serial);
542 
543  uint8_t lcdImsc_serial = lcdImsc;
544  SERIALIZE_SCALAR(lcdImsc_serial);
545 
546  uint8_t lcdRis_serial = lcdRis;
547  SERIALIZE_SCALAR(lcdRis_serial);
548 
549  uint8_t lcdMis_serial = lcdMis;
550  SERIALIZE_SCALAR(lcdMis_serial);
551 
554 
561 
562  uint8_t clcdCrsrImsc_serial = clcdCrsrImsc;
563  SERIALIZE_SCALAR(clcdCrsrImsc_serial);
564 
565  uint8_t clcdCrsrIcr_serial = clcdCrsrIcr;
566  SERIALIZE_SCALAR(clcdCrsrIcr_serial);
567 
568  uint8_t clcdCrsrRis_serial = clcdCrsrRis;
569  SERIALIZE_SCALAR(clcdCrsrRis_serial);
570 
571  uint8_t clcdCrsrMis_serial = clcdCrsrMis;
572  SERIALIZE_SCALAR(clcdCrsrMis_serial);
573 
577 
585 
586  Tick int_event_time = 0;
587  Tick read_event_time = 0;
588  Tick fill_fifo_event_time = 0;
589 
590  if (readEvent.scheduled())
591  read_event_time = readEvent.when();
592  if (fillFifoEvent.scheduled())
593  fill_fifo_event_time = fillFifoEvent.when();
594  if (intEvent.scheduled())
595  int_event_time = intEvent.when();
596 
597  SERIALIZE_SCALAR(read_event_time);
598  SERIALIZE_SCALAR(fill_fifo_event_time);
599  SERIALIZE_SCALAR(int_event_time);
600 
601  vector<Tick> dma_done_event_tick;
602  dma_done_event_tick.resize(maxOutstandingDma);
603  for (int x = 0; x < maxOutstandingDma; x++) {
604  dma_done_event_tick[x] = dmaDoneEventAll[x].scheduled() ?
605  dmaDoneEventAll[x].when() : 0;
606  }
607  SERIALIZE_CONTAINER(dma_done_event_tick);
608 }
609 
610 void
612 {
613  DPRINTF(PL111, "Unserializing ARM PL111\n");
614 
615  uint32_t lcdTiming0_serial;
616  UNSERIALIZE_SCALAR(lcdTiming0_serial);
617  lcdTiming0 = lcdTiming0_serial;
618 
619  uint32_t lcdTiming1_serial;
620  UNSERIALIZE_SCALAR(lcdTiming1_serial);
621  lcdTiming1 = lcdTiming1_serial;
622 
623  uint32_t lcdTiming2_serial;
624  UNSERIALIZE_SCALAR(lcdTiming2_serial);
625  lcdTiming2 = lcdTiming2_serial;
626 
627  uint32_t lcdTiming3_serial;
628  UNSERIALIZE_SCALAR(lcdTiming3_serial);
629  lcdTiming3 = lcdTiming3_serial;
630 
633 
634  uint32_t lcdControl_serial;
635  UNSERIALIZE_SCALAR(lcdControl_serial);
636  lcdControl = lcdControl_serial;
637 
638  uint8_t lcdImsc_serial;
639  UNSERIALIZE_SCALAR(lcdImsc_serial);
640  lcdImsc = lcdImsc_serial;
641 
642  uint8_t lcdRis_serial;
643  UNSERIALIZE_SCALAR(lcdRis_serial);
644  lcdRis = lcdRis_serial;
645 
646  uint8_t lcdMis_serial;
647  UNSERIALIZE_SCALAR(lcdMis_serial);
648  lcdMis = lcdMis_serial;
649 
652 
659 
660  uint8_t clcdCrsrImsc_serial;
661  UNSERIALIZE_SCALAR(clcdCrsrImsc_serial);
662  clcdCrsrImsc = clcdCrsrImsc_serial;
663 
664  uint8_t clcdCrsrIcr_serial;
665  UNSERIALIZE_SCALAR(clcdCrsrIcr_serial);
666  clcdCrsrIcr = clcdCrsrIcr_serial;
667 
668  uint8_t clcdCrsrRis_serial;
669  UNSERIALIZE_SCALAR(clcdCrsrRis_serial);
670  clcdCrsrRis = clcdCrsrRis_serial;
671 
672  uint8_t clcdCrsrMis_serial;
673  UNSERIALIZE_SCALAR(clcdCrsrMis_serial);
674  clcdCrsrMis = clcdCrsrMis_serial;
675 
679 
687 
688  Tick int_event_time = 0;
689  Tick read_event_time = 0;
690  Tick fill_fifo_event_time = 0;
691 
692  UNSERIALIZE_SCALAR(read_event_time);
693  UNSERIALIZE_SCALAR(fill_fifo_event_time);
694  UNSERIALIZE_SCALAR(int_event_time);
695 
696  if (int_event_time)
697  schedule(intEvent, int_event_time);
698  if (read_event_time)
699  schedule(readEvent, read_event_time);
700  if (fill_fifo_event_time)
701  schedule(fillFifoEvent, fill_fifo_event_time);
702 
703  vector<Tick> dma_done_event_tick;
704  dma_done_event_tick.resize(maxOutstandingDma);
705  UNSERIALIZE_CONTAINER(dma_done_event_tick);
706  dmaDoneEventFree.clear();
707  for (int x = 0; x < maxOutstandingDma; x++) {
708  if (dma_done_event_tick[x])
709  schedule(dmaDoneEventAll[x], dma_done_event_tick[x]);
710  else
711  dmaDoneEventFree.push_back(&dmaDoneEventAll[x]);
712  }
714 
715  if (lcdControl.lcdpwr) {
718  if (vnc)
719  vnc->setDirty();
720  }
721 }
722 
723 void
725 {
726  DPRINTF(PL111, "Generate Interrupt: lcdImsc=0x%x lcdRis=0x%x lcdMis=0x%x\n",
727  (uint32_t)lcdImsc, (uint32_t)lcdRis, (uint32_t)lcdMis);
728  lcdMis = lcdImsc & lcdRis;
729 
730  if (lcdMis.underflow || lcdMis.baseaddr || lcdMis.vcomp || lcdMis.ahbmaster) {
731  interrupt->raise();
732  DPRINTF(PL111, " -- Generated\n");
733  }
734 }
735 
738 {
739  AddrRangeList ranges;
740  ranges.push_back(RangeSize(pioAddr, pioSize));
741  return ranges;
742 }
Pl111::enableCapture
bool enableCapture
Definition: pl111.hh:356
Pl111::getAddrRanges
AddrRangeList getAddrRanges() const override
Determine the address ranges that this device responds to.
Definition: pl111.cc:737
Event::scheduled
bool scheduled() const
Determine if the current event is scheduled.
Definition: eventq.hh:462
Pl111::lcdMis
InterruptReg lcdMis
Masked interrupt status register.
Definition: pl111.hh:218
Pl111::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl111.cc:96
Packet::makeAtomicResponse
void makeAtomicResponse()
Definition: packet.hh:1017
Pl111::ClcdCrsrPalette0
static const int ClcdCrsrPalette0
Definition: pl111.hh:80
warn
#define warn(...)
Definition: logging.hh:239
Pl111::LcdTiming1
static const int LcdTiming1
Definition: pl111.hh:64
Pl111::ClcdCrsrImsc
static const int ClcdCrsrImsc
Definition: pl111.hh:84
system.hh
Pl111::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: pl111.cc:611
data
const char data[]
Definition: circlebuf.test.cc:47
MipsISA::index
Bitfield< 30, 0 > index
Definition: pra_constants.hh:44
AmbaDmaDevice
Definition: amba_device.hh:97
UNSERIALIZE_SCALAR
#define UNSERIALIZE_SCALAR(scalar)
Definition: serialize.hh:591
Pl111::fb
FrameBuffer fb
Definition: pl111.hh:260
Packet::getAddr
Addr getAddr() const
Definition: packet.hh:755
PixelConverter
Configurable RGB pixel converter.
Definition: pixel.hh:88
Pl111::Pl111
Pl111(const Params &p)
Definition: pl111.cc:56
Pl111::LcdTiming0
static const int LcdTiming0
ARM PL111 register map.
Definition: pl111.hh:63
FrameBuffer::copyIn
void copyIn(const uint8_t *fb, const PixelConverter &conv)
Fill the frame buffer with pixel data from an external buffer of the same width and height as this fr...
Definition: framebuffer.cc:104
warn_once
#define warn_once(...)
Definition: logging.hh:243
ArmISA::i
Bitfield< 7 > i
Definition: miscregs_types.hh:63
UNSERIALIZE_CONTAINER
#define UNSERIALIZE_CONTAINER(member)
Definition: serialize.hh:650
Pl111::LcdIcr
static const int LcdIcr
Definition: pl111.hh:73
ArmInterruptPin::clear
virtual void clear()=0
Clear a signalled interrupt.
Pl111::clcdCrsrCtrl
uint32_t clcdCrsrCtrl
Cursor control register.
Definition: pl111.hh:229
Pl111::LcdTiming3
static const int LcdTiming3
Definition: pl111.hh:66
amba_device.hh
Pl111::ClcdCrsrConfig
static const int ClcdCrsrConfig
Definition: pl111.hh:79
FrameBuffer::resize
void resize(unsigned width, unsigned height)
Resize the frame buffer.
Definition: framebuffer.cc:80
Pl111::CrsrImage
static const int CrsrImage
Definition: pl111.hh:77
BmpWriter::write
void write(std::ostream &bmp) const override
Write the frame buffer data into the provided ostream.
Definition: bmpwriter.cc:86
ArmISA::width
Bitfield< 4 > width
Definition: miscregs_types.hh:68
Pl111::LcdImsc
static const int LcdImsc
Definition: pl111.hh:70
Pl111::LcdTiming2
static const int LcdTiming2
Definition: pl111.hh:65
base_gic.hh
Pl111::lcdUpbase
uint32_t lcdUpbase
Upper panel frame base address register.
Definition: pl111.hh:203
vncinput.hh
ArmInterruptPin::raise
virtual void raise()=0
Signal an interrupt.
MemCmd::ReadReq
@ ReadReq
Definition: packet.hh:83
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:59
OutputDirectory::create
OutputStream * create(const std::string &name, bool binary=false, bool no_gz=false)
Creates a file in this directory (optionally compressed).
Definition: output.cc:207
Pl111::vnc
VncInput * vnc
VNC server.
Definition: pl111.hh:263
Pl111::lcdTiming1
TimingReg1 lcdTiming1
Vertical axis panel control register.
Definition: pl111.hh:194
Pl111::bpp16m565
@ bpp16m565
Definition: pl111.hh:107
std::vector
STL vector class.
Definition: stl.hh:37
Pl111::clcdCrsrMis
InterruptReg clcdCrsrMis
Cursor masked interrupt status register - const.
Definition: pl111.hh:254
Packet::getSize
unsigned getSize() const
Definition: packet.hh:765
Pl111::buffer_size
static const int buffer_size
Definition: pl111.hh:98
Event::when
Tick when() const
Get the time that the event is scheduled.
Definition: eventq.hh:505
Pl111::lcdRis
InterruptReg lcdRis
Raw interrupt status register - const.
Definition: pl111.hh:215
output.hh
Pl111::pixelClock
Tick pixelClock
Pixel clock.
Definition: pl111.hh:257
Pl111::waterMark
uint32_t waterMark
DMA FIFO watermark.
Definition: pl111.hh:296
VncInput::setDirty
virtual void setDirty()
The frame buffer uses this call to notify the vnc server that the frame buffer has been updated and a...
Definition: vncinput.cc:90
Pl111::updateVideoParams
void updateVideoParams()
Send updated parameters to the vnc server.
Definition: pl111.cc:395
Pl111::lcdControl
ControlReg lcdControl
Control register.
Definition: pl111.hh:209
packet.hh
PioDevice::sys
System * sys
Definition: io_device.hh:102
Pl111::height
uint16_t height
Frame buffer height - lines per panel.
Definition: pl111.hh:275
Pl111::lcdPalette
uint32_t lcdPalette[LcdPaletteSize]
256x16-bit color palette registers 256 palette entries organized as 128 locations of two entries per ...
Definition: pl111.hh:222
DmaDevice::dmaPort
DmaPort dmaPort
Definition: dma_device.hh:203
Pl111::startDma
void startDma()
start the dmas off after power is enabled
Definition: pl111.cc:415
Pl111::clcdCrsrClip
uint32_t clcdCrsrClip
Cursor clip position register.
Definition: pl111.hh:242
Pl111::dmaDone
void dmaDone()
DMA done event.
Definition: pl111.cc:470
AmbaDmaDevice::interrupt
ArmInterruptPin *const interrupt
Definition: amba_device.hh:104
cp
Definition: cprintf.cc:37
Pl111::LcdPalette
static const int LcdPalette
Definition: pl111.hh:76
Pl111::fillFifoEvent
EventFunctionWrapper fillFifoEvent
Fill fifo.
Definition: pl111.hh:328
EventManager::schedule
void schedule(Event &event, Tick when)
Definition: eventq.hh:1016
Pl111::converter
PixelConverter converter
Definition: pl111.hh:259
Pl111::intEvent
EventFunctionWrapper intEvent
Wrapper to create an event out of the interrupt.
Definition: pl111.hh:354
Pl111::maxAddr
Addr maxAddr
Frame buffer max address.
Definition: pl111.hh:290
Pl111::bytesPerPixel
uint8_t bytesPerPixel
Bytes per pixel.
Definition: pl111.hh:278
Packet::getUintX
uint64_t getUintX(ByteOrder endian) const
Get the data in the packet byte swapped from the specified endianness and zero-extended to 64 bits.
Definition: packet.cc:350
OutputStream::stream
std::ostream * stream() const
Get the output underlying output stream.
Definition: output.hh:59
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:237
Pl111::fillFifo
void fillFifo()
fillFIFO event
Definition: pl111.cc:446
Pl111::clcdCrsrImsc
InterruptReg clcdCrsrImsc
Cursor interrupt mask set/clear register.
Definition: pl111.hh:245
Pl111::LcdLpCurr
static const int LcdLpCurr
Definition: pl111.hh:75
MipsISA::event
Bitfield< 10, 5 > event
Definition: pra_constants.hh:297
Pl111::bpp24
@ bpp24
Definition: pl111.hh:106
Pl111::clcdCrsrXY
uint32_t clcdCrsrXY
Cursor XY position register.
Definition: pl111.hh:239
Pl111::clcdCrsrConfig
uint32_t clcdCrsrConfig
Cursor configuration register.
Definition: pl111.hh:232
Clocked::clockEdge
Tick clockEdge(Cycles cycles=Cycles(0)) const
Determine the tick when a cycle begins, by default the current one, but the argument also enables the...
Definition: clocked_object.hh:174
RangeSize
AddrRange RangeSize(Addr start, Addr size)
Definition: addr_range.hh:651
Pl111::startTime
Tick startTime
Start time for frame buffer dma read.
Definition: pl111.hh:284
Pl111::ClcdCrsrMis
static const int ClcdCrsrMis
Definition: pl111.hh:87
Pl111::lcdTiming3
TimingReg3 lcdTiming3
Line end control register.
Definition: pl111.hh:200
Packet::setUintX
void setUintX(uint64_t w, ByteOrder endian)
Set the value in the word w after truncating it to the length of the packet and then byteswapping it ...
Definition: packet.cc:367
AmbaDevice::readId
bool readId(PacketPtr pkt, uint64_t amba_id, Addr pio_addr)
Definition: amba_device.cc:72
VncInput::setFrameBuffer
virtual void setFrameBuffer(const FrameBuffer *rfb)
Set the address of the frame buffer we are going to show.
Definition: vncinput.cc:71
Pl111::ClcdCrsrXY
static const int ClcdCrsrXY
Definition: pl111.hh:82
SERIALIZE_ARRAY
#define SERIALIZE_ARRAY(member, size)
Definition: serialize.hh:626
Pl111::ClcdCrsrClip
static const int ClcdCrsrClip
Definition: pl111.hh:83
RiscvISA::x
Bitfield< 3 > x
Definition: pagetable.hh:70
AmbaDmaDevice::Params
AmbaDmaDeviceParams Params
Definition: amba_device.hh:107
Pl111::LcdControl
static const int LcdControl
Definition: pl111.hh:69
Pl111::LcdUpCurr
static const int LcdUpCurr
Definition: pl111.hh:74
AmbaDmaDevice::pioAddr
Addr pioAddr
Definition: amba_device.hh:101
Pl111::cursorImage
uint32_t cursorImage[CrsrImageSize]
Cursor image RAM register 256-word wide values defining images overlaid by the hw cursor mechanism.
Definition: pl111.hh:226
Pl111::lcdLpbase
uint32_t lcdLpbase
Lower panel frame base address register.
Definition: pl111.hh:206
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:148
Pl111::dmaDoneEventAll
std::vector< DmaDoneEvent > dmaDoneEventAll
All pre-allocated DMA done events.
Definition: pl111.hh:347
Pl111::dmaPendingNum
uint32_t dmaPendingNum
Number of pending dma reads.
Definition: pl111.hh:299
Pl111::ClcdCrsrIcr
static const int ClcdCrsrIcr
Definition: pl111.hh:85
name
const std::string & name()
Definition: trace.cc:48
SERIALIZE_SCALAR
#define SERIALIZE_SCALAR(scalar)
Definition: serialize.hh:584
Pl111::lcdImsc
InterruptReg lcdImsc
Interrupt mask set/clear register.
Definition: pl111.hh:212
Pl111::ClcdCrsrPalette1
static const int ClcdCrsrPalette1
Definition: pl111.hh:81
packet_access.hh
Pl111::curAddr
Addr curAddr
Frame buffer current address.
Definition: pl111.hh:293
Pl111::ClcdCrsrRis
static const int ClcdCrsrRis
Definition: pl111.hh:86
Pl111::ClcdCrsrCtrl
static const int ClcdCrsrCtrl
Definition: pl111.hh:78
DmaPort::dmaAction
void dmaAction(Packet::Command cmd, Addr addr, int size, Event *event, uint8_t *data, Tick delay, Request::Flags flag=0)
Definition: dma_device.cc:193
SimObject::name
virtual const std::string name() const
Definition: sim_object.hh:182
Pl111::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: pl111.cc:521
Pl111::maxOutstandingDma
static const int maxOutstandingDma
Definition: pl111.hh:96
AmbaDmaDevice::pioSize
Addr pioSize
Definition: amba_device.hh:102
pl111.hh
Packet::getLE
T getLE() const
Get the data in the packet byte swapped from little endian to host endian.
Definition: packet_access.hh:75
Pl111::~Pl111
~Pl111()
Definition: pl111.cc:89
Pl111::dmaDoneEventFree
std::vector< DmaDoneEvent * > dmaDoneEventFree
Unused DMA done events that are ready to be scheduled.
Definition: pl111.hh:350
Pl111::CrsrImageSize
static const int CrsrImageSize
Definition: pl111.hh:90
Pl111::readEvent
EventFunctionWrapper readEvent
DMA framebuffer read event.
Definition: pl111.hh:325
Pl111::lcdTiming0
EndBitUnion(ControlReg) class DmaDoneEvent TimingReg0 lcdTiming0
Event wrapper for dmaDone()
Definition: pl111.hh:163
Pl111::lcdTiming2
TimingReg2 lcdTiming2
Clock and signal polarity control register.
Definition: pl111.hh:197
UNSERIALIZE_ARRAY
#define UNSERIALIZE_ARRAY(member, size)
Definition: serialize.hh:634
X86ISA::vector
Bitfield< 15, 8 > vector
Definition: intmessage.hh:44
Clocked::ticksToCycles
Cycles ticksToCycles(Tick t) const
Definition: clocked_object.hh:219
Pl111::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: pl111.cc:211
Pl111::readFramebuffer
void readFramebuffer()
DMA framebuffer read.
Definition: pl111.cc:423
Pl111::AMBA_ID
static const uint64_t AMBA_ID
Definition: pl111.hh:61
SERIALIZE_CONTAINER
#define SERIALIZE_CONTAINER(member)
Definition: serialize.hh:642
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:258
ArmISA::rw
Bitfield< 31 > rw
Definition: miscregs_types.hh:249
Request::UNCACHEABLE
@ UNCACHEABLE
The request is to an uncacheable address.
Definition: request.hh:118
Pl111::LcdUpBase
static const int LcdUpBase
Definition: pl111.hh:67
Pl111::pic
OutputStream * pic
Picture of what the current frame buffer looks like.
Definition: pl111.hh:269
Pl111::generateInterrupt
void generateInterrupt()
Function to generate interrupt.
Definition: pl111.cc:724
CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:64
AmbaDmaDevice::pioDelay
Tick pioDelay
Definition: amba_device.hh:103
curTick
Tick curTick()
The universal simulation clock.
Definition: cur_tick.hh:43
Pl111::dmaBuffer
uint8_t * dmaBuffer
CLCDC supports up to 1024x768.
Definition: pl111.hh:281
trace.hh
Pl111::width
uint16_t width
Frame buffer width - pixels per line.
Definition: pl111.hh:272
Pl111::pixelConverter
PixelConverter pixelConverter() const
Definition: pl111.cc:353
Pl111::clcdCrsrIcr
InterruptReg clcdCrsrIcr
Cursor interrupt clear register.
Definition: pl111.hh:248
Pl111::LcdRis
static const int LcdRis
Definition: pl111.hh:71
simout
OutputDirectory simout
Definition: output.cc:59
Pl111::startAddr
Addr startAddr
Frame buffer base address.
Definition: pl111.hh:287
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
std::list< AddrRange >
ArmISA::fb
Bitfield< 9 > fb
Definition: miscregs_types.hh:271
Pl111::clcdCrsrPalette1
uint32_t clcdCrsrPalette1
Definition: pl111.hh:236
Pl111::LcdMis
static const int LcdMis
Definition: pl111.hh:72
CheckpointIn
Definition: serialize.hh:68
Pl111::LcdPaletteSize
static const int LcdPaletteSize
Definition: pl111.hh:89
Pl111::LcdLpBase
static const int LcdLpBase
Definition: pl111.hh:68
Pl111::clcdCrsrRis
InterruptReg clcdCrsrRis
Cursor raw interrupt status register - const.
Definition: pl111.hh:251
csprintf
std::string csprintf(const char *format, const Args &...args)
Definition: cprintf.hh:158
Pl111::dmaSize
static const int dmaSize
Definition: pl111.hh:95
Pl111::bmp
BmpWriter bmp
Helper to write out bitmaps.
Definition: pl111.hh:266
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:171
Pl111::clcdCrsrPalette0
uint32_t clcdCrsrPalette0
Cursor palette registers.
Definition: pl111.hh:235

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