gem5  v21.0.1.0
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lsq.hh File Reference
#include <cassert>
#include <cstdint>
#include <list>
#include <map>
#include <queue>
#include <vector>
#include "arch/generic/tlb.hh"
#include "base/flags.hh"
#include "base/types.hh"
#include "cpu/inst_seq.hh"
#include "cpu/o3/lsq_unit.hh"
#include "cpu/utils.hh"
#include "enums/SMTQueuePolicy.hh"
#include "mem/port.hh"
#include "sim/sim_object.hh"

Go to the source code of this file.

Classes

class  FullO3CPU< Impl >
 FullO3CPU class, has each of the stages (fetch through commit) within it, as well as all of the time buffers between stages. More...
 
class  LSQ< Impl >
 
class  LSQ< Impl >::LSQSenderState
 Derived class to hold any sender state the LSQ needs. More...
 
class  LSQ< Impl >::DcachePort
 DcachePort class for the load/store queue. More...
 
class  LSQ< Impl >::LSQRequest
 Memory operation metadata. More...
 
class  LSQ< Impl >::SingleDataRequest
 
class  LSQ< Impl >::HtmCmdRequest
 
class  LSQ< Impl >::SplitDataRequest
 

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