gem5  v22.1.0.0
decoder.cc
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1 /*
2  * Copyright (c) 2015-2021 Advanced Micro Devices, Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  * this list of conditions and the following disclaimer.
10  *
11  * 2. Redistributions in binary form must reproduce the above copyright notice,
12  * this list of conditions and the following disclaimer in the documentation
13  * and/or other materials provided with the distribution.
14  *
15  * 3. Neither the name of the copyright holder nor the names of its
16  * contributors may be used to endorse or promote products derived from this
17  * software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <vector>
33 
37 
38 namespace gem5
39 {
40 
41 namespace Gcn3ISA
42 {
44  {
45  } // Decoder
46 
48  {
49  } // ~Decoder
50 
564  };
565 
1335  };
1336 
1594  };
1595 
1725  };
1726 
1856  };
1857 
1875  };
1876 
2006  };
2007 
2073  };
2074 
2332  };
2333 
2463  };
2464 
2594  };
2595 
2601  };
2602 
2860  };
2861 
3119  };
3120 
3121  GPUStaticInst*
3123  {
3124  InFmt_SOP1 *enc = &mach_inst->iFmt_SOP1;
3126  return (this->*method)(mach_inst);
3127  } // decode
3128 
3129  GPUStaticInst*
3131  {
3132  InFmt_VOPC *enc = &iFmt->iFmt_VOPC;
3133  IsaDecodeMethod method = tableSubDecode_OP_VOPC[enc->OP];
3134  return (this->*method)(iFmt);
3135  } // subDecode_OP_VOPC
3136 
3137  GPUStaticInst*
3139  {
3140  InFmt_VOP1 *enc = &iFmt->iFmt_VOP1;
3141  IsaDecodeMethod method = tableSubDecode_OP_VOP1[enc->OP];
3142  return (this->*method)(iFmt);
3143  } // subDecode_OP_VOP1
3144 
3145  GPUStaticInst*
3147  {
3148  InFmt_SOP1 *enc = &iFmt->iFmt_SOP1;
3149  IsaDecodeMethod method = tableSubDecode_OP_SOP1[enc->OP];
3150  return (this->*method)(iFmt);
3151  } // subDecode_OP_SOP1
3152 
3153  GPUStaticInst*
3155  {
3156  InFmt_SOPC *enc = &iFmt->iFmt_SOPC;
3157  IsaDecodeMethod method = tableSubDecode_OP_SOPC[enc->OP];
3158  return (this->*method)(iFmt);
3159  } // subDecode_OP_SOPC
3160 
3161  GPUStaticInst*
3163  {
3164  InFmt_SOPP *enc = &iFmt->iFmt_SOPP;
3165  IsaDecodeMethod method = tableSubDecode_OP_SOPP[enc->OP];
3166  return (this->*method)(iFmt);
3167  } // subDecode_OP_SOPP
3168 
3169  GPUStaticInst*
3171  {
3172  InFmt_SMEM *enc = &iFmt->iFmt_SMEM;
3173  IsaDecodeMethod method = tableSubDecode_OP_SMEM[enc->OP];
3174  return (this->*method)(iFmt);
3175  } // subDecode_OP_SMEM
3176 
3177  GPUStaticInst*
3179  {
3180  InFmt_VOP3 *enc = &iFmt->iFmt_VOP3;
3182  return (this->*method)(iFmt);
3183  } // subDecode_OPU_VOP3
3184 
3185  GPUStaticInst*
3187  {
3188  InFmt_VINTRP *enc = &iFmt->iFmt_VINTRP;
3190  return (this->*method)(iFmt);
3191  } // subDecode_OP_VINTRP
3192 
3193  GPUStaticInst*
3195  {
3196  InFmt_DS *enc = &iFmt->iFmt_DS;
3197  IsaDecodeMethod method = tableSubDecode_OP_DS[enc->OP];
3198  return (this->*method)(iFmt);
3199  } // subDecode_OP_DS
3200 
3201  GPUStaticInst*
3203  {
3204  InFmt_FLAT *enc = &iFmt->iFmt_FLAT;
3205  IsaDecodeMethod method = tableSubDecode_OP_FLAT[enc->OP];
3206  return (this->*method)(iFmt);
3207  } // subDecode_OP_FLAT
3208 
3209  GPUStaticInst*
3211  {
3212  InFmt_MUBUF *enc = &iFmt->iFmt_MUBUF;
3214  return (this->*method)(iFmt);
3215  } // subDecode_OP_MUBUF
3216 
3217  GPUStaticInst*
3219  {
3220  InFmt_MTBUF *enc = &iFmt->iFmt_MTBUF;
3222  return (this->*method)(iFmt);
3223  } // subDecode_OP_MTBUF
3224 
3225  GPUStaticInst*
3227  {
3228  InFmt_MIMG *enc = &iFmt->iFmt_MIMG;
3229  IsaDecodeMethod method = tableSubDecode_OP_MIMG[enc->OP];
3230  return (this->*method)(iFmt);
3231  } // subDecode_OP_MIMG
3232 
3233  GPUStaticInst*
3235  {
3236  return new Inst_VOP2__V_CNDMASK_B32(&iFmt->iFmt_VOP2);
3237  } // decode_OP_VOP2__V_CNDMASK_B32
3238 
3239  GPUStaticInst*
3241  {
3242  return new Inst_VOP2__V_ADD_F32(&iFmt->iFmt_VOP2);
3243  } // decode_OP_VOP2__V_ADD_F32
3244 
3245  GPUStaticInst*
3247  {
3248  return new Inst_VOP2__V_SUB_F32(&iFmt->iFmt_VOP2);
3249  } // decode_OP_VOP2__V_SUB_F32
3250 
3251  GPUStaticInst*
3253  {
3254  return new Inst_VOP2__V_SUBREV_F32(&iFmt->iFmt_VOP2);
3255  } // decode_OP_VOP2__V_SUBREV_F32
3256 
3257  GPUStaticInst*
3259  {
3260  return new Inst_VOP2__V_MUL_LEGACY_F32(&iFmt->iFmt_VOP2);
3261  } // decode_OP_VOP2__V_MUL_LEGACY_F32
3262 
3263  GPUStaticInst*
3265  {
3266  return new Inst_VOP2__V_MUL_F32(&iFmt->iFmt_VOP2);
3267  } // decode_OP_VOP2__V_MUL_F32
3268 
3269  GPUStaticInst*
3271  {
3272  return new Inst_VOP2__V_MUL_I32_I24(&iFmt->iFmt_VOP2);
3273  } // decode_OP_VOP2__V_MUL_I32_I24
3274 
3275  GPUStaticInst*
3277  {
3278  return new Inst_VOP2__V_MUL_HI_I32_I24(&iFmt->iFmt_VOP2);
3279  } // decode_OP_VOP2__V_MUL_HI_I32_I24
3280 
3281  GPUStaticInst*
3283  {
3284  return new Inst_VOP2__V_MUL_U32_U24(&iFmt->iFmt_VOP2);
3285  } // decode_OP_VOP2__V_MUL_U32_U24
3286 
3287  GPUStaticInst*
3289  {
3290  return new Inst_VOP2__V_MUL_HI_U32_U24(&iFmt->iFmt_VOP2);
3291  } // decode_OP_VOP2__V_MUL_HI_U32_U24
3292 
3293  GPUStaticInst*
3295  {
3296  return new Inst_VOP2__V_MIN_F32(&iFmt->iFmt_VOP2);
3297  } // decode_OP_VOP2__V_MIN_F32
3298 
3299  GPUStaticInst*
3301  {
3302  return new Inst_VOP2__V_MAX_F32(&iFmt->iFmt_VOP2);
3303  } // decode_OP_VOP2__V_MAX_F32
3304 
3305  GPUStaticInst*
3307  {
3308  return new Inst_VOP2__V_MIN_I32(&iFmt->iFmt_VOP2);
3309  } // decode_OP_VOP2__V_MIN_I32
3310 
3311  GPUStaticInst*
3313  {
3314  return new Inst_VOP2__V_MAX_I32(&iFmt->iFmt_VOP2);
3315  } // decode_OP_VOP2__V_MAX_I32
3316 
3317  GPUStaticInst*
3319  {
3320  return new Inst_VOP2__V_MIN_U32(&iFmt->iFmt_VOP2);
3321  } // decode_OP_VOP2__V_MIN_U32
3322 
3323  GPUStaticInst*
3325  {
3326  return new Inst_VOP2__V_MAX_U32(&iFmt->iFmt_VOP2);
3327  } // decode_OP_VOP2__V_MAX_U32
3328 
3329  GPUStaticInst*
3331  {
3332  return new Inst_VOP2__V_LSHRREV_B32(&iFmt->iFmt_VOP2);
3333  } // decode_OP_VOP2__V_LSHRREV_B32
3334 
3335  GPUStaticInst*
3337  {
3338  return new Inst_VOP2__V_ASHRREV_I32(&iFmt->iFmt_VOP2);
3339  } // decode_OP_VOP2__V_ASHRREV_I32
3340 
3341  GPUStaticInst*
3343  {
3344  return new Inst_VOP2__V_LSHLREV_B32(&iFmt->iFmt_VOP2);
3345  } // decode_OP_VOP2__V_LSHLREV_B32
3346 
3347  GPUStaticInst*
3349  {
3350  return new Inst_VOP2__V_AND_B32(&iFmt->iFmt_VOP2);
3351  } // decode_OP_VOP2__V_AND_B32
3352 
3353  GPUStaticInst*
3355  {
3356  return new Inst_VOP2__V_OR_B32(&iFmt->iFmt_VOP2);
3357  } // decode_OP_VOP2__V_OR_B32
3358 
3359  GPUStaticInst*
3361  {
3362  return new Inst_VOP2__V_XOR_B32(&iFmt->iFmt_VOP2);
3363  } // decode_OP_VOP2__V_XOR_B32
3364 
3365  GPUStaticInst*
3367  {
3368  return new Inst_VOP2__V_MAC_F32(&iFmt->iFmt_VOP2);
3369  } // decode_OP_VOP2__V_MAC_F32
3370 
3371  GPUStaticInst*
3373  {
3374  return new Inst_VOP2__V_MADMK_F32(&iFmt->iFmt_VOP2);
3375  } // decode_OP_VOP2__V_MADMK_F32
3376 
3377  GPUStaticInst*
3379  {
3380  return new Inst_VOP2__V_MADAK_F32(&iFmt->iFmt_VOP2);
3381  } // decode_OP_VOP2__V_MADAK_F32
3382 
3383  GPUStaticInst*
3385  {
3386  return new Inst_VOP2__V_ADD_U32(&iFmt->iFmt_VOP2);
3387  } // decode_OP_VOP2__V_ADD_U32
3388 
3389  GPUStaticInst*
3391  {
3392  return new Inst_VOP2__V_SUB_U32(&iFmt->iFmt_VOP2);
3393  } // decode_OP_VOP2__V_SUB_U32
3394 
3395  GPUStaticInst*
3397  {
3398  return new Inst_VOP2__V_SUBREV_U32(&iFmt->iFmt_VOP2);
3399  } // decode_OP_VOP2__V_SUBREV_U32
3400 
3401  GPUStaticInst*
3403  {
3404  return new Inst_VOP2__V_ADDC_U32(&iFmt->iFmt_VOP2);
3405  } // decode_OP_VOP2__V_ADDC_U32
3406 
3407  GPUStaticInst*
3409  {
3410  return new Inst_VOP2__V_SUBB_U32(&iFmt->iFmt_VOP2);
3411  } // decode_OP_VOP2__V_SUBB_U32
3412 
3413  GPUStaticInst*
3415  {
3416  return new Inst_VOP2__V_SUBBREV_U32(&iFmt->iFmt_VOP2);
3417  } // decode_OP_VOP2__V_SUBBREV_U32
3418 
3419  GPUStaticInst*
3421  {
3422  return new Inst_VOP2__V_ADD_F16(&iFmt->iFmt_VOP2);
3423  } // decode_OP_VOP2__V_ADD_F16
3424 
3425  GPUStaticInst*
3427  {
3428  return new Inst_VOP2__V_SUB_F16(&iFmt->iFmt_VOP2);
3429  } // decode_OP_VOP2__V_SUB_F16
3430 
3431  GPUStaticInst*
3433  {
3434  return new Inst_VOP2__V_SUBREV_F16(&iFmt->iFmt_VOP2);
3435  } // decode_OP_VOP2__V_SUBREV_F16
3436 
3437  GPUStaticInst*
3439  {
3440  return new Inst_VOP2__V_MUL_F16(&iFmt->iFmt_VOP2);
3441  } // decode_OP_VOP2__V_MUL_F16
3442 
3443  GPUStaticInst*
3445  {
3446  return new Inst_VOP2__V_MAC_F16(&iFmt->iFmt_VOP2);
3447  } // decode_OP_VOP2__V_MAC_F16
3448 
3449  GPUStaticInst*
3451  {
3452  return new Inst_VOP2__V_MADMK_F16(&iFmt->iFmt_VOP2);
3453  } // decode_OP_VOP2__V_MADMK_F16
3454 
3455  GPUStaticInst*
3457  {
3458  return new Inst_VOP2__V_MADAK_F16(&iFmt->iFmt_VOP2);
3459  } // decode_OP_VOP2__V_MADAK_F16
3460 
3461  GPUStaticInst*
3463  {
3464  return new Inst_VOP2__V_ADD_U16(&iFmt->iFmt_VOP2);
3465  } // decode_OP_VOP2__V_ADD_U16
3466 
3467  GPUStaticInst*
3469  {
3470  return new Inst_VOP2__V_SUB_U16(&iFmt->iFmt_VOP2);
3471  } // decode_OP_VOP2__V_SUB_U16
3472 
3473  GPUStaticInst*
3475  {
3476  return new Inst_VOP2__V_SUBREV_U16(&iFmt->iFmt_VOP2);
3477  } // decode_OP_VOP2__V_SUBREV_U16
3478 
3479  GPUStaticInst*
3481  {
3482  return new Inst_VOP2__V_MUL_LO_U16(&iFmt->iFmt_VOP2);
3483  } // decode_OP_VOP2__V_MUL_LO_U16
3484 
3485  GPUStaticInst*
3487  {
3488  return new Inst_VOP2__V_LSHLREV_B16(&iFmt->iFmt_VOP2);
3489  } // decode_OP_VOP2__V_LSHLREV_B16
3490 
3491  GPUStaticInst*
3493  {
3494  return new Inst_VOP2__V_LSHRREV_B16(&iFmt->iFmt_VOP2);
3495  } // decode_OP_VOP2__V_LSHRREV_B16
3496 
3497  GPUStaticInst*
3499  {
3500  return new Inst_VOP2__V_ASHRREV_I16(&iFmt->iFmt_VOP2);
3501  } // decode_OP_VOP2__V_ASHRREV_I16
3502 
3503  GPUStaticInst*
3505  {
3506  return new Inst_VOP2__V_MAX_F16(&iFmt->iFmt_VOP2);
3507  } // decode_OP_VOP2__V_MAX_F16
3508 
3509  GPUStaticInst*
3511  {
3512  return new Inst_VOP2__V_MIN_F16(&iFmt->iFmt_VOP2);
3513  } // decode_OP_VOP2__V_MIN_F16
3514 
3515  GPUStaticInst*
3517  {
3518  return new Inst_VOP2__V_MAX_U16(&iFmt->iFmt_VOP2);
3519  } // decode_OP_VOP2__V_MAX_U16
3520 
3521  GPUStaticInst*
3523  {
3524  return new Inst_VOP2__V_MAX_I16(&iFmt->iFmt_VOP2);
3525  } // decode_OP_VOP2__V_MAX_I16
3526 
3527  GPUStaticInst*
3529  {
3530  return new Inst_VOP2__V_MIN_U16(&iFmt->iFmt_VOP2);
3531  } // decode_OP_VOP2__V_MIN_U16
3532 
3533  GPUStaticInst*
3535  {
3536  return new Inst_VOP2__V_MIN_I16(&iFmt->iFmt_VOP2);
3537  } // decode_OP_VOP2__V_MIN_I16
3538 
3539  GPUStaticInst*
3541  {
3542  return new Inst_VOP2__V_LDEXP_F16(&iFmt->iFmt_VOP2);
3543  } // decode_OP_VOP2__V_LDEXP_F16
3544 
3545  GPUStaticInst*
3547  {
3548  return new Inst_SOP2__S_ADD_U32(&iFmt->iFmt_SOP2);
3549  } // decode_OP_SOP2__S_ADD_U32
3550 
3551  GPUStaticInst*
3553  {
3554  return new Inst_SOP2__S_SUB_U32(&iFmt->iFmt_SOP2);
3555  } // decode_OP_SOP2__S_SUB_U32
3556 
3557  GPUStaticInst*
3559  {
3560  return new Inst_SOP2__S_ADD_I32(&iFmt->iFmt_SOP2);
3561  } // decode_OP_SOP2__S_ADD_I32
3562 
3563  GPUStaticInst*
3565  {
3566  return new Inst_SOP2__S_SUB_I32(&iFmt->iFmt_SOP2);
3567  } // decode_OP_SOP2__S_SUB_I32
3568 
3569  GPUStaticInst*
3571  {
3572  return new Inst_SOP2__S_ADDC_U32(&iFmt->iFmt_SOP2);
3573  } // decode_OP_SOP2__S_ADDC_U32
3574 
3575  GPUStaticInst*
3577  {
3578  return new Inst_SOP2__S_SUBB_U32(&iFmt->iFmt_SOP2);
3579  } // decode_OP_SOP2__S_SUBB_U32
3580 
3581  GPUStaticInst*
3583  {
3584  return new Inst_SOP2__S_MIN_I32(&iFmt->iFmt_SOP2);
3585  } // decode_OP_SOP2__S_MIN_I32
3586 
3587  GPUStaticInst*
3589  {
3590  return new Inst_SOP2__S_MIN_U32(&iFmt->iFmt_SOP2);
3591  } // decode_OP_SOP2__S_MIN_U32
3592 
3593  GPUStaticInst*
3595  {
3596  return new Inst_SOP2__S_MAX_I32(&iFmt->iFmt_SOP2);
3597  } // decode_OP_SOP2__S_MAX_I32
3598 
3599  GPUStaticInst*
3601  {
3602  return new Inst_SOP2__S_MAX_U32(&iFmt->iFmt_SOP2);
3603  } // decode_OP_SOP2__S_MAX_U32
3604 
3605  GPUStaticInst*
3607  {
3608  return new Inst_SOP2__S_CSELECT_B32(&iFmt->iFmt_SOP2);
3609  } // decode_OP_SOP2__S_CSELECT_B32
3610 
3611  GPUStaticInst*
3613  {
3614  return new Inst_SOP2__S_CSELECT_B64(&iFmt->iFmt_SOP2);
3615  } // decode_OP_SOP2__S_CSELECT_B64
3616 
3617  GPUStaticInst*
3619  {
3620  return new Inst_SOP2__S_AND_B32(&iFmt->iFmt_SOP2);
3621  } // decode_OP_SOP2__S_AND_B32
3622 
3623  GPUStaticInst*
3625  {
3626  return new Inst_SOP2__S_AND_B64(&iFmt->iFmt_SOP2);
3627  } // decode_OP_SOP2__S_AND_B64
3628 
3629  GPUStaticInst*
3631  {
3632  return new Inst_SOP2__S_OR_B32(&iFmt->iFmt_SOP2);
3633  } // decode_OP_SOP2__S_OR_B32
3634 
3635  GPUStaticInst*
3637  {
3638  return new Inst_SOP2__S_OR_B64(&iFmt->iFmt_SOP2);
3639  } // decode_OP_SOP2__S_OR_B64
3640 
3641  GPUStaticInst*
3643  {
3644  return new Inst_SOP2__S_XOR_B32(&iFmt->iFmt_SOP2);
3645  } // decode_OP_SOP2__S_XOR_B32
3646 
3647  GPUStaticInst*
3649  {
3650  return new Inst_SOP2__S_XOR_B64(&iFmt->iFmt_SOP2);
3651  } // decode_OP_SOP2__S_XOR_B64
3652 
3653  GPUStaticInst*
3655  {
3656  return new Inst_SOP2__S_ANDN2_B32(&iFmt->iFmt_SOP2);
3657  } // decode_OP_SOP2__S_ANDN2_B32
3658 
3659  GPUStaticInst*
3661  {
3662  return new Inst_SOP2__S_ANDN2_B64(&iFmt->iFmt_SOP2);
3663  } // decode_OP_SOP2__S_ANDN2_B64
3664 
3665  GPUStaticInst*
3667  {
3668  return new Inst_SOP2__S_ORN2_B32(&iFmt->iFmt_SOP2);
3669  } // decode_OP_SOP2__S_ORN2_B32
3670 
3671  GPUStaticInst*
3673  {
3674  return new Inst_SOP2__S_ORN2_B64(&iFmt->iFmt_SOP2);
3675  } // decode_OP_SOP2__S_ORN2_B64
3676 
3677  GPUStaticInst*
3679  {
3680  return new Inst_SOP2__S_NAND_B32(&iFmt->iFmt_SOP2);
3681  } // decode_OP_SOP2__S_NAND_B32
3682 
3683  GPUStaticInst*
3685  {
3686  return new Inst_SOP2__S_NAND_B64(&iFmt->iFmt_SOP2);
3687  } // decode_OP_SOP2__S_NAND_B64
3688 
3689  GPUStaticInst*
3691  {
3692  return new Inst_SOP2__S_NOR_B32(&iFmt->iFmt_SOP2);
3693  } // decode_OP_SOP2__S_NOR_B32
3694 
3695  GPUStaticInst*
3697  {
3698  return new Inst_SOP2__S_NOR_B64(&iFmt->iFmt_SOP2);
3699  } // decode_OP_SOP2__S_NOR_B64
3700 
3701  GPUStaticInst*
3703  {
3704  return new Inst_SOP2__S_XNOR_B32(&iFmt->iFmt_SOP2);
3705  } // decode_OP_SOP2__S_XNOR_B32
3706 
3707  GPUStaticInst*
3709  {
3710  return new Inst_SOP2__S_XNOR_B64(&iFmt->iFmt_SOP2);
3711  } // decode_OP_SOP2__S_XNOR_B64
3712 
3713  GPUStaticInst*
3715  {
3716  return new Inst_SOP2__S_LSHL_B32(&iFmt->iFmt_SOP2);
3717  } // decode_OP_SOP2__S_LSHL_B32
3718 
3719  GPUStaticInst*
3721  {
3722  return new Inst_SOP2__S_LSHL_B64(&iFmt->iFmt_SOP2);
3723  } // decode_OP_SOP2__S_LSHL_B64
3724 
3725  GPUStaticInst*
3727  {
3728  return new Inst_SOP2__S_LSHR_B32(&iFmt->iFmt_SOP2);
3729  } // decode_OP_SOP2__S_LSHR_B32
3730 
3731  GPUStaticInst*
3733  {
3734  return new Inst_SOP2__S_LSHR_B64(&iFmt->iFmt_SOP2);
3735  } // decode_OP_SOP2__S_LSHR_B64
3736 
3737  GPUStaticInst*
3739  {
3740  return new Inst_SOP2__S_ASHR_I32(&iFmt->iFmt_SOP2);
3741  } // decode_OP_SOP2__S_ASHR_I32
3742 
3743  GPUStaticInst*
3745  {
3746  return new Inst_SOP2__S_ASHR_I64(&iFmt->iFmt_SOP2);
3747  } // decode_OP_SOP2__S_ASHR_I64
3748 
3749  GPUStaticInst*
3751  {
3752  return new Inst_SOP2__S_BFM_B32(&iFmt->iFmt_SOP2);
3753  } // decode_OP_SOP2__S_BFM_B32
3754 
3755  GPUStaticInst*
3757  {
3758  return new Inst_SOP2__S_BFM_B64(&iFmt->iFmt_SOP2);
3759  } // decode_OP_SOP2__S_BFM_B64
3760 
3761  GPUStaticInst*
3763  {
3764  return new Inst_SOP2__S_MUL_I32(&iFmt->iFmt_SOP2);
3765  } // decode_OP_SOP2__S_MUL_I32
3766 
3767  GPUStaticInst*
3769  {
3770  return new Inst_SOP2__S_BFE_U32(&iFmt->iFmt_SOP2);
3771  } // decode_OP_SOP2__S_BFE_U32
3772 
3773  GPUStaticInst*
3775  {
3776  return new Inst_SOP2__S_BFE_I32(&iFmt->iFmt_SOP2);
3777  } // decode_OP_SOP2__S_BFE_I32
3778 
3779  GPUStaticInst*
3781  {
3782  return new Inst_SOP2__S_BFE_U64(&iFmt->iFmt_SOP2);
3783  } // decode_OP_SOP2__S_BFE_U64
3784 
3785  GPUStaticInst*
3787  {
3788  return new Inst_SOP2__S_BFE_I64(&iFmt->iFmt_SOP2);
3789  } // decode_OP_SOP2__S_BFE_I64
3790 
3791  GPUStaticInst*
3793  {
3794  return new Inst_SOP2__S_CBRANCH_G_FORK(&iFmt->iFmt_SOP2);
3795  } // decode_OP_SOP2__S_CBRANCH_G_FORK
3796 
3797  GPUStaticInst*
3799  {
3800  return new Inst_SOP2__S_ABSDIFF_I32(&iFmt->iFmt_SOP2);
3801  } // decode_OP_SOP2__S_ABSDIFF_I32
3802 
3803  GPUStaticInst*
3805  {
3806  return new Inst_SOP2__S_RFE_RESTORE_B64(&iFmt->iFmt_SOP2);
3807  } // decode_OP_SOP2__S_RFE_RESTORE_B64
3808 
3809  GPUStaticInst*
3811  {
3812  return new Inst_SOPK__S_MOVK_I32(&iFmt->iFmt_SOPK);
3813  } // decode_OP_SOPK__S_MOVK_I32
3814 
3815  GPUStaticInst*
3817  {
3818  return new Inst_SOPK__S_CMOVK_I32(&iFmt->iFmt_SOPK);
3819  } // decode_OP_SOPK__S_CMOVK_I32
3820 
3821  GPUStaticInst*
3823  {
3824  return new Inst_SOPK__S_CMPK_EQ_I32(&iFmt->iFmt_SOPK);
3825  } // decode_OP_SOPK__S_CMPK_EQ_I32
3826 
3827  GPUStaticInst*
3829  {
3830  return new Inst_SOPK__S_CMPK_LG_I32(&iFmt->iFmt_SOPK);
3831  } // decode_OP_SOPK__S_CMPK_LG_I32
3832 
3833  GPUStaticInst*
3835  {
3836  return new Inst_SOPK__S_CMPK_GT_I32(&iFmt->iFmt_SOPK);
3837  } // decode_OP_SOPK__S_CMPK_GT_I32
3838 
3839  GPUStaticInst*
3841  {
3842  return new Inst_SOPK__S_CMPK_GE_I32(&iFmt->iFmt_SOPK);
3843  } // decode_OP_SOPK__S_CMPK_GE_I32
3844 
3845  GPUStaticInst*
3847  {
3848  return new Inst_SOPK__S_CMPK_LT_I32(&iFmt->iFmt_SOPK);
3849  } // decode_OP_SOPK__S_CMPK_LT_I32
3850 
3851  GPUStaticInst*
3853  {
3854  return new Inst_SOPK__S_CMPK_LE_I32(&iFmt->iFmt_SOPK);
3855  } // decode_OP_SOPK__S_CMPK_LE_I32
3856 
3857  GPUStaticInst*
3859  {
3860  return new Inst_SOPK__S_CMPK_EQ_U32(&iFmt->iFmt_SOPK);
3861  } // decode_OP_SOPK__S_CMPK_EQ_U32
3862 
3863  GPUStaticInst*
3865  {
3866  return new Inst_SOPK__S_CMPK_LG_U32(&iFmt->iFmt_SOPK);
3867  } // decode_OP_SOPK__S_CMPK_LG_U32
3868 
3869  GPUStaticInst*
3871  {
3872  return new Inst_SOPK__S_CMPK_GT_U32(&iFmt->iFmt_SOPK);
3873  } // decode_OP_SOPK__S_CMPK_GT_U32
3874 
3875  GPUStaticInst*
3877  {
3878  return new Inst_SOPK__S_CMPK_GE_U32(&iFmt->iFmt_SOPK);
3879  } // decode_OP_SOPK__S_CMPK_GE_U32
3880 
3881  GPUStaticInst*
3883  {
3884  return new Inst_SOPK__S_CMPK_LT_U32(&iFmt->iFmt_SOPK);
3885  } // decode_OP_SOPK__S_CMPK_LT_U32
3886 
3887  GPUStaticInst*
3889  {
3890  return new Inst_SOPK__S_CMPK_LE_U32(&iFmt->iFmt_SOPK);
3891  } // decode_OP_SOPK__S_CMPK_LE_U32
3892 
3893  GPUStaticInst*
3895  {
3896  return new Inst_SOPK__S_ADDK_I32(&iFmt->iFmt_SOPK);
3897  } // decode_OP_SOPK__S_ADDK_I32
3898 
3899  GPUStaticInst*
3901  {
3902  return new Inst_SOPK__S_MULK_I32(&iFmt->iFmt_SOPK);
3903  } // decode_OP_SOPK__S_MULK_I32
3904 
3905  GPUStaticInst*
3907  {
3908  return new Inst_SOPK__S_CBRANCH_I_FORK(&iFmt->iFmt_SOPK);
3909  } // decode_OP_SOPK__S_CBRANCH_I_FORK
3910 
3911  GPUStaticInst*
3913  {
3914  return new Inst_SOPK__S_GETREG_B32(&iFmt->iFmt_SOPK);
3915  } // decode_OP_SOPK__S_GETREG_B32
3916 
3917  GPUStaticInst*
3919  {
3920  return new Inst_SOPK__S_SETREG_B32(&iFmt->iFmt_SOPK);
3921  } // decode_OP_SOPK__S_SETREG_B32
3922 
3923  GPUStaticInst*
3925  {
3926  return new Inst_SOPK__S_SETREG_IMM32_B32(&iFmt->iFmt_SOPK);
3927  } // decode_OP_SOPK__S_SETREG_IMM32_B32
3928 
3929  GPUStaticInst*
3931  {
3932  return new Inst_EXP__EXP(&iFmt->iFmt_EXP);
3933  } // decode_OP_EXP
3934 
3935  GPUStaticInst*
3937  {
3938  return new Inst_VOP3__V_CMP_CLASS_F32(&iFmt->iFmt_VOP3);
3939  } // decode_OPU_VOP3__V_CMP_CLASS_F32
3940 
3941  GPUStaticInst*
3943  {
3944  return new Inst_VOP3__V_CMPX_CLASS_F32(&iFmt->iFmt_VOP3);
3945  } // decode_OPU_VOP3__V_CMPX_CLASS_F32
3946 
3947  GPUStaticInst*
3949  {
3950  return new Inst_VOP3__V_CMP_CLASS_F64(&iFmt->iFmt_VOP3);
3951  } // decode_OPU_VOP3__V_CMP_CLASS_F64
3952 
3953  GPUStaticInst*
3955  {
3956  return new Inst_VOP3__V_CMPX_CLASS_F64(&iFmt->iFmt_VOP3);
3957  } // decode_OPU_VOP3__V_CMPX_CLASS_F64
3958 
3959  GPUStaticInst*
3961  {
3962  return new Inst_VOP3__V_CMP_CLASS_F16(&iFmt->iFmt_VOP3);
3963  } // decode_OPU_VOP3__V_CMP_CLASS_F16
3964 
3965  GPUStaticInst*
3967  {
3968  return new Inst_VOP3__V_CMPX_CLASS_F16(&iFmt->iFmt_VOP3);
3969  } // decode_OPU_VOP3__V_CMPX_CLASS_F16
3970 
3971  GPUStaticInst*
3973  {
3974  return new Inst_VOP3__V_CMP_F_F16(&iFmt->iFmt_VOP3);
3975  } // decode_OPU_VOP3__V_CMP_F_F16
3976 
3977  GPUStaticInst*
3979  {
3980  return new Inst_VOP3__V_CMP_LT_F16(&iFmt->iFmt_VOP3);
3981  } // decode_OPU_VOP3__V_CMP_LT_F16
3982 
3983  GPUStaticInst*
3985  {
3986  return new Inst_VOP3__V_CMP_EQ_F16(&iFmt->iFmt_VOP3);
3987  } // decode_OPU_VOP3__V_CMP_EQ_F16
3988 
3989  GPUStaticInst*
3991  {
3992  return new Inst_VOP3__V_CMP_LE_F16(&iFmt->iFmt_VOP3);
3993  } // decode_OPU_VOP3__V_CMP_LE_F16
3994 
3995  GPUStaticInst*
3997  {
3998  return new Inst_VOP3__V_CMP_GT_F16(&iFmt->iFmt_VOP3);
3999  } // decode_OPU_VOP3__V_CMP_GT_F16
4000 
4001  GPUStaticInst*
4003  {
4004  return new Inst_VOP3__V_CMP_LG_F16(&iFmt->iFmt_VOP3);
4005  } // decode_OPU_VOP3__V_CMP_LG_F16
4006 
4007  GPUStaticInst*
4009  {
4010  return new Inst_VOP3__V_CMP_GE_F16(&iFmt->iFmt_VOP3);
4011  } // decode_OPU_VOP3__V_CMP_GE_F16
4012 
4013  GPUStaticInst*
4015  {
4016  return new Inst_VOP3__V_CMP_O_F16(&iFmt->iFmt_VOP3);
4017  } // decode_OPU_VOP3__V_CMP_O_F16
4018 
4019  GPUStaticInst*
4021  {
4022  return new Inst_VOP3__V_CMP_U_F16(&iFmt->iFmt_VOP3);
4023  } // decode_OPU_VOP3__V_CMP_U_F16
4024 
4025  GPUStaticInst*
4027  {
4028  return new Inst_VOP3__V_CMP_NGE_F16(&iFmt->iFmt_VOP3);
4029  } // decode_OPU_VOP3__V_CMP_NGE_F16
4030 
4031  GPUStaticInst*
4033  {
4034  return new Inst_VOP3__V_CMP_NLG_F16(&iFmt->iFmt_VOP3);
4035  } // decode_OPU_VOP3__V_CMP_NLG_F16
4036 
4037  GPUStaticInst*
4039  {
4040  return new Inst_VOP3__V_CMP_NGT_F16(&iFmt->iFmt_VOP3);
4041  } // decode_OPU_VOP3__V_CMP_NGT_F16
4042 
4043  GPUStaticInst*
4045  {
4046  return new Inst_VOP3__V_CMP_NLE_F16(&iFmt->iFmt_VOP3);
4047  } // decode_OPU_VOP3__V_CMP_NLE_F16
4048 
4049  GPUStaticInst*
4051  {
4052  return new Inst_VOP3__V_CMP_NEQ_F16(&iFmt->iFmt_VOP3);
4053  } // decode_OPU_VOP3__V_CMP_NEQ_F16
4054 
4055  GPUStaticInst*
4057  {
4058  return new Inst_VOP3__V_CMP_NLT_F16(&iFmt->iFmt_VOP3);
4059  } // decode_OPU_VOP3__V_CMP_NLT_F16
4060 
4061  GPUStaticInst*
4063  {
4064  return new Inst_VOP3__V_CMP_TRU_F16(&iFmt->iFmt_VOP3);
4065  } // decode_OPU_VOP3__V_CMP_TRU_F16
4066 
4067  GPUStaticInst*
4069  {
4070  return new Inst_VOP3__V_CMPX_F_F16(&iFmt->iFmt_VOP3);
4071  } // decode_OPU_VOP3__V_CMPX_F_F16
4072 
4073  GPUStaticInst*
4075  {
4076  return new Inst_VOP3__V_CMPX_LT_F16(&iFmt->iFmt_VOP3);
4077  } // decode_OPU_VOP3__V_CMPX_LT_F16
4078 
4079  GPUStaticInst*
4081  {
4082  return new Inst_VOP3__V_CMPX_EQ_F16(&iFmt->iFmt_VOP3);
4083  } // decode_OPU_VOP3__V_CMPX_EQ_F16
4084 
4085  GPUStaticInst*
4087  {
4088  return new Inst_VOP3__V_CMPX_LE_F16(&iFmt->iFmt_VOP3);
4089  } // decode_OPU_VOP3__V_CMPX_LE_F16
4090 
4091  GPUStaticInst*
4093  {
4094  return new Inst_VOP3__V_CMPX_GT_F16(&iFmt->iFmt_VOP3);
4095  } // decode_OPU_VOP3__V_CMPX_GT_F16
4096 
4097  GPUStaticInst*
4099  {
4100  return new Inst_VOP3__V_CMPX_LG_F16(&iFmt->iFmt_VOP3);
4101  } // decode_OPU_VOP3__V_CMPX_LG_F16
4102 
4103  GPUStaticInst*
4105  {
4106  return new Inst_VOP3__V_CMPX_GE_F16(&iFmt->iFmt_VOP3);
4107  } // decode_OPU_VOP3__V_CMPX_GE_F16
4108 
4109  GPUStaticInst*
4111  {
4112  return new Inst_VOP3__V_CMPX_O_F16(&iFmt->iFmt_VOP3);
4113  } // decode_OPU_VOP3__V_CMPX_O_F16
4114 
4115  GPUStaticInst*
4117  {
4118  return new Inst_VOP3__V_CMPX_U_F16(&iFmt->iFmt_VOP3);
4119  } // decode_OPU_VOP3__V_CMPX_U_F16
4120 
4121  GPUStaticInst*
4123  {
4124  return new Inst_VOP3__V_CMPX_NGE_F16(&iFmt->iFmt_VOP3);
4125  } // decode_OPU_VOP3__V_CMPX_NGE_F16
4126 
4127  GPUStaticInst*
4129  {
4130  return new Inst_VOP3__V_CMPX_NLG_F16(&iFmt->iFmt_VOP3);
4131  } // decode_OPU_VOP3__V_CMPX_NLG_F16
4132 
4133  GPUStaticInst*
4135  {
4136  return new Inst_VOP3__V_CMPX_NGT_F16(&iFmt->iFmt_VOP3);
4137  } // decode_OPU_VOP3__V_CMPX_NGT_F16
4138 
4139  GPUStaticInst*
4141  {
4142  return new Inst_VOP3__V_CMPX_NLE_F16(&iFmt->iFmt_VOP3);
4143  } // decode_OPU_VOP3__V_CMPX_NLE_F16
4144 
4145  GPUStaticInst*
4147  {
4148  return new Inst_VOP3__V_CMPX_NEQ_F16(&iFmt->iFmt_VOP3);
4149  } // decode_OPU_VOP3__V_CMPX_NEQ_F16
4150 
4151  GPUStaticInst*
4153  {
4154  return new Inst_VOP3__V_CMPX_NLT_F16(&iFmt->iFmt_VOP3);
4155  } // decode_OPU_VOP3__V_CMPX_NLT_F16
4156 
4157  GPUStaticInst*
4159  {
4160  return new Inst_VOP3__V_CMPX_TRU_F16(&iFmt->iFmt_VOP3);
4161  } // decode_OPU_VOP3__V_CMPX_TRU_F16
4162 
4163  GPUStaticInst*
4165  {
4166  return new Inst_VOP3__V_CMP_F_F32(&iFmt->iFmt_VOP3);
4167  } // decode_OPU_VOP3__V_CMP_F_F32
4168 
4169  GPUStaticInst*
4171  {
4172  return new Inst_VOP3__V_CMP_LT_F32(&iFmt->iFmt_VOP3);
4173  } // decode_OPU_VOP3__V_CMP_LT_F32
4174 
4175  GPUStaticInst*
4177  {
4178  return new Inst_VOP3__V_CMP_EQ_F32(&iFmt->iFmt_VOP3);
4179  } // decode_OPU_VOP3__V_CMP_EQ_F32
4180 
4181  GPUStaticInst*
4183  {
4184  return new Inst_VOP3__V_CMP_LE_F32(&iFmt->iFmt_VOP3);
4185  } // decode_OPU_VOP3__V_CMP_LE_F32
4186 
4187  GPUStaticInst*
4189  {
4190  return new Inst_VOP3__V_CMP_GT_F32(&iFmt->iFmt_VOP3);
4191  } // decode_OPU_VOP3__V_CMP_GT_F32
4192 
4193  GPUStaticInst*
4195  {
4196  return new Inst_VOP3__V_CMP_LG_F32(&iFmt->iFmt_VOP3);
4197  } // decode_OPU_VOP3__V_CMP_LG_F32
4198 
4199  GPUStaticInst*
4201  {
4202  return new Inst_VOP3__V_CMP_GE_F32(&iFmt->iFmt_VOP3);
4203  } // decode_OPU_VOP3__V_CMP_GE_F32
4204 
4205  GPUStaticInst*
4207  {
4208  return new Inst_VOP3__V_CMP_O_F32(&iFmt->iFmt_VOP3);
4209  } // decode_OPU_VOP3__V_CMP_O_F32
4210 
4211  GPUStaticInst*
4213  {
4214  return new Inst_VOP3__V_CMP_U_F32(&iFmt->iFmt_VOP3);
4215  } // decode_OPU_VOP3__V_CMP_U_F32
4216 
4217  GPUStaticInst*
4219  {
4220  return new Inst_VOP3__V_CMP_NGE_F32(&iFmt->iFmt_VOP3);
4221  } // decode_OPU_VOP3__V_CMP_NGE_F32
4222 
4223  GPUStaticInst*
4225  {
4226  return new Inst_VOP3__V_CMP_NLG_F32(&iFmt->iFmt_VOP3);
4227  } // decode_OPU_VOP3__V_CMP_NLG_F32
4228 
4229  GPUStaticInst*
4231  {
4232  return new Inst_VOP3__V_CMP_NGT_F32(&iFmt->iFmt_VOP3);
4233  } // decode_OPU_VOP3__V_CMP_NGT_F32
4234 
4235  GPUStaticInst*
4237  {
4238  return new Inst_VOP3__V_CMP_NLE_F32(&iFmt->iFmt_VOP3);
4239  } // decode_OPU_VOP3__V_CMP_NLE_F32
4240 
4241  GPUStaticInst*
4243  {
4244  return new Inst_VOP3__V_CMP_NEQ_F32(&iFmt->iFmt_VOP3);
4245  } // decode_OPU_VOP3__V_CMP_NEQ_F32
4246 
4247  GPUStaticInst*
4249  {
4250  return new Inst_VOP3__V_CMP_NLT_F32(&iFmt->iFmt_VOP3);
4251  } // decode_OPU_VOP3__V_CMP_NLT_F32
4252 
4253  GPUStaticInst*
4255  {
4256  return new Inst_VOP3__V_CMP_TRU_F32(&iFmt->iFmt_VOP3);
4257  } // decode_OPU_VOP3__V_CMP_TRU_F32
4258 
4259  GPUStaticInst*
4261  {
4262  return new Inst_VOP3__V_CMPX_F_F32(&iFmt->iFmt_VOP3);
4263  } // decode_OPU_VOP3__V_CMPX_F_F32
4264 
4265  GPUStaticInst*
4267  {
4268  return new Inst_VOP3__V_CMPX_LT_F32(&iFmt->iFmt_VOP3);
4269  } // decode_OPU_VOP3__V_CMPX_LT_F32
4270 
4271  GPUStaticInst*
4273  {
4274  return new Inst_VOP3__V_CMPX_EQ_F32(&iFmt->iFmt_VOP3);
4275  } // decode_OPU_VOP3__V_CMPX_EQ_F32
4276 
4277  GPUStaticInst*
4279  {
4280  return new Inst_VOP3__V_CMPX_LE_F32(&iFmt->iFmt_VOP3);
4281  } // decode_OPU_VOP3__V_CMPX_LE_F32
4282 
4283  GPUStaticInst*
4285  {
4286  return new Inst_VOP3__V_CMPX_GT_F32(&iFmt->iFmt_VOP3);
4287  } // decode_OPU_VOP3__V_CMPX_GT_F32
4288 
4289  GPUStaticInst*
4291  {
4292  return new Inst_VOP3__V_CMPX_LG_F32(&iFmt->iFmt_VOP3);
4293  } // decode_OPU_VOP3__V_CMPX_LG_F32
4294 
4295  GPUStaticInst*
4297  {
4298  return new Inst_VOP3__V_CMPX_GE_F32(&iFmt->iFmt_VOP3);
4299  } // decode_OPU_VOP3__V_CMPX_GE_F32
4300 
4301  GPUStaticInst*
4303  {
4304  return new Inst_VOP3__V_CMPX_O_F32(&iFmt->iFmt_VOP3);
4305  } // decode_OPU_VOP3__V_CMPX_O_F32
4306 
4307  GPUStaticInst*
4309  {
4310  return new Inst_VOP3__V_CMPX_U_F32(&iFmt->iFmt_VOP3);
4311  } // decode_OPU_VOP3__V_CMPX_U_F32
4312 
4313  GPUStaticInst*
4315  {
4316  return new Inst_VOP3__V_CMPX_NGE_F32(&iFmt->iFmt_VOP3);
4317  } // decode_OPU_VOP3__V_CMPX_NGE_F32
4318 
4319  GPUStaticInst*
4321  {
4322  return new Inst_VOP3__V_CMPX_NLG_F32(&iFmt->iFmt_VOP3);
4323  } // decode_OPU_VOP3__V_CMPX_NLG_F32
4324 
4325  GPUStaticInst*
4327  {
4328  return new Inst_VOP3__V_CMPX_NGT_F32(&iFmt->iFmt_VOP3);
4329  } // decode_OPU_VOP3__V_CMPX_NGT_F32
4330 
4331  GPUStaticInst*
4333  {
4334  return new Inst_VOP3__V_CMPX_NLE_F32(&iFmt->iFmt_VOP3);
4335  } // decode_OPU_VOP3__V_CMPX_NLE_F32
4336 
4337  GPUStaticInst*
4339  {
4340  return new Inst_VOP3__V_CMPX_NEQ_F32(&iFmt->iFmt_VOP3);
4341  } // decode_OPU_VOP3__V_CMPX_NEQ_F32
4342 
4343  GPUStaticInst*
4345  {
4346  return new Inst_VOP3__V_CMPX_NLT_F32(&iFmt->iFmt_VOP3);
4347  } // decode_OPU_VOP3__V_CMPX_NLT_F32
4348 
4349  GPUStaticInst*
4351  {
4352  return new Inst_VOP3__V_CMPX_TRU_F32(&iFmt->iFmt_VOP3);
4353  } // decode_OPU_VOP3__V_CMPX_TRU_F32
4354 
4355  GPUStaticInst*
4357  {
4358  return new Inst_VOP3__V_CMP_F_F64(&iFmt->iFmt_VOP3);
4359  } // decode_OPU_VOP3__V_CMP_F_F64
4360 
4361  GPUStaticInst*
4363  {
4364  return new Inst_VOP3__V_CMP_LT_F64(&iFmt->iFmt_VOP3);
4365  } // decode_OPU_VOP3__V_CMP_LT_F64
4366 
4367  GPUStaticInst*
4369  {
4370  return new Inst_VOP3__V_CMP_EQ_F64(&iFmt->iFmt_VOP3);
4371  } // decode_OPU_VOP3__V_CMP_EQ_F64
4372 
4373  GPUStaticInst*
4375  {
4376  return new Inst_VOP3__V_CMP_LE_F64(&iFmt->iFmt_VOP3);
4377  } // decode_OPU_VOP3__V_CMP_LE_F64
4378 
4379  GPUStaticInst*
4381  {
4382  return new Inst_VOP3__V_CMP_GT_F64(&iFmt->iFmt_VOP3);
4383  } // decode_OPU_VOP3__V_CMP_GT_F64
4384 
4385  GPUStaticInst*
4387  {
4388  return new Inst_VOP3__V_CMP_LG_F64(&iFmt->iFmt_VOP3);
4389  } // decode_OPU_VOP3__V_CMP_LG_F64
4390 
4391  GPUStaticInst*
4393  {
4394  return new Inst_VOP3__V_CMP_GE_F64(&iFmt->iFmt_VOP3);
4395  } // decode_OPU_VOP3__V_CMP_GE_F64
4396 
4397  GPUStaticInst*
4399  {
4400  return new Inst_VOP3__V_CMP_O_F64(&iFmt->iFmt_VOP3);
4401  } // decode_OPU_VOP3__V_CMP_O_F64
4402 
4403  GPUStaticInst*
4405  {
4406  return new Inst_VOP3__V_CMP_U_F64(&iFmt->iFmt_VOP3);
4407  } // decode_OPU_VOP3__V_CMP_U_F64
4408 
4409  GPUStaticInst*
4411  {
4412  return new Inst_VOP3__V_CMP_NGE_F64(&iFmt->iFmt_VOP3);
4413  } // decode_OPU_VOP3__V_CMP_NGE_F64
4414 
4415  GPUStaticInst*
4417  {
4418  return new Inst_VOP3__V_CMP_NLG_F64(&iFmt->iFmt_VOP3);
4419  } // decode_OPU_VOP3__V_CMP_NLG_F64
4420 
4421  GPUStaticInst*
4423  {
4424  return new Inst_VOP3__V_CMP_NGT_F64(&iFmt->iFmt_VOP3);
4425  } // decode_OPU_VOP3__V_CMP_NGT_F64
4426 
4427  GPUStaticInst*
4429  {
4430  return new Inst_VOP3__V_CMP_NLE_F64(&iFmt->iFmt_VOP3);
4431  } // decode_OPU_VOP3__V_CMP_NLE_F64
4432 
4433  GPUStaticInst*
4435  {
4436  return new Inst_VOP3__V_CMP_NEQ_F64(&iFmt->iFmt_VOP3);
4437  } // decode_OPU_VOP3__V_CMP_NEQ_F64
4438 
4439  GPUStaticInst*
4441  {
4442  return new Inst_VOP3__V_CMP_NLT_F64(&iFmt->iFmt_VOP3);
4443  } // decode_OPU_VOP3__V_CMP_NLT_F64
4444 
4445  GPUStaticInst*
4447  {
4448  return new Inst_VOP3__V_CMP_TRU_F64(&iFmt->iFmt_VOP3);
4449  } // decode_OPU_VOP3__V_CMP_TRU_F64
4450 
4451  GPUStaticInst*
4453  {
4454  return new Inst_VOP3__V_CMPX_F_F64(&iFmt->iFmt_VOP3);
4455  } // decode_OPU_VOP3__V_CMPX_F_F64
4456 
4457  GPUStaticInst*
4459  {
4460  return new Inst_VOP3__V_CMPX_LT_F64(&iFmt->iFmt_VOP3);
4461  } // decode_OPU_VOP3__V_CMPX_LT_F64
4462 
4463  GPUStaticInst*
4465  {
4466  return new Inst_VOP3__V_CMPX_EQ_F64(&iFmt->iFmt_VOP3);
4467  } // decode_OPU_VOP3__V_CMPX_EQ_F64
4468 
4469  GPUStaticInst*
4471  {
4472  return new Inst_VOP3__V_CMPX_LE_F64(&iFmt->iFmt_VOP3);
4473  } // decode_OPU_VOP3__V_CMPX_LE_F64
4474 
4475  GPUStaticInst*
4477  {
4478  return new Inst_VOP3__V_CMPX_GT_F64(&iFmt->iFmt_VOP3);
4479  } // decode_OPU_VOP3__V_CMPX_GT_F64
4480 
4481  GPUStaticInst*
4483  {
4484  return new Inst_VOP3__V_CMPX_LG_F64(&iFmt->iFmt_VOP3);
4485  } // decode_OPU_VOP3__V_CMPX_LG_F64
4486 
4487  GPUStaticInst*
4489  {
4490  return new Inst_VOP3__V_CMPX_GE_F64(&iFmt->iFmt_VOP3);
4491  } // decode_OPU_VOP3__V_CMPX_GE_F64
4492 
4493  GPUStaticInst*
4495  {
4496  return new Inst_VOP3__V_CMPX_O_F64(&iFmt->iFmt_VOP3);
4497  } // decode_OPU_VOP3__V_CMPX_O_F64
4498 
4499  GPUStaticInst*
4501  {
4502  return new Inst_VOP3__V_CMPX_U_F64(&iFmt->iFmt_VOP3);
4503  } // decode_OPU_VOP3__V_CMPX_U_F64
4504 
4505  GPUStaticInst*
4507  {
4508  return new Inst_VOP3__V_CMPX_NGE_F64(&iFmt->iFmt_VOP3);
4509  } // decode_OPU_VOP3__V_CMPX_NGE_F64
4510 
4511  GPUStaticInst*
4513  {
4514  return new Inst_VOP3__V_CMPX_NLG_F64(&iFmt->iFmt_VOP3);
4515  } // decode_OPU_VOP3__V_CMPX_NLG_F64
4516 
4517  GPUStaticInst*
4519  {
4520  return new Inst_VOP3__V_CMPX_NGT_F64(&iFmt->iFmt_VOP3);
4521  } // decode_OPU_VOP3__V_CMPX_NGT_F64
4522 
4523  GPUStaticInst*
4525  {
4526  return new Inst_VOP3__V_CMPX_NLE_F64(&iFmt->iFmt_VOP3);
4527  } // decode_OPU_VOP3__V_CMPX_NLE_F64
4528 
4529  GPUStaticInst*
4531  {
4532  return new Inst_VOP3__V_CMPX_NEQ_F64(&iFmt->iFmt_VOP3);
4533  } // decode_OPU_VOP3__V_CMPX_NEQ_F64
4534 
4535  GPUStaticInst*
4537  {
4538  return new Inst_VOP3__V_CMPX_NLT_F64(&iFmt->iFmt_VOP3);
4539  } // decode_OPU_VOP3__V_CMPX_NLT_F64
4540 
4541  GPUStaticInst*
4543  {
4544  return new Inst_VOP3__V_CMPX_TRU_F64(&iFmt->iFmt_VOP3);
4545  } // decode_OPU_VOP3__V_CMPX_TRU_F64
4546 
4547  GPUStaticInst*
4549  {
4550  return new Inst_VOP3__V_CMP_F_I16(&iFmt->iFmt_VOP3);
4551  } // decode_OPU_VOP3__V_CMP_F_I16
4552 
4553  GPUStaticInst*
4555  {
4556  return new Inst_VOP3__V_CMP_LT_I16(&iFmt->iFmt_VOP3);
4557  } // decode_OPU_VOP3__V_CMP_LT_I16
4558 
4559  GPUStaticInst*
4561  {
4562  return new Inst_VOP3__V_CMP_EQ_I16(&iFmt->iFmt_VOP3);
4563  } // decode_OPU_VOP3__V_CMP_EQ_I16
4564 
4565  GPUStaticInst*
4567  {
4568  return new Inst_VOP3__V_CMP_LE_I16(&iFmt->iFmt_VOP3);
4569  } // decode_OPU_VOP3__V_CMP_LE_I16
4570 
4571  GPUStaticInst*
4573  {
4574  return new Inst_VOP3__V_CMP_GT_I16(&iFmt->iFmt_VOP3);
4575  } // decode_OPU_VOP3__V_CMP_GT_I16
4576 
4577  GPUStaticInst*
4579  {
4580  return new Inst_VOP3__V_CMP_NE_I16(&iFmt->iFmt_VOP3);
4581  } // decode_OPU_VOP3__V_CMP_NE_I16
4582 
4583  GPUStaticInst*
4585  {
4586  return new Inst_VOP3__V_CMP_GE_I16(&iFmt->iFmt_VOP3);
4587  } // decode_OPU_VOP3__V_CMP_GE_I16
4588 
4589  GPUStaticInst*
4591  {
4592  return new Inst_VOP3__V_CMP_T_I16(&iFmt->iFmt_VOP3);
4593  } // decode_OPU_VOP3__V_CMP_T_I16
4594 
4595  GPUStaticInst*
4597  {
4598  return new Inst_VOP3__V_CMP_F_U16(&iFmt->iFmt_VOP3);
4599  } // decode_OPU_VOP3__V_CMP_F_U16
4600 
4601  GPUStaticInst*
4603  {
4604  return new Inst_VOP3__V_CMP_LT_U16(&iFmt->iFmt_VOP3);
4605  } // decode_OPU_VOP3__V_CMP_LT_U16
4606 
4607  GPUStaticInst*
4609  {
4610  return new Inst_VOP3__V_CMP_EQ_U16(&iFmt->iFmt_VOP3);
4611  } // decode_OPU_VOP3__V_CMP_EQ_U16
4612 
4613  GPUStaticInst*
4615  {
4616  return new Inst_VOP3__V_CMP_LE_U16(&iFmt->iFmt_VOP3);
4617  } // decode_OPU_VOP3__V_CMP_LE_U16
4618 
4619  GPUStaticInst*
4621  {
4622  return new Inst_VOP3__V_CMP_GT_U16(&iFmt->iFmt_VOP3);
4623  } // decode_OPU_VOP3__V_CMP_GT_U16
4624 
4625  GPUStaticInst*
4627  {
4628  return new Inst_VOP3__V_CMP_NE_U16(&iFmt->iFmt_VOP3);
4629  } // decode_OPU_VOP3__V_CMP_NE_U16
4630 
4631  GPUStaticInst*
4633  {
4634  return new Inst_VOP3__V_CMP_GE_U16(&iFmt->iFmt_VOP3);
4635  } // decode_OPU_VOP3__V_CMP_GE_U16
4636 
4637  GPUStaticInst*
4639  {
4640  return new Inst_VOP3__V_CMP_T_U16(&iFmt->iFmt_VOP3);
4641  } // decode_OPU_VOP3__V_CMP_T_U16
4642 
4643  GPUStaticInst*
4645  {
4646  return new Inst_VOP3__V_CMPX_F_I16(&iFmt->iFmt_VOP3);
4647  } // decode_OPU_VOP3__V_CMPX_F_I16
4648 
4649  GPUStaticInst*
4651  {
4652  return new Inst_VOP3__V_CMPX_LT_I16(&iFmt->iFmt_VOP3);
4653  } // decode_OPU_VOP3__V_CMPX_LT_I16
4654 
4655  GPUStaticInst*
4657  {
4658  return new Inst_VOP3__V_CMPX_EQ_I16(&iFmt->iFmt_VOP3);
4659  } // decode_OPU_VOP3__V_CMPX_EQ_I16
4660 
4661  GPUStaticInst*
4663  {
4664  return new Inst_VOP3__V_CMPX_LE_I16(&iFmt->iFmt_VOP3);
4665  } // decode_OPU_VOP3__V_CMPX_LE_I16
4666 
4667  GPUStaticInst*
4669  {
4670  return new Inst_VOP3__V_CMPX_GT_I16(&iFmt->iFmt_VOP3);
4671  } // decode_OPU_VOP3__V_CMPX_GT_I16
4672 
4673  GPUStaticInst*
4675  {
4676  return new Inst_VOP3__V_CMPX_NE_I16(&iFmt->iFmt_VOP3);
4677  } // decode_OPU_VOP3__V_CMPX_NE_I16
4678 
4679  GPUStaticInst*
4681  {
4682  return new Inst_VOP3__V_CMPX_GE_I16(&iFmt->iFmt_VOP3);
4683  } // decode_OPU_VOP3__V_CMPX_GE_I16
4684 
4685  GPUStaticInst*
4687  {
4688  return new Inst_VOP3__V_CMPX_T_I16(&iFmt->iFmt_VOP3);
4689  } // decode_OPU_VOP3__V_CMPX_T_I16
4690 
4691  GPUStaticInst*
4693  {
4694  return new Inst_VOP3__V_CMPX_F_U16(&iFmt->iFmt_VOP3);
4695  } // decode_OPU_VOP3__V_CMPX_F_U16
4696 
4697  GPUStaticInst*
4699  {
4700  return new Inst_VOP3__V_CMPX_LT_U16(&iFmt->iFmt_VOP3);
4701  } // decode_OPU_VOP3__V_CMPX_LT_U16
4702 
4703  GPUStaticInst*
4705  {
4706  return new Inst_VOP3__V_CMPX_EQ_U16(&iFmt->iFmt_VOP3);
4707  } // decode_OPU_VOP3__V_CMPX_EQ_U16
4708 
4709  GPUStaticInst*
4711  {
4712  return new Inst_VOP3__V_CMPX_LE_U16(&iFmt->iFmt_VOP3);
4713  } // decode_OPU_VOP3__V_CMPX_LE_U16
4714 
4715  GPUStaticInst*
4717  {
4718  return new Inst_VOP3__V_CMPX_GT_U16(&iFmt->iFmt_VOP3);
4719  } // decode_OPU_VOP3__V_CMPX_GT_U16
4720 
4721  GPUStaticInst*
4723  {
4724  return new Inst_VOP3__V_CMPX_NE_U16(&iFmt->iFmt_VOP3);
4725  } // decode_OPU_VOP3__V_CMPX_NE_U16
4726 
4727  GPUStaticInst*
4729  {
4730  return new Inst_VOP3__V_CMPX_GE_U16(&iFmt->iFmt_VOP3);
4731  } // decode_OPU_VOP3__V_CMPX_GE_U16
4732 
4733  GPUStaticInst*
4735  {
4736  return new Inst_VOP3__V_CMPX_T_U16(&iFmt->iFmt_VOP3);
4737  } // decode_OPU_VOP3__V_CMPX_T_U16
4738 
4739  GPUStaticInst*
4741  {
4742  return new Inst_VOP3__V_CMP_F_I32(&iFmt->iFmt_VOP3);
4743  } // decode_OPU_VOP3__V_CMP_F_I32
4744 
4745  GPUStaticInst*
4747  {
4748  return new Inst_VOP3__V_CMP_LT_I32(&iFmt->iFmt_VOP3);
4749  } // decode_OPU_VOP3__V_CMP_LT_I32
4750 
4751  GPUStaticInst*
4753  {
4754  return new Inst_VOP3__V_CMP_EQ_I32(&iFmt->iFmt_VOP3);
4755  } // decode_OPU_VOP3__V_CMP_EQ_I32
4756 
4757  GPUStaticInst*
4759  {
4760  return new Inst_VOP3__V_CMP_LE_I32(&iFmt->iFmt_VOP3);
4761  } // decode_OPU_VOP3__V_CMP_LE_I32
4762 
4763  GPUStaticInst*
4765  {
4766  return new Inst_VOP3__V_CMP_GT_I32(&iFmt->iFmt_VOP3);
4767  } // decode_OPU_VOP3__V_CMP_GT_I32
4768 
4769  GPUStaticInst*
4771  {
4772  return new Inst_VOP3__V_CMP_NE_I32(&iFmt->iFmt_VOP3);
4773  } // decode_OPU_VOP3__V_CMP_NE_I32
4774 
4775  GPUStaticInst*
4777  {
4778  return new Inst_VOP3__V_CMP_GE_I32(&iFmt->iFmt_VOP3);
4779  } // decode_OPU_VOP3__V_CMP_GE_I32
4780 
4781  GPUStaticInst*
4783  {
4784  return new Inst_VOP3__V_CMP_T_I32(&iFmt->iFmt_VOP3);
4785  } // decode_OPU_VOP3__V_CMP_T_I32
4786 
4787  GPUStaticInst*
4789  {
4790  return new Inst_VOP3__V_CMP_F_U32(&iFmt->iFmt_VOP3);
4791  } // decode_OPU_VOP3__V_CMP_F_U32
4792 
4793  GPUStaticInst*
4795  {
4796  return new Inst_VOP3__V_CMP_LT_U32(&iFmt->iFmt_VOP3);
4797  } // decode_OPU_VOP3__V_CMP_LT_U32
4798 
4799  GPUStaticInst*
4801  {
4802  return new Inst_VOP3__V_CMP_EQ_U32(&iFmt->iFmt_VOP3);
4803  } // decode_OPU_VOP3__V_CMP_EQ_U32
4804 
4805  GPUStaticInst*
4807  {
4808  return new Inst_VOP3__V_CMP_LE_U32(&iFmt->iFmt_VOP3);
4809  } // decode_OPU_VOP3__V_CMP_LE_U32
4810 
4811  GPUStaticInst*
4813  {
4814  return new Inst_VOP3__V_CMP_GT_U32(&iFmt->iFmt_VOP3);
4815  } // decode_OPU_VOP3__V_CMP_GT_U32
4816 
4817  GPUStaticInst*
4819  {
4820  return new Inst_VOP3__V_CMP_NE_U32(&iFmt->iFmt_VOP3);
4821  } // decode_OPU_VOP3__V_CMP_NE_U32
4822 
4823  GPUStaticInst*
4825  {
4826  return new Inst_VOP3__V_CMP_GE_U32(&iFmt->iFmt_VOP3);
4827  } // decode_OPU_VOP3__V_CMP_GE_U32
4828 
4829  GPUStaticInst*
4831  {
4832  return new Inst_VOP3__V_CMP_T_U32(&iFmt->iFmt_VOP3);
4833  } // decode_OPU_VOP3__V_CMP_T_U32
4834 
4835  GPUStaticInst*
4837  {
4838  return new Inst_VOP3__V_CMPX_F_I32(&iFmt->iFmt_VOP3);
4839  } // decode_OPU_VOP3__V_CMPX_F_I32
4840 
4841  GPUStaticInst*
4843  {
4844  return new Inst_VOP3__V_CMPX_LT_I32(&iFmt->iFmt_VOP3);
4845  } // decode_OPU_VOP3__V_CMPX_LT_I32
4846 
4847  GPUStaticInst*
4849  {
4850  return new Inst_VOP3__V_CMPX_EQ_I32(&iFmt->iFmt_VOP3);
4851  } // decode_OPU_VOP3__V_CMPX_EQ_I32
4852 
4853  GPUStaticInst*
4855  {
4856  return new Inst_VOP3__V_CMPX_LE_I32(&iFmt->iFmt_VOP3);
4857  } // decode_OPU_VOP3__V_CMPX_LE_I32
4858 
4859  GPUStaticInst*
4861  {
4862  return new Inst_VOP3__V_CMPX_GT_I32(&iFmt->iFmt_VOP3);
4863  } // decode_OPU_VOP3__V_CMPX_GT_I32
4864 
4865  GPUStaticInst*
4867  {
4868  return new Inst_VOP3__V_CMPX_NE_I32(&iFmt->iFmt_VOP3);
4869  } // decode_OPU_VOP3__V_CMPX_NE_I32
4870 
4871  GPUStaticInst*
4873  {
4874  return new Inst_VOP3__V_CMPX_GE_I32(&iFmt->iFmt_VOP3);
4875  } // decode_OPU_VOP3__V_CMPX_GE_I32
4876 
4877  GPUStaticInst*
4879  {
4880  return new Inst_VOP3__V_CMPX_T_I32(&iFmt->iFmt_VOP3);
4881  } // decode_OPU_VOP3__V_CMPX_T_I32
4882 
4883  GPUStaticInst*
4885  {
4886  return new Inst_VOP3__V_CMPX_F_U32(&iFmt->iFmt_VOP3);
4887  } // decode_OPU_VOP3__V_CMPX_F_U32
4888 
4889  GPUStaticInst*
4891  {
4892  return new Inst_VOP3__V_CMPX_LT_U32(&iFmt->iFmt_VOP3);
4893  } // decode_OPU_VOP3__V_CMPX_LT_U32
4894 
4895  GPUStaticInst*
4897  {
4898  return new Inst_VOP3__V_CMPX_EQ_U32(&iFmt->iFmt_VOP3);
4899  } // decode_OPU_VOP3__V_CMPX_EQ_U32
4900 
4901  GPUStaticInst*
4903  {
4904  return new Inst_VOP3__V_CMPX_LE_U32(&iFmt->iFmt_VOP3);
4905  } // decode_OPU_VOP3__V_CMPX_LE_U32
4906 
4907  GPUStaticInst*
4909  {
4910  return new Inst_VOP3__V_CMPX_GT_U32(&iFmt->iFmt_VOP3);
4911  } // decode_OPU_VOP3__V_CMPX_GT_U32
4912 
4913  GPUStaticInst*
4915  {
4916  return new Inst_VOP3__V_CMPX_NE_U32(&iFmt->iFmt_VOP3);
4917  } // decode_OPU_VOP3__V_CMPX_NE_U32
4918 
4919  GPUStaticInst*
4921  {
4922  return new Inst_VOP3__V_CMPX_GE_U32(&iFmt->iFmt_VOP3);
4923  } // decode_OPU_VOP3__V_CMPX_GE_U32
4924 
4925  GPUStaticInst*
4927  {
4928  return new Inst_VOP3__V_CMPX_T_U32(&iFmt->iFmt_VOP3);
4929  } // decode_OPU_VOP3__V_CMPX_T_U32
4930 
4931  GPUStaticInst*
4933  {
4934  return new Inst_VOP3__V_CMP_F_I64(&iFmt->iFmt_VOP3);
4935  } // decode_OPU_VOP3__V_CMP_F_I64
4936 
4937  GPUStaticInst*
4939  {
4940  return new Inst_VOP3__V_CMP_LT_I64(&iFmt->iFmt_VOP3);
4941  } // decode_OPU_VOP3__V_CMP_LT_I64
4942 
4943  GPUStaticInst*
4945  {
4946  return new Inst_VOP3__V_CMP_EQ_I64(&iFmt->iFmt_VOP3);
4947  } // decode_OPU_VOP3__V_CMP_EQ_I64
4948 
4949  GPUStaticInst*
4951  {
4952  return new Inst_VOP3__V_CMP_LE_I64(&iFmt->iFmt_VOP3);
4953  } // decode_OPU_VOP3__V_CMP_LE_I64
4954 
4955  GPUStaticInst*
4957  {
4958  return new Inst_VOP3__V_CMP_GT_I64(&iFmt->iFmt_VOP3);
4959  } // decode_OPU_VOP3__V_CMP_GT_I64
4960 
4961  GPUStaticInst*
4963  {
4964  return new Inst_VOP3__V_CMP_NE_I64(&iFmt->iFmt_VOP3);
4965  } // decode_OPU_VOP3__V_CMP_NE_I64
4966 
4967  GPUStaticInst*
4969  {
4970  return new Inst_VOP3__V_CMP_GE_I64(&iFmt->iFmt_VOP3);
4971  } // decode_OPU_VOP3__V_CMP_GE_I64
4972 
4973  GPUStaticInst*
4975  {
4976  return new Inst_VOP3__V_CMP_T_I64(&iFmt->iFmt_VOP3);
4977  } // decode_OPU_VOP3__V_CMP_T_I64
4978 
4979  GPUStaticInst*
4981  {
4982  return new Inst_VOP3__V_CMP_F_U64(&iFmt->iFmt_VOP3);
4983  } // decode_OPU_VOP3__V_CMP_F_U64
4984 
4985  GPUStaticInst*
4987  {
4988  return new Inst_VOP3__V_CMP_LT_U64(&iFmt->iFmt_VOP3);
4989  } // decode_OPU_VOP3__V_CMP_LT_U64
4990 
4991  GPUStaticInst*
4993  {
4994  return new Inst_VOP3__V_CMP_EQ_U64(&iFmt->iFmt_VOP3);
4995  } // decode_OPU_VOP3__V_CMP_EQ_U64
4996 
4997  GPUStaticInst*
4999  {
5000  return new Inst_VOP3__V_CMP_LE_U64(&iFmt->iFmt_VOP3);
5001  } // decode_OPU_VOP3__V_CMP_LE_U64
5002 
5003  GPUStaticInst*
5005  {
5006  return new Inst_VOP3__V_CMP_GT_U64(&iFmt->iFmt_VOP3);
5007  } // decode_OPU_VOP3__V_CMP_GT_U64
5008 
5009  GPUStaticInst*
5011  {
5012  return new Inst_VOP3__V_CMP_NE_U64(&iFmt->iFmt_VOP3);
5013  } // decode_OPU_VOP3__V_CMP_NE_U64
5014 
5015  GPUStaticInst*
5017  {
5018  return new Inst_VOP3__V_CMP_GE_U64(&iFmt->iFmt_VOP3);
5019  } // decode_OPU_VOP3__V_CMP_GE_U64
5020 
5021  GPUStaticInst*
5023  {
5024  return new Inst_VOP3__V_CMP_T_U64(&iFmt->iFmt_VOP3);
5025  } // decode_OPU_VOP3__V_CMP_T_U64
5026 
5027  GPUStaticInst*
5029  {
5030  return new Inst_VOP3__V_CMPX_F_I64(&iFmt->iFmt_VOP3);
5031  } // decode_OPU_VOP3__V_CMPX_F_I64
5032 
5033  GPUStaticInst*
5035  {
5036  return new Inst_VOP3__V_CMPX_LT_I64(&iFmt->iFmt_VOP3);
5037  } // decode_OPU_VOP3__V_CMPX_LT_I64
5038 
5039  GPUStaticInst*
5041  {
5042  return new Inst_VOP3__V_CMPX_EQ_I64(&iFmt->iFmt_VOP3);
5043  } // decode_OPU_VOP3__V_CMPX_EQ_I64
5044 
5045  GPUStaticInst*
5047  {
5048  return new Inst_VOP3__V_CMPX_LE_I64(&iFmt->iFmt_VOP3);
5049  } // decode_OPU_VOP3__V_CMPX_LE_I64
5050 
5051  GPUStaticInst*
5053  {
5054  return new Inst_VOP3__V_CMPX_GT_I64(&iFmt->iFmt_VOP3);
5055  } // decode_OPU_VOP3__V_CMPX_GT_I64
5056 
5057  GPUStaticInst*
5059  {
5060  return new Inst_VOP3__V_CMPX_NE_I64(&iFmt->iFmt_VOP3);
5061  } // decode_OPU_VOP3__V_CMPX_NE_I64
5062 
5063  GPUStaticInst*
5065  {
5066  return new Inst_VOP3__V_CMPX_GE_I64(&iFmt->iFmt_VOP3);
5067  } // decode_OPU_VOP3__V_CMPX_GE_I64
5068 
5069  GPUStaticInst*
5071  {
5072  return new Inst_VOP3__V_CMPX_T_I64(&iFmt->iFmt_VOP3);
5073  } // decode_OPU_VOP3__V_CMPX_T_I64
5074 
5075  GPUStaticInst*
5077  {
5078  return new Inst_VOP3__V_CMPX_F_U64(&iFmt->iFmt_VOP3);
5079  } // decode_OPU_VOP3__V_CMPX_F_U64
5080 
5081  GPUStaticInst*
5083  {
5084  return new Inst_VOP3__V_CMPX_LT_U64(&iFmt->iFmt_VOP3);
5085  } // decode_OPU_VOP3__V_CMPX_LT_U64
5086 
5087  GPUStaticInst*
5089  {
5090  return new Inst_VOP3__V_CMPX_EQ_U64(&iFmt->iFmt_VOP3);
5091  } // decode_OPU_VOP3__V_CMPX_EQ_U64
5092 
5093  GPUStaticInst*
5095  {
5096  return new Inst_VOP3__V_CMPX_LE_U64(&iFmt->iFmt_VOP3);
5097  } // decode_OPU_VOP3__V_CMPX_LE_U64
5098 
5099  GPUStaticInst*
5101  {
5102  return new Inst_VOP3__V_CMPX_GT_U64(&iFmt->iFmt_VOP3);
5103  } // decode_OPU_VOP3__V_CMPX_GT_U64
5104 
5105  GPUStaticInst*
5107  {
5108  return new Inst_VOP3__V_CMPX_NE_U64(&iFmt->iFmt_VOP3);
5109  } // decode_OPU_VOP3__V_CMPX_NE_U64
5110 
5111  GPUStaticInst*
5113  {
5114  return new Inst_VOP3__V_CMPX_GE_U64(&iFmt->iFmt_VOP3);
5115  } // decode_OPU_VOP3__V_CMPX_GE_U64
5116 
5117  GPUStaticInst*
5119  {
5120  return new Inst_VOP3__V_CMPX_T_U64(&iFmt->iFmt_VOP3);
5121  } // decode_OPU_VOP3__V_CMPX_T_U64
5122 
5123  GPUStaticInst*
5125  {
5126  return new Inst_VOP3__V_CNDMASK_B32(&iFmt->iFmt_VOP3);
5127  } // decode_OPU_VOP3__V_CNDMASK_B32
5128 
5129  GPUStaticInst*
5131  {
5132  return new Inst_VOP3__V_ADD_F32(&iFmt->iFmt_VOP3);
5133  } // decode_OPU_VOP3__V_ADD_F32
5134 
5135  GPUStaticInst*
5137  {
5138  return new Inst_VOP3__V_SUB_F32(&iFmt->iFmt_VOP3);
5139  } // decode_OPU_VOP3__V_SUB_F32
5140 
5141  GPUStaticInst*
5143  {
5144  return new Inst_VOP3__V_SUBREV_F32(&iFmt->iFmt_VOP3);
5145  } // decode_OPU_VOP3__V_SUBREV_F32
5146 
5147  GPUStaticInst*
5149  {
5150  return new Inst_VOP3__V_MUL_LEGACY_F32(&iFmt->iFmt_VOP3);
5151  } // decode_OPU_VOP3__V_MUL_LEGACY_F32
5152 
5153  GPUStaticInst*
5155  {
5156  return new Inst_VOP3__V_MUL_F32(&iFmt->iFmt_VOP3);
5157  } // decode_OPU_VOP3__V_MUL_F32
5158 
5159  GPUStaticInst*
5161  {
5162  return new Inst_VOP3__V_MUL_I32_I24(&iFmt->iFmt_VOP3);
5163  } // decode_OPU_VOP3__V_MUL_I32_I24
5164 
5165  GPUStaticInst*
5167  {
5168  return new Inst_VOP3__V_MUL_HI_I32_I24(&iFmt->iFmt_VOP3);
5169  } // decode_OPU_VOP3__V_MUL_HI_I32_I24
5170 
5171  GPUStaticInst*
5173  {
5174  return new Inst_VOP3__V_MUL_U32_U24(&iFmt->iFmt_VOP3);
5175  } // decode_OPU_VOP3__V_MUL_U32_U24
5176 
5177  GPUStaticInst*
5179  {
5180  return new Inst_VOP3__V_MUL_HI_U32_U24(&iFmt->iFmt_VOP3);
5181  } // decode_OPU_VOP3__V_MUL_HI_U32_U24
5182 
5183  GPUStaticInst*
5185  {
5186  return new Inst_VOP3__V_MIN_F32(&iFmt->iFmt_VOP3);
5187  } // decode_OPU_VOP3__V_MIN_F32
5188 
5189  GPUStaticInst*
5191  {
5192  return new Inst_VOP3__V_MAX_F32(&iFmt->iFmt_VOP3);
5193  } // decode_OPU_VOP3__V_MAX_F32
5194 
5195  GPUStaticInst*
5197  {
5198  return new Inst_VOP3__V_MIN_I32(&iFmt->iFmt_VOP3);
5199  } // decode_OPU_VOP3__V_MIN_I32
5200 
5201  GPUStaticInst*
5203  {
5204  return new Inst_VOP3__V_MAX_I32(&iFmt->iFmt_VOP3);
5205  } // decode_OPU_VOP3__V_MAX_I32
5206 
5207  GPUStaticInst*
5209  {
5210  return new Inst_VOP3__V_MIN_U32(&iFmt->iFmt_VOP3);
5211  } // decode_OPU_VOP3__V_MIN_U32
5212 
5213  GPUStaticInst*
5215  {
5216  return new Inst_VOP3__V_MAX_U32(&iFmt->iFmt_VOP3);
5217  } // decode_OPU_VOP3__V_MAX_U32
5218 
5219  GPUStaticInst*
5221  {
5222  return new Inst_VOP3__V_LSHRREV_B32(&iFmt->iFmt_VOP3);
5223  } // decode_OPU_VOP3__V_LSHRREV_B32
5224 
5225  GPUStaticInst*
5227  {
5228  return new Inst_VOP3__V_ASHRREV_I32(&iFmt->iFmt_VOP3);
5229  } // decode_OPU_VOP3__V_ASHRREV_I32
5230 
5231  GPUStaticInst*
5233  {
5234  return new Inst_VOP3__V_LSHLREV_B32(&iFmt->iFmt_VOP3);
5235  } // decode_OPU_VOP3__V_LSHLREV_B32
5236 
5237  GPUStaticInst*
5239  {
5240  return new Inst_VOP3__V_AND_B32(&iFmt->iFmt_VOP3);
5241  } // decode_OPU_VOP3__V_AND_B32
5242 
5243  GPUStaticInst*
5245  {
5246  return new Inst_VOP3__V_OR_B32(&iFmt->iFmt_VOP3);
5247  } // decode_OPU_VOP3__V_OR_B32
5248 
5249  GPUStaticInst*
5251  {
5252  return new Inst_VOP3__V_XOR_B32(&iFmt->iFmt_VOP3);
5253  } // decode_OPU_VOP3__V_XOR_B32
5254 
5255  GPUStaticInst*
5257  {
5258  return new Inst_VOP3__V_MAC_F32(&iFmt->iFmt_VOP3);
5259  } // decode_OPU_VOP3__V_MAC_F32
5260 
5261  GPUStaticInst*
5263  {
5264  return new Inst_VOP3__V_ADD_U32(&iFmt->iFmt_VOP3_SDST_ENC);
5265  } // decode_OPU_VOP3__V_ADD_U32
5266 
5267  GPUStaticInst*
5269  {
5270  return new Inst_VOP3__V_SUB_U32(&iFmt->iFmt_VOP3_SDST_ENC);
5271  } // decode_OPU_VOP3__V_SUB_U32
5272 
5273  GPUStaticInst*
5275  {
5276  return new Inst_VOP3__V_SUBREV_U32(&iFmt->iFmt_VOP3_SDST_ENC);
5277  } // decode_OPU_VOP3__V_SUBREV_U32
5278 
5279  GPUStaticInst*
5281  {
5282  return new Inst_VOP3__V_ADDC_U32(&iFmt->iFmt_VOP3_SDST_ENC);
5283  } // decode_OPU_VOP3__V_ADDC_U32
5284 
5285  GPUStaticInst*
5287  {
5288  return new Inst_VOP3__V_SUBB_U32(&iFmt->iFmt_VOP3_SDST_ENC);
5289  } // decode_OPU_VOP3__V_SUBB_U32
5290 
5291  GPUStaticInst*
5293  {
5294  return new Inst_VOP3__V_SUBBREV_U32(&iFmt->iFmt_VOP3_SDST_ENC);
5295  } // decode_OPU_VOP3__V_SUBBREV_U32
5296 
5297  GPUStaticInst*
5299  {
5300  return new Inst_VOP3__V_ADD_F16(&iFmt->iFmt_VOP3);
5301  } // decode_OPU_VOP3__V_ADD_F16
5302 
5303  GPUStaticInst*
5305  {
5306  return new Inst_VOP3__V_SUB_F16(&iFmt->iFmt_VOP3);
5307  } // decode_OPU_VOP3__V_SUB_F16
5308 
5309  GPUStaticInst*
5311  {
5312  return new Inst_VOP3__V_SUBREV_F16(&iFmt->iFmt_VOP3);
5313  } // decode_OPU_VOP3__V_SUBREV_F16
5314 
5315  GPUStaticInst*
5317  {
5318  return new Inst_VOP3__V_MUL_F16(&iFmt->iFmt_VOP3);
5319  } // decode_OPU_VOP3__V_MUL_F16
5320 
5321  GPUStaticInst*
5323  {
5324  return new Inst_VOP3__V_MAC_F16(&iFmt->iFmt_VOP3);
5325  } // decode_OPU_VOP3__V_MAC_F16
5326 
5327  GPUStaticInst*
5329  {
5330  return new Inst_VOP3__V_ADD_U16(&iFmt->iFmt_VOP3);
5331  } // decode_OPU_VOP3__V_ADD_U16
5332 
5333  GPUStaticInst*
5335  {
5336  return new Inst_VOP3__V_SUB_U16(&iFmt->iFmt_VOP3);
5337  } // decode_OPU_VOP3__V_SUB_U16
5338 
5339  GPUStaticInst*
5341  {
5342  return new Inst_VOP3__V_SUBREV_U16(&iFmt->iFmt_VOP3);
5343  } // decode_OPU_VOP3__V_SUBREV_U16
5344 
5345  GPUStaticInst*
5347  {
5348  return new Inst_VOP3__V_MUL_LO_U16(&iFmt->iFmt_VOP3);
5349  } // decode_OPU_VOP3__V_MUL_LO_U16
5350 
5351  GPUStaticInst*
5353  {
5354  return new Inst_VOP3__V_LSHLREV_B16(&iFmt->iFmt_VOP3);
5355  } // decode_OPU_VOP3__V_LSHLREV_B16
5356 
5357  GPUStaticInst*
5359  {
5360  return new Inst_VOP3__V_LSHRREV_B16(&iFmt->iFmt_VOP3);
5361  } // decode_OPU_VOP3__V_LSHRREV_B16
5362 
5363  GPUStaticInst*
5365  {
5366  return new Inst_VOP3__V_ASHRREV_I16(&iFmt->iFmt_VOP3);
5367  } // decode_OPU_VOP3__V_ASHRREV_I16
5368 
5369  GPUStaticInst*
5371  {
5372  return new Inst_VOP3__V_MAX_F16(&iFmt->iFmt_VOP3);
5373  } // decode_OPU_VOP3__V_MAX_F16
5374 
5375  GPUStaticInst*
5377  {
5378  return new Inst_VOP3__V_MIN_F16(&iFmt->iFmt_VOP3);
5379  } // decode_OPU_VOP3__V_MIN_F16
5380 
5381  GPUStaticInst*
5383  {
5384  return new Inst_VOP3__V_MAX_U16(&iFmt->iFmt_VOP3);
5385  } // decode_OPU_VOP3__V_MAX_U16
5386 
5387  GPUStaticInst*
5389  {
5390  return new Inst_VOP3__V_MAX_I16(&iFmt->iFmt_VOP3);
5391  } // decode_OPU_VOP3__V_MAX_I16
5392 
5393  GPUStaticInst*
5395  {
5396  return new Inst_VOP3__V_MIN_U16(&iFmt->iFmt_VOP3);
5397  } // decode_OPU_VOP3__V_MIN_U16
5398 
5399  GPUStaticInst*
5401  {
5402  return new Inst_VOP3__V_MIN_I16(&iFmt->iFmt_VOP3);
5403  } // decode_OPU_VOP3__V_MIN_I16
5404 
5405  GPUStaticInst*
5407  {
5408  return new Inst_VOP3__V_LDEXP_F16(&iFmt->iFmt_VOP3);
5409  } // decode_OPU_VOP3__V_LDEXP_F16
5410 
5411  GPUStaticInst*
5413  {
5414  return new Inst_VOP3__V_NOP(&iFmt->iFmt_VOP3);
5415  } // decode_OPU_VOP3__V_NOP
5416 
5417  GPUStaticInst*
5419  {
5420  return new Inst_VOP3__V_MOV_B32(&iFmt->iFmt_VOP3);
5421  } // decode_OPU_VOP3__V_MOV_B32
5422 
5423  GPUStaticInst*
5425  {
5426  return new Inst_VOP3__V_CVT_I32_F64(&iFmt->iFmt_VOP3);
5427  } // decode_OPU_VOP3__V_CVT_I32_F64
5428 
5429  GPUStaticInst*
5431  {
5432  return new Inst_VOP3__V_CVT_F64_I32(&iFmt->iFmt_VOP3);
5433  } // decode_OPU_VOP3__V_CVT_F64_I32
5434 
5435  GPUStaticInst*
5437  {
5438  return new Inst_VOP3__V_CVT_F32_I32(&iFmt->iFmt_VOP3);
5439  } // decode_OPU_VOP3__V_CVT_F32_I32
5440 
5441  GPUStaticInst*
5443  {
5444  return new Inst_VOP3__V_CVT_F32_U32(&iFmt->iFmt_VOP3);
5445  } // decode_OPU_VOP3__V_CVT_F32_U32
5446 
5447  GPUStaticInst*
5449  {
5450  return new Inst_VOP3__V_CVT_U32_F32(&iFmt->iFmt_VOP3);
5451  } // decode_OPU_VOP3__V_CVT_U32_F32
5452 
5453  GPUStaticInst*
5455  {
5456  return new Inst_VOP3__V_CVT_I32_F32(&iFmt->iFmt_VOP3);
5457  } // decode_OPU_VOP3__V_CVT_I32_F32
5458 
5459  GPUStaticInst*
5461  {
5462  return new Inst_VOP3__V_MOV_FED_B32(&iFmt->iFmt_VOP3);
5463  } // decode_OPU_VOP3__V_MOV_FED_B32
5464 
5465  GPUStaticInst*
5467  {
5468  return new Inst_VOP3__V_CVT_F16_F32(&iFmt->iFmt_VOP3);
5469  } // decode_OPU_VOP3__V_CVT_F16_F32
5470 
5471  GPUStaticInst*
5473  {
5474  return new Inst_VOP3__V_CVT_F32_F16(&iFmt->iFmt_VOP3);
5475  } // decode_OPU_VOP3__V_CVT_F32_F16
5476 
5477  GPUStaticInst*
5479  {
5480  return new Inst_VOP3__V_CVT_RPI_I32_F32(&iFmt->iFmt_VOP3);
5481  } // decode_OPU_VOP3__V_CVT_RPI_I32_F32
5482 
5483  GPUStaticInst*
5485  {
5486  return new Inst_VOP3__V_CVT_FLR_I32_F32(&iFmt->iFmt_VOP3);
5487  } // decode_OPU_VOP3__V_CVT_FLR_I32_F32
5488 
5489  GPUStaticInst*
5491  {
5492  return new Inst_VOP3__V_CVT_OFF_F32_I4(&iFmt->iFmt_VOP3);
5493  } // decode_OPU_VOP3__V_CVT_OFF_F32_I4
5494 
5495  GPUStaticInst*
5497  {
5498  return new Inst_VOP3__V_CVT_F32_F64(&iFmt->iFmt_VOP3);
5499  } // decode_OPU_VOP3__V_CVT_F32_F64
5500 
5501  GPUStaticInst*
5503  {
5504  return new Inst_VOP3__V_CVT_F64_F32(&iFmt->iFmt_VOP3);
5505  } // decode_OPU_VOP3__V_CVT_F64_F32
5506 
5507  GPUStaticInst*
5509  {
5510  return new Inst_VOP3__V_CVT_F32_UBYTE0(&iFmt->iFmt_VOP3);
5511  } // decode_OPU_VOP3__V_CVT_F32_UBYTE0
5512 
5513  GPUStaticInst*
5515  {
5516  return new Inst_VOP3__V_CVT_F32_UBYTE1(&iFmt->iFmt_VOP3);
5517  } // decode_OPU_VOP3__V_CVT_F32_UBYTE1
5518 
5519  GPUStaticInst*
5521  {
5522  return new Inst_VOP3__V_CVT_F32_UBYTE2(&iFmt->iFmt_VOP3);
5523  } // decode_OPU_VOP3__V_CVT_F32_UBYTE2
5524 
5525  GPUStaticInst*
5527  {
5528  return new Inst_VOP3__V_CVT_F32_UBYTE3(&iFmt->iFmt_VOP3);
5529  } // decode_OPU_VOP3__V_CVT_F32_UBYTE3
5530 
5531  GPUStaticInst*
5533  {
5534  return new Inst_VOP3__V_CVT_U32_F64(&iFmt->iFmt_VOP3);
5535  } // decode_OPU_VOP3__V_CVT_U32_F64
5536 
5537  GPUStaticInst*
5539  {
5540  return new Inst_VOP3__V_CVT_F64_U32(&iFmt->iFmt_VOP3);
5541  } // decode_OPU_VOP3__V_CVT_F64_U32
5542 
5543  GPUStaticInst*
5545  {
5546  return new Inst_VOP3__V_TRUNC_F64(&iFmt->iFmt_VOP3);
5547  } // decode_OPU_VOP3__V_TRUNC_F64
5548 
5549  GPUStaticInst*
5551  {
5552  return new Inst_VOP3__V_CEIL_F64(&iFmt->iFmt_VOP3);
5553  } // decode_OPU_VOP3__V_CEIL_F64
5554 
5555  GPUStaticInst*
5557  {
5558  return new Inst_VOP3__V_RNDNE_F64(&iFmt->iFmt_VOP3);
5559  } // decode_OPU_VOP3__V_RNDNE_F64
5560 
5561  GPUStaticInst*
5563  {
5564  return new Inst_VOP3__V_FLOOR_F64(&iFmt->iFmt_VOP3);
5565  } // decode_OPU_VOP3__V_FLOOR_F64
5566 
5567  GPUStaticInst*
5569  {
5570  return new Inst_VOP3__V_FRACT_F32(&iFmt->iFmt_VOP3);
5571  } // decode_OPU_VOP3__V_FRACT_F32
5572 
5573  GPUStaticInst*
5575  {
5576  return new Inst_VOP3__V_TRUNC_F32(&iFmt->iFmt_VOP3);
5577  } // decode_OPU_VOP3__V_TRUNC_F32
5578 
5579  GPUStaticInst*
5581  {
5582  return new Inst_VOP3__V_CEIL_F32(&iFmt->iFmt_VOP3);
5583  } // decode_OPU_VOP3__V_CEIL_F32
5584 
5585  GPUStaticInst*
5587  {
5588  return new Inst_VOP3__V_RNDNE_F32(&iFmt->iFmt_VOP3);
5589  } // decode_OPU_VOP3__V_RNDNE_F32
5590 
5591  GPUStaticInst*
5593  {
5594  return new Inst_VOP3__V_FLOOR_F32(&iFmt->iFmt_VOP3);
5595  } // decode_OPU_VOP3__V_FLOOR_F32
5596 
5597  GPUStaticInst*
5599  {
5600  return new Inst_VOP3__V_EXP_F32(&iFmt->iFmt_VOP3);
5601  } // decode_OPU_VOP3__V_EXP_F32
5602 
5603  GPUStaticInst*
5605  {
5606  return new Inst_VOP3__V_LOG_F32(&iFmt->iFmt_VOP3);
5607  } // decode_OPU_VOP3__V_LOG_F32
5608 
5609  GPUStaticInst*
5611  {
5612  return new Inst_VOP3__V_RCP_F32(&iFmt->iFmt_VOP3);
5613  } // decode_OPU_VOP3__V_RCP_F32
5614 
5615  GPUStaticInst*
5617  {
5618  return new Inst_VOP3__V_RCP_IFLAG_F32(&iFmt->iFmt_VOP3);
5619  } // decode_OPU_VOP3__V_RCP_IFLAG_F32
5620 
5621  GPUStaticInst*
5623  {
5624  return new Inst_VOP3__V_RSQ_F32(&iFmt->iFmt_VOP3);
5625  } // decode_OPU_VOP3__V_RSQ_F32
5626 
5627  GPUStaticInst*
5629  {
5630  return new Inst_VOP3__V_RCP_F64(&iFmt->iFmt_VOP3);
5631  } // decode_OPU_VOP3__V_RCP_F64
5632 
5633  GPUStaticInst*
5635  {
5636  return new Inst_VOP3__V_RSQ_F64(&iFmt->iFmt_VOP3);
5637  } // decode_OPU_VOP3__V_RSQ_F64
5638 
5639  GPUStaticInst*
5641  {
5642  return new Inst_VOP3__V_SQRT_F32(&iFmt->iFmt_VOP3);
5643  } // decode_OPU_VOP3__V_SQRT_F32
5644 
5645  GPUStaticInst*
5647  {
5648  return new Inst_VOP3__V_SQRT_F64(&iFmt->iFmt_VOP3);
5649  } // decode_OPU_VOP3__V_SQRT_F64
5650 
5651  GPUStaticInst*
5653  {
5654  return new Inst_VOP3__V_SIN_F32(&iFmt->iFmt_VOP3);
5655  } // decode_OPU_VOP3__V_SIN_F32
5656 
5657  GPUStaticInst*
5659  {
5660  return new Inst_VOP3__V_COS_F32(&iFmt->iFmt_VOP3);
5661  } // decode_OPU_VOP3__V_COS_F32
5662 
5663  GPUStaticInst*
5665  {
5666  return new Inst_VOP3__V_NOT_B32(&iFmt->iFmt_VOP3);
5667  } // decode_OPU_VOP3__V_NOT_B32
5668 
5669  GPUStaticInst*
5671  {
5672  return new Inst_VOP3__V_BFREV_B32(&iFmt->iFmt_VOP3);
5673  } // decode_OPU_VOP3__V_BFREV_B32
5674 
5675  GPUStaticInst*
5677  {
5678  return new Inst_VOP3__V_FFBH_U32(&iFmt->iFmt_VOP3);
5679  } // decode_OPU_VOP3__V_FFBH_U32
5680 
5681  GPUStaticInst*
5683  {
5684  return new Inst_VOP3__V_FFBL_B32(&iFmt->iFmt_VOP3);
5685  } // decode_OPU_VOP3__V_FFBL_B32
5686 
5687  GPUStaticInst*
5689  {
5690  return new Inst_VOP3__V_FFBH_I32(&iFmt->iFmt_VOP3);
5691  } // decode_OPU_VOP3__V_FFBH_I32
5692 
5693  GPUStaticInst*
5695  {
5696  return new Inst_VOP3__V_FREXP_EXP_I32_F64(&iFmt->iFmt_VOP3);
5697  } // decode_OPU_VOP3__V_FREXP_EXP_I32_F64
5698 
5699  GPUStaticInst*
5701  {
5702  return new Inst_VOP3__V_FREXP_MANT_F64(&iFmt->iFmt_VOP3);
5703  } // decode_OPU_VOP3__V_FREXP_MANT_F64
5704 
5705  GPUStaticInst*
5707  {
5708  return new Inst_VOP3__V_FRACT_F64(&iFmt->iFmt_VOP3);
5709  } // decode_OPU_VOP3__V_FRACT_F64
5710 
5711  GPUStaticInst*
5713  {
5714  return new Inst_VOP3__V_FREXP_EXP_I32_F32(&iFmt->iFmt_VOP3);
5715  } // decode_OPU_VOP3__V_FREXP_EXP_I32_F32
5716 
5717  GPUStaticInst*
5719  {
5720  return new Inst_VOP3__V_FREXP_MANT_F32(&iFmt->iFmt_VOP3);
5721  } // decode_OPU_VOP3__V_FREXP_MANT_F32
5722 
5723  GPUStaticInst*
5725  {
5726  return new Inst_VOP3__V_CLREXCP(&iFmt->iFmt_VOP3);
5727  } // decode_OPU_VOP3__V_CLREXCP
5728 
5729  GPUStaticInst*
5731  {
5732  return new Inst_VOP3__V_CVT_F16_U16(&iFmt->iFmt_VOP3);
5733  } // decode_OPU_VOP3__V_CVT_F16_U16
5734 
5735  GPUStaticInst*
5737  {
5738  return new Inst_VOP3__V_CVT_F16_I16(&iFmt->iFmt_VOP3);
5739  } // decode_OPU_VOP3__V_CVT_F16_I16
5740 
5741  GPUStaticInst*
5743  {
5744  return new Inst_VOP3__V_CVT_U16_F16(&iFmt->iFmt_VOP3);
5745  } // decode_OPU_VOP3__V_CVT_U16_F16
5746 
5747  GPUStaticInst*
5749  {
5750  return new Inst_VOP3__V_CVT_I16_F16(&iFmt->iFmt_VOP3);
5751  } // decode_OPU_VOP3__V_CVT_I16_F16
5752 
5753  GPUStaticInst*
5755  {
5756  return new Inst_VOP3__V_RCP_F16(&iFmt->iFmt_VOP3);
5757  } // decode_OPU_VOP3__V_RCP_F16
5758 
5759  GPUStaticInst*
5761  {
5762  return new Inst_VOP3__V_SQRT_F16(&iFmt->iFmt_VOP3);
5763  } // decode_OPU_VOP3__V_SQRT_F16
5764 
5765  GPUStaticInst*
5767  {
5768  return new Inst_VOP3__V_RSQ_F16(&iFmt->iFmt_VOP3);
5769  } // decode_OPU_VOP3__V_RSQ_F16
5770 
5771  GPUStaticInst*
5773  {
5774  return new Inst_VOP3__V_LOG_F16(&iFmt->iFmt_VOP3);
5775  } // decode_OPU_VOP3__V_LOG_F16
5776 
5777  GPUStaticInst*
5779  {
5780  return new Inst_VOP3__V_EXP_F16(&iFmt->iFmt_VOP3);
5781  } // decode_OPU_VOP3__V_EXP_F16
5782 
5783  GPUStaticInst*
5785  {
5786  return new Inst_VOP3__V_FREXP_MANT_F16(&iFmt->iFmt_VOP3);
5787  } // decode_OPU_VOP3__V_FREXP_MANT_F16
5788 
5789  GPUStaticInst*
5791  {
5792  return new Inst_VOP3__V_FREXP_EXP_I16_F16(&iFmt->iFmt_VOP3);
5793  } // decode_OPU_VOP3__V_FREXP_EXP_I16_F16
5794 
5795  GPUStaticInst*
5797  {
5798  return new Inst_VOP3__V_FLOOR_F16(&iFmt->iFmt_VOP3);
5799  } // decode_OPU_VOP3__V_FLOOR_F16
5800 
5801  GPUStaticInst*
5803  {
5804  return new Inst_VOP3__V_CEIL_F16(&iFmt->iFmt_VOP3);
5805  } // decode_OPU_VOP3__V_CEIL_F16
5806 
5807  GPUStaticInst*
5809  {
5810  return new Inst_VOP3__V_TRUNC_F16(&iFmt->iFmt_VOP3);
5811  } // decode_OPU_VOP3__V_TRUNC_F16
5812 
5813  GPUStaticInst*
5815  {
5816  return new Inst_VOP3__V_RNDNE_F16(&iFmt->iFmt_VOP3);
5817  } // decode_OPU_VOP3__V_RNDNE_F16
5818 
5819  GPUStaticInst*
5821  {
5822  return new Inst_VOP3__V_FRACT_F16(&iFmt->iFmt_VOP3);
5823  } // decode_OPU_VOP3__V_FRACT_F16
5824 
5825  GPUStaticInst*
5827  {
5828  return new Inst_VOP3__V_SIN_F16(&iFmt->iFmt_VOP3);
5829  } // decode_OPU_VOP3__V_SIN_F16
5830 
5831  GPUStaticInst*
5833  {
5834  return new Inst_VOP3__V_COS_F16(&iFmt->iFmt_VOP3);
5835  } // decode_OPU_VOP3__V_COS_F16
5836 
5837  GPUStaticInst*
5839  {
5840  return new Inst_VOP3__V_EXP_LEGACY_F32(&iFmt->iFmt_VOP3);
5841  } // decode_OPU_VOP3__V_EXP_LEGACY_F32
5842 
5843  GPUStaticInst*
5845  {
5846  return new Inst_VOP3__V_LOG_LEGACY_F32(&iFmt->iFmt_VOP3);
5847  } // decode_OPU_VOP3__V_LOG_LEGACY_F32
5848 
5849  GPUStaticInst*
5851  {
5852  return new Inst_VOP3__V_MAD_LEGACY_F32(&iFmt->iFmt_VOP3);
5853  } // decode_OPU_VOP3__V_MAD_LEGACY_F32
5854 
5855  GPUStaticInst*
5857  {
5858  return new Inst_VOP3__V_MAD_F32(&iFmt->iFmt_VOP3);
5859  } // decode_OPU_VOP3__V_MAD_F32
5860 
5861  GPUStaticInst*
5863  {
5864  return new Inst_VOP3__V_MAD_I32_I24(&iFmt->iFmt_VOP3);
5865  } // decode_OPU_VOP3__V_MAD_I32_I24
5866 
5867  GPUStaticInst*
5869  {
5870  return new Inst_VOP3__V_MAD_U32_U24(&iFmt->iFmt_VOP3);
5871  } // decode_OPU_VOP3__V_MAD_U32_U24
5872 
5873  GPUStaticInst*
5875  {
5876  return new Inst_VOP3__V_CUBEID_F32(&iFmt->iFmt_VOP3);
5877  } // decode_OPU_VOP3__V_CUBEID_F32
5878 
5879  GPUStaticInst*
5881  {
5882  return new Inst_VOP3__V_CUBESC_F32(&iFmt->iFmt_VOP3);
5883  } // decode_OPU_VOP3__V_CUBESC_F32
5884 
5885  GPUStaticInst*
5887  {
5888  return new Inst_VOP3__V_CUBETC_F32(&iFmt->iFmt_VOP3);
5889  } // decode_OPU_VOP3__V_CUBETC_F32
5890 
5891  GPUStaticInst*
5893  {
5894  return new Inst_VOP3__V_CUBEMA_F32(&iFmt->iFmt_VOP3);
5895  } // decode_OPU_VOP3__V_CUBEMA_F32
5896 
5897  GPUStaticInst*
5899  {
5900  return new Inst_VOP3__V_BFE_U32(&iFmt->iFmt_VOP3);
5901  } // decode_OPU_VOP3__V_BFE_U32
5902 
5903  GPUStaticInst*
5905  {
5906  return new Inst_VOP3__V_BFE_I32(&iFmt->iFmt_VOP3);
5907  } // decode_OPU_VOP3__V_BFE_I32
5908 
5909  GPUStaticInst*
5911  {
5912  return new Inst_VOP3__V_BFI_B32(&iFmt->iFmt_VOP3);
5913  } // decode_OPU_VOP3__V_BFI_B32
5914 
5915  GPUStaticInst*
5917  {
5918  return new Inst_VOP3__V_FMA_F32(&iFmt->iFmt_VOP3);
5919  } // decode_OPU_VOP3__V_FMA_F32
5920 
5921  GPUStaticInst*
5923  {
5924  return new Inst_VOP3__V_FMA_F64(&iFmt->iFmt_VOP3);
5925  } // decode_OPU_VOP3__V_FMA_F64
5926 
5927  GPUStaticInst*
5929  {
5930  return new Inst_VOP3__V_LERP_U8(&iFmt->iFmt_VOP3);
5931  } // decode_OPU_VOP3__V_LERP_U8
5932 
5933  GPUStaticInst*
5935  {
5936  return new Inst_VOP3__V_ALIGNBIT_B32(&iFmt->iFmt_VOP3);
5937  } // decode_OPU_VOP3__V_ALIGNBIT_B32
5938 
5939  GPUStaticInst*
5941  {
5942  return new Inst_VOP3__V_ALIGNBYTE_B32(&iFmt->iFmt_VOP3);
5943  } // decode_OPU_VOP3__V_ALIGNBYTE_B32
5944 
5945  GPUStaticInst*
5947  {
5948  return new Inst_VOP3__V_MIN3_F32(&iFmt->iFmt_VOP3);
5949  } // decode_OPU_VOP3__V_MIN3_F32
5950 
5951  GPUStaticInst*
5953  {
5954  return new Inst_VOP3__V_MIN3_I32(&iFmt->iFmt_VOP3);
5955  } // decode_OPU_VOP3__V_MIN3_I32
5956 
5957  GPUStaticInst*
5959  {
5960  return new Inst_VOP3__V_MIN3_U32(&iFmt->iFmt_VOP3);
5961  } // decode_OPU_VOP3__V_MIN3_U32
5962 
5963  GPUStaticInst*
5965  {
5966  return new Inst_VOP3__V_MAX3_F32(&iFmt->iFmt_VOP3);
5967  } // decode_OPU_VOP3__V_MAX3_F32
5968 
5969  GPUStaticInst*
5971  {
5972  return new Inst_VOP3__V_MAX3_I32(&iFmt->iFmt_VOP3);
5973  } // decode_OPU_VOP3__V_MAX3_I32
5974 
5975  GPUStaticInst*
5977  {
5978  return new Inst_VOP3__V_MAX3_U32(&iFmt->iFmt_VOP3);
5979  } // decode_OPU_VOP3__V_MAX3_U32
5980 
5981  GPUStaticInst*
5983  {
5984  return new Inst_VOP3__V_MED3_F32(&iFmt->iFmt_VOP3);
5985  } // decode_OPU_VOP3__V_MED3_F32
5986 
5987  GPUStaticInst*
5989  {
5990  return new Inst_VOP3__V_MED3_I32(&iFmt->iFmt_VOP3);
5991  } // decode_OPU_VOP3__V_MED3_I32
5992 
5993  GPUStaticInst*
5995  {
5996  return new Inst_VOP3__V_MED3_U32(&iFmt->iFmt_VOP3);
5997  } // decode_OPU_VOP3__V_MED3_U32
5998 
5999  GPUStaticInst*
6001  {
6002  return new Inst_VOP3__V_SAD_U8(&iFmt->iFmt_VOP3);
6003  } // decode_OPU_VOP3__V_SAD_U8
6004 
6005  GPUStaticInst*
6007  {
6008  return new Inst_VOP3__V_SAD_HI_U8(&iFmt->iFmt_VOP3);
6009  } // decode_OPU_VOP3__V_SAD_HI_U8
6010 
6011  GPUStaticInst*
6013  {
6014  return new Inst_VOP3__V_SAD_U16(&iFmt->iFmt_VOP3);
6015  } // decode_OPU_VOP3__V_SAD_U16
6016 
6017  GPUStaticInst*
6019  {
6020  return new Inst_VOP3__V_SAD_U32(&iFmt->iFmt_VOP3);
6021  } // decode_OPU_VOP3__V_SAD_U32
6022 
6023  GPUStaticInst*
6025  {
6026  return new Inst_VOP3__V_CVT_PK_U8_F32(&iFmt->iFmt_VOP3);
6027  } // decode_OPU_VOP3__V_CVT_PK_U8_F32
6028 
6029  GPUStaticInst*
6031  {
6032  return new Inst_VOP3__V_DIV_FIXUP_F32(&iFmt->iFmt_VOP3);
6033  } // decode_OPU_VOP3__V_DIV_FIXUP_F32
6034 
6035  GPUStaticInst*
6037  {
6038  return new Inst_VOP3__V_DIV_FIXUP_F64(&iFmt->iFmt_VOP3);
6039  } // decode_OPU_VOP3__V_DIV_FIXUP_F64
6040 
6041  GPUStaticInst*
6043  {
6045  } // decode_OPU_VOP3__V_DIV_SCALE_F32
6046 
6047  GPUStaticInst*
6049  {
6051  } // decode_OPU_VOP3__V_DIV_SCALE_F64
6052 
6053  GPUStaticInst*
6055  {
6056  return new Inst_VOP3__V_DIV_FMAS_F32(&iFmt->iFmt_VOP3);
6057  } // decode_OPU_VOP3__V_DIV_FMAS_F32
6058 
6059  GPUStaticInst*
6061  {
6062  return new Inst_VOP3__V_DIV_FMAS_F64(&iFmt->iFmt_VOP3);
6063  } // decode_OPU_VOP3__V_DIV_FMAS_F64
6064 
6065  GPUStaticInst*
6067  {
6068  return new Inst_VOP3__V_MSAD_U8(&iFmt->iFmt_VOP3);
6069  } // decode_OPU_VOP3__V_MSAD_U8
6070 
6071  GPUStaticInst*
6073  {
6074  return new Inst_VOP3__V_QSAD_PK_U16_U8(&iFmt->iFmt_VOP3);
6075  } // decode_OPU_VOP3__V_QSAD_PK_U16_U8
6076 
6077  GPUStaticInst*
6079  {
6080  return new Inst_VOP3__V_MQSAD_PK_U16_U8(&iFmt->iFmt_VOP3);
6081  } // decode_OPU_VOP3__V_MQSAD_PK_U16_U8
6082 
6083  GPUStaticInst*
6085  {
6086  return new Inst_VOP3__V_MQSAD_U32_U8(&iFmt->iFmt_VOP3);
6087  } // decode_OPU_VOP3__V_MQSAD_U32_U8
6088 
6089  GPUStaticInst*
6091  {
6092  return new Inst_VOP3__V_MAD_U64_U32(&iFmt->iFmt_VOP3_SDST_ENC);
6093  } // decode_OPU_VOP3__V_MAD_U64_U32
6094 
6095  GPUStaticInst*
6097  {
6098  return new Inst_VOP3__V_MAD_I64_I32(&iFmt->iFmt_VOP3_SDST_ENC);
6099  } // decode_OPU_VOP3__V_MAD_I64_I32
6100 
6101  GPUStaticInst*
6103  {
6104  return new Inst_VOP3__V_MAD_F16(&iFmt->iFmt_VOP3);
6105  } // decode_OPU_VOP3__V_MAD_F16
6106 
6107  GPUStaticInst*
6109  {
6110  return new Inst_VOP3__V_MAD_U16(&iFmt->iFmt_VOP3);
6111  } // decode_OPU_VOP3__V_MAD_U16
6112 
6113  GPUStaticInst*
6115  {
6116  return new Inst_VOP3__V_MAD_I16(&iFmt->iFmt_VOP3);
6117  } // decode_OPU_VOP3__V_MAD_I16
6118 
6119  GPUStaticInst*
6121  {
6122  return new Inst_VOP3__V_PERM_B32(&iFmt->iFmt_VOP3);
6123  } // decode_OPU_VOP3__V_PERM_B32
6124 
6125  GPUStaticInst*
6127  {
6128  return new Inst_VOP3__V_FMA_F16(&iFmt->iFmt_VOP3);
6129  } // decode_OPU_VOP3__V_FMA_F16
6130 
6131  GPUStaticInst*
6133  {
6134  return new Inst_VOP3__V_DIV_FIXUP_F16(&iFmt->iFmt_VOP3);
6135  } // decode_OPU_VOP3__V_DIV_FIXUP_F16
6136 
6137  GPUStaticInst*
6139  {
6140  return new Inst_VOP3__V_CVT_PKACCUM_U8_F32(&iFmt->iFmt_VOP3);
6141  } // decode_OPU_VOP3__V_CVT_PKACCUM_U8_F32
6142 
6143  GPUStaticInst*
6145  {
6146  return new Inst_VOP3__V_INTERP_P1_F32(&iFmt->iFmt_VOP3);
6147  } // decode_OPU_VOP3__V_INTERP_P1_F32
6148 
6149  GPUStaticInst*
6151  {
6152  return new Inst_VOP3__V_INTERP_P2_F32(&iFmt->iFmt_VOP3);
6153  } // decode_OPU_VOP3__V_INTERP_P2_F32
6154 
6155  GPUStaticInst*
6157  {
6158  return new Inst_VOP3__V_INTERP_MOV_F32(&iFmt->iFmt_VOP3);
6159  } // decode_OPU_VOP3__V_INTERP_MOV_F32
6160 
6161  GPUStaticInst*
6163  {
6164  return new Inst_VOP3__V_INTERP_P1LL_F16(&iFmt->iFmt_VOP3);
6165  } // decode_OPU_VOP3__V_INTERP_P1LL_F16
6166 
6167  GPUStaticInst*
6169  {
6170  return new Inst_VOP3__V_INTERP_P1LV_F16(&iFmt->iFmt_VOP3);
6171  } // decode_OPU_VOP3__V_INTERP_P1LV_F16
6172 
6173  GPUStaticInst*
6175  {
6176  return new Inst_VOP3__V_INTERP_P2_F16(&iFmt->iFmt_VOP3);
6177  } // decode_OPU_VOP3__V_INTERP_P2_F16
6178 
6179  GPUStaticInst*
6181  {
6182  return new Inst_VOP3__V_ADD_F64(&iFmt->iFmt_VOP3);
6183  } // decode_OPU_VOP3__V_ADD_F64
6184 
6185  GPUStaticInst*
6187  {
6188  return new Inst_VOP3__V_MUL_F64(&iFmt->iFmt_VOP3);
6189  } // decode_OPU_VOP3__V_MUL_F64
6190 
6191  GPUStaticInst*
6193  {
6194  return new Inst_VOP3__V_MIN_F64(&iFmt->iFmt_VOP3);
6195  } // decode_OPU_VOP3__V_MIN_F64
6196 
6197  GPUStaticInst*
6199  {
6200  return new Inst_VOP3__V_MAX_F64(&iFmt->iFmt_VOP3);
6201  } // decode_OPU_VOP3__V_MAX_F64
6202 
6203  GPUStaticInst*
6205  {
6206  return new Inst_VOP3__V_LDEXP_F64(&iFmt->iFmt_VOP3);
6207  } // decode_OPU_VOP3__V_LDEXP_F64
6208 
6209  GPUStaticInst*
6211  {
6212  return new Inst_VOP3__V_MUL_LO_U32(&iFmt->iFmt_VOP3);
6213  } // decode_OPU_VOP3__V_MUL_LO_U32
6214 
6215  GPUStaticInst*
6217  {
6218  return new Inst_VOP3__V_MUL_HI_U32(&iFmt->iFmt_VOP3);
6219  } // decode_OPU_VOP3__V_MUL_HI_U32
6220 
6221  GPUStaticInst*
6223  {
6224  return new Inst_VOP3__V_MUL_HI_I32(&iFmt->iFmt_VOP3);
6225  } // decode_OPU_VOP3__V_MUL_HI_I32
6226 
6227  GPUStaticInst*
6229  {
6230  return new Inst_VOP3__V_LDEXP_F32(&iFmt->iFmt_VOP3);
6231  } // decode_OPU_VOP3__V_LDEXP_F32
6232 
6233  GPUStaticInst*
6235  {
6236  return new Inst_VOP3__V_READLANE_B32(&iFmt->iFmt_VOP3);
6237  } // decode_OPU_VOP3__V_READLANE_B32
6238 
6239  GPUStaticInst*
6241  {
6242  return new Inst_VOP3__V_WRITELANE_B32(&iFmt->iFmt_VOP3);
6243  } // decode_OPU_VOP3__V_WRITELANE_B32
6244 
6245  GPUStaticInst*
6247  {
6248  return new Inst_VOP3__V_BCNT_U32_B32(&iFmt->iFmt_VOP3);
6249  } // decode_OPU_VOP3__V_BCNT_U32_B32
6250 
6251  GPUStaticInst*
6253  {
6254  return new Inst_VOP3__V_MBCNT_LO_U32_B32(&iFmt->iFmt_VOP3);
6255  } // decode_OPU_VOP3__V_MBCNT_LO_U32_B32
6256 
6257  GPUStaticInst*
6259  {
6260  return new Inst_VOP3__V_MBCNT_HI_U32_B32(&iFmt->iFmt_VOP3);
6261  } // decode_OPU_VOP3__V_MBCNT_HI_U32_B32
6262 
6263  GPUStaticInst*
6265  {
6266  return new Inst_VOP3__V_LSHLREV_B64(&iFmt->iFmt_VOP3);
6267  } // decode_OPU_VOP3__V_LSHLREV_B64
6268 
6269  GPUStaticInst*
6271  {
6272  return new Inst_VOP3__V_LSHRREV_B64(&iFmt->iFmt_VOP3);
6273  } // decode_OPU_VOP3__V_LSHRREV_B64
6274 
6275  GPUStaticInst*
6277  {
6278  return new Inst_VOP3__V_ASHRREV_I64(&iFmt->iFmt_VOP3);
6279  } // decode_OPU_VOP3__V_ASHRREV_I64
6280 
6281  GPUStaticInst*
6283  {
6284  return new Inst_VOP3__V_TRIG_PREOP_F64(&iFmt->iFmt_VOP3);
6285  } // decode_OPU_VOP3__V_TRIG_PREOP_F64
6286 
6287  GPUStaticInst*
6289  {
6290  return new Inst_VOP3__V_BFM_B32(&iFmt->iFmt_VOP3);
6291  } // decode_OPU_VOP3__V_BFM_B32
6292 
6293  GPUStaticInst*
6295  {
6296  return new Inst_VOP3__V_CVT_PKNORM_I16_F32(&iFmt->iFmt_VOP3);
6297  } // decode_OPU_VOP3__V_CVT_PKNORM_I16_F32
6298 
6299  GPUStaticInst*
6301  {
6302  return new Inst_VOP3__V_CVT_PKNORM_U16_F32(&iFmt->iFmt_VOP3);
6303  } // decode_OPU_VOP3__V_CVT_PKNORM_U16_F32
6304 
6305  GPUStaticInst*
6307  {
6308  return new Inst_VOP3__V_CVT_PKRTZ_F16_F32(&iFmt->iFmt_VOP3);
6309  } // decode_OPU_VOP3__V_CVT_PKRTZ_F16_F32
6310 
6311  GPUStaticInst*
6313  {
6314  return new Inst_VOP3__V_CVT_PK_U16_U32(&iFmt->iFmt_VOP3);
6315  } // decode_OPU_VOP3__V_CVT_PK_U16_U32
6316 
6317  GPUStaticInst*
6319  {
6320  return new Inst_VOP3__V_CVT_PK_I16_I32(&iFmt->iFmt_VOP3);
6321  } // decode_OPU_VOP3__V_CVT_PK_I16_I32
6322 
6323  GPUStaticInst*
6325  {
6326  return new Inst_DS__DS_ADD_U32(&iFmt->iFmt_DS);
6327  } // decode_OP_DS__DS_ADD_U32
6328 
6329  GPUStaticInst*
6331  {
6332  return new Inst_DS__DS_SUB_U32(&iFmt->iFmt_DS);
6333  } // decode_OP_DS__DS_SUB_U32
6334 
6335  GPUStaticInst*
6337  {
6338  return new Inst_DS__DS_RSUB_U32(&iFmt->iFmt_DS);
6339  } // decode_OP_DS__DS_RSUB_U32
6340 
6341  GPUStaticInst*
6343  {
6344  return new Inst_DS__DS_INC_U32(&iFmt->iFmt_DS);
6345  } // decode_OP_DS__DS_INC_U32
6346 
6347  GPUStaticInst*
6349  {
6350  return new Inst_DS__DS_DEC_U32(&iFmt->iFmt_DS);
6351  } // decode_OP_DS__DS_DEC_U32
6352 
6353  GPUStaticInst*
6355  {
6356  return new Inst_DS__DS_MIN_I32(&iFmt->iFmt_DS);
6357  } // decode_OP_DS__DS_MIN_I32
6358 
6359  GPUStaticInst*
6361  {
6362  return new Inst_DS__DS_MAX_I32(&iFmt->iFmt_DS);
6363  } // decode_OP_DS__DS_MAX_I32
6364 
6365  GPUStaticInst*
6367  {
6368  return new Inst_DS__DS_MIN_U32(&iFmt->iFmt_DS);
6369  } // decode_OP_DS__DS_MIN_U32
6370 
6371  GPUStaticInst*
6373  {
6374  return new Inst_DS__DS_MAX_U32(&iFmt->iFmt_DS);
6375  } // decode_OP_DS__DS_MAX_U32
6376 
6377  GPUStaticInst*
6379  {
6380  return new Inst_DS__DS_AND_B32(&iFmt->iFmt_DS);
6381  } // decode_OP_DS__DS_AND_B32
6382 
6383  GPUStaticInst*
6385  {
6386  return new Inst_DS__DS_OR_B32(&iFmt->iFmt_DS);
6387  } // decode_OP_DS__DS_OR_B32
6388 
6389  GPUStaticInst*
6391  {
6392  return new Inst_DS__DS_XOR_B32(&iFmt->iFmt_DS);
6393  } // decode_OP_DS__DS_XOR_B32
6394 
6395  GPUStaticInst*
6397  {
6398  return new Inst_DS__DS_MSKOR_B32(&iFmt->iFmt_DS);
6399  } // decode_OP_DS__DS_MSKOR_B32
6400 
6401  GPUStaticInst*
6403  {
6404  return new Inst_DS__DS_WRITE_B32(&iFmt->iFmt_DS);
6405  } // decode_OP_DS__DS_WRITE_B32
6406 
6407  GPUStaticInst*
6409  {
6410  return new Inst_DS__DS_WRITE2_B32(&iFmt->iFmt_DS);
6411  } // decode_OP_DS__DS_WRITE2_B32
6412 
6413  GPUStaticInst*
6415  {
6416  return new Inst_DS__DS_WRITE2ST64_B32(&iFmt->iFmt_DS);
6417  } // decode_OP_DS__DS_WRITE2ST64_B32
6418 
6419  GPUStaticInst*
6421  {
6422  return new Inst_DS__DS_CMPST_B32(&iFmt->iFmt_DS);
6423  } // decode_OP_DS__DS_CMPST_B32
6424 
6425  GPUStaticInst*
6427  {
6428  return new Inst_DS__DS_CMPST_F32(&iFmt->iFmt_DS);
6429  } // decode_OP_DS__DS_CMPST_F32
6430 
6431  GPUStaticInst*
6433  {
6434  return new Inst_DS__DS_MIN_F32(&iFmt->iFmt_DS);
6435  } // decode_OP_DS__DS_MIN_F32
6436 
6437  GPUStaticInst*
6439  {
6440  return new Inst_DS__DS_MAX_F32(&iFmt->iFmt_DS);
6441  } // decode_OP_DS__DS_MAX_F32
6442 
6443  GPUStaticInst*
6445  {
6446  return new Inst_DS__DS_NOP(&iFmt->iFmt_DS);
6447  } // decode_OP_DS__DS_NOP
6448 
6449  GPUStaticInst*
6451  {
6452  return new Inst_DS__DS_ADD_F32(&iFmt->iFmt_DS);
6453  } // decode_OP_DS__DS_ADD_F32
6454 
6455  GPUStaticInst*
6457  {
6458  return new Inst_DS__DS_WRITE_B8(&iFmt->iFmt_DS);
6459  } // decode_OP_DS__DS_WRITE_B8
6460 
6461  GPUStaticInst*
6463  {
6464  return new Inst_DS__DS_WRITE_B16(&iFmt->iFmt_DS);
6465  } // decode_OP_DS__DS_WRITE_B16
6466 
6467  GPUStaticInst*
6469  {
6470  return new Inst_DS__DS_ADD_RTN_U32(&iFmt->iFmt_DS);
6471  } // decode_OP_DS__DS_ADD_RTN_U32
6472 
6473  GPUStaticInst*
6475  {
6476  return new Inst_DS__DS_SUB_RTN_U32(&iFmt->iFmt_DS);
6477  } // decode_OP_DS__DS_SUB_RTN_U32
6478 
6479  GPUStaticInst*
6481  {
6482  return new Inst_DS__DS_RSUB_RTN_U32(&iFmt->iFmt_DS);
6483  } // decode_OP_DS__DS_RSUB_RTN_U32
6484 
6485  GPUStaticInst*
6487  {
6488  return new Inst_DS__DS_INC_RTN_U32(&iFmt->iFmt_DS);
6489  } // decode_OP_DS__DS_INC_RTN_U32
6490 
6491  GPUStaticInst*
6493  {
6494  return new Inst_DS__DS_DEC_RTN_U32(&iFmt->iFmt_DS);
6495  } // decode_OP_DS__DS_DEC_RTN_U32
6496 
6497  GPUStaticInst*
6499  {
6500  return new Inst_DS__DS_MIN_RTN_I32(&iFmt->iFmt_DS);
6501  } // decode_OP_DS__DS_MIN_RTN_I32
6502 
6503  GPUStaticInst*
6505  {
6506  return new Inst_DS__DS_MAX_RTN_I32(&iFmt->iFmt_DS);
6507  } // decode_OP_DS__DS_MAX_RTN_I32
6508 
6509  GPUStaticInst*
6511  {
6512  return new Inst_DS__DS_MIN_RTN_U32(&iFmt->iFmt_DS);
6513  } // decode_OP_DS__DS_MIN_RTN_U32
6514 
6515  GPUStaticInst*
6517  {
6518  return new Inst_DS__DS_MAX_RTN_U32(&iFmt->iFmt_DS);
6519  } // decode_OP_DS__DS_MAX_RTN_U32
6520 
6521  GPUStaticInst*
6523  {
6524  return new Inst_DS__DS_AND_RTN_B32(&iFmt->iFmt_DS);
6525  } // decode_OP_DS__DS_AND_RTN_B32
6526 
6527  GPUStaticInst*
6529  {
6530  return new Inst_DS__DS_OR_RTN_B32(&iFmt->iFmt_DS);
6531  } // decode_OP_DS__DS_OR_RTN_B32
6532 
6533  GPUStaticInst*
6535  {
6536  return new Inst_DS__DS_XOR_RTN_B32(&iFmt->iFmt_DS);
6537  } // decode_OP_DS__DS_XOR_RTN_B32
6538 
6539  GPUStaticInst*
6541  {
6542  return new Inst_DS__DS_MSKOR_RTN_B32(&iFmt->iFmt_DS);
6543  } // decode_OP_DS__DS_MSKOR_RTN_B32
6544 
6545  GPUStaticInst*
6547  {
6548  return new Inst_DS__DS_WRXCHG_RTN_B32(&iFmt->iFmt_DS);
6549  } // decode_OP_DS__DS_WRXCHG_RTN_B32
6550 
6551  GPUStaticInst*
6553  {
6554  return new Inst_DS__DS_WRXCHG2_RTN_B32(&iFmt->iFmt_DS);
6555  } // decode_OP_DS__DS_WRXCHG2_RTN_B32
6556 
6557  GPUStaticInst*
6559  {
6560  return new Inst_DS__DS_WRXCHG2ST64_RTN_B32(&iFmt->iFmt_DS);
6561  } // decode_OP_DS__DS_WRXCHG2ST64_RTN_B32
6562 
6563  GPUStaticInst*
6565  {
6566  return new Inst_DS__DS_CMPST_RTN_B32(&iFmt->iFmt_DS);
6567  } // decode_OP_DS__DS_CMPST_RTN_B32
6568 
6569  GPUStaticInst*
6571  {
6572  return new Inst_DS__DS_CMPST_RTN_F32(&iFmt->iFmt_DS);
6573  } // decode_OP_DS__DS_CMPST_RTN_F32
6574 
6575  GPUStaticInst*
6577  {
6578  return new Inst_DS__DS_MIN_RTN_F32(&iFmt->iFmt_DS);
6579  } // decode_OP_DS__DS_MIN_RTN_F32
6580 
6581  GPUStaticInst*
6583  {
6584  return new Inst_DS__DS_MAX_RTN_F32(&iFmt->iFmt_DS);
6585  } // decode_OP_DS__DS_MAX_RTN_F32
6586 
6587  GPUStaticInst*
6589  {
6590  return new Inst_DS__DS_WRAP_RTN_B32(&iFmt->iFmt_DS);
6591  } // decode_OP_DS__DS_WRAP_RTN_B32
6592 
6593  GPUStaticInst*
6595  {
6596  return new Inst_DS__DS_ADD_RTN_F32(&iFmt->iFmt_DS);
6597  } // decode_OP_DS__DS_ADD_RTN_F32
6598 
6599  GPUStaticInst*
6601  {
6602  return new Inst_DS__DS_READ_B32(&iFmt->iFmt_DS);
6603  } // decode_OP_DS__DS_READ_B32
6604 
6605  GPUStaticInst*
6607  {
6608  return new Inst_DS__DS_READ2_B32(&iFmt->iFmt_DS);
6609  } // decode_OP_DS__DS_READ2_B32
6610 
6611  GPUStaticInst*
6613  {
6614  return new Inst_DS__DS_READ2ST64_B32(&iFmt->iFmt_DS);
6615  } // decode_OP_DS__DS_READ2ST64_B32
6616 
6617  GPUStaticInst*
6619  {
6620  return new Inst_DS__DS_READ_I8(&iFmt->iFmt_DS);
6621  } // decode_OP_DS__DS_READ_I8
6622 
6623  GPUStaticInst*
6625  {
6626  return new Inst_DS__DS_READ_U8(&iFmt->iFmt_DS);
6627  } // decode_OP_DS__DS_READ_U8
6628 
6629  GPUStaticInst*
6631  {
6632  return new Inst_DS__DS_READ_I16(&iFmt->iFmt_DS);
6633  } // decode_OP_DS__DS_READ_I16
6634 
6635  GPUStaticInst*
6637  {
6638  return new Inst_DS__DS_READ_U16(&iFmt->iFmt_DS);
6639  } // decode_OP_DS__DS_READ_U16
6640 
6641  GPUStaticInst*
6643  {
6644  return new Inst_DS__DS_SWIZZLE_B32(&iFmt->iFmt_DS);
6645  } // decode_OP_DS__DS_SWIZZLE_B32
6646 
6647  GPUStaticInst*
6649  {
6650  return new Inst_DS__DS_PERMUTE_B32(&iFmt->iFmt_DS);
6651  } // decode_OP_DS__DS_PERMUTE_B32
6652 
6653  GPUStaticInst*
6655  {
6656  return new Inst_DS__DS_BPERMUTE_B32(&iFmt->iFmt_DS);
6657  } // decode_OP_DS__DS_BPERMUTE_B32
6658 
6659  GPUStaticInst*
6661  {
6662  return new Inst_DS__DS_ADD_U64(&iFmt->iFmt_DS);
6663  } // decode_OP_DS__DS_ADD_U64
6664 
6665  GPUStaticInst*
6667  {
6668  return new Inst_DS__DS_SUB_U64(&iFmt->iFmt_DS);
6669  } // decode_OP_DS__DS_SUB_U64
6670 
6671  GPUStaticInst*
6673  {
6674  return new Inst_DS__DS_RSUB_U64(&iFmt->iFmt_DS);
6675  } // decode_OP_DS__DS_RSUB_U64
6676 
6677  GPUStaticInst*
6679  {
6680  return new Inst_DS__DS_INC_U64(&iFmt->iFmt_DS);
6681  } // decode_OP_DS__DS_INC_U64
6682 
6683  GPUStaticInst*
6685  {
6686  return new Inst_DS__DS_DEC_U64(&iFmt->iFmt_DS);
6687  } // decode_OP_DS__DS_DEC_U64
6688 
6689  GPUStaticInst*
6691  {
6692  return new Inst_DS__DS_MIN_I64(&iFmt->iFmt_DS);
6693  } // decode_OP_DS__DS_MIN_I64
6694 
6695  GPUStaticInst*
6697  {
6698  return new Inst_DS__DS_MAX_I64(&iFmt->iFmt_DS);
6699  } // decode_OP_DS__DS_MAX_I64
6700 
6701  GPUStaticInst*
6703  {
6704  return new Inst_DS__DS_MIN_U64(&iFmt->iFmt_DS);
6705  } // decode_OP_DS__DS_MIN_U64
6706 
6707  GPUStaticInst*
6709  {
6710  return new Inst_DS__DS_MAX_U64(&iFmt->iFmt_DS);
6711  } // decode_OP_DS__DS_MAX_U64
6712 
6713  GPUStaticInst*
6715  {
6716  return new Inst_DS__DS_AND_B64(&iFmt->iFmt_DS);
6717  } // decode_OP_DS__DS_AND_B64
6718 
6719  GPUStaticInst*
6721  {
6722  return new Inst_DS__DS_OR_B64(&iFmt->iFmt_DS);
6723  } // decode_OP_DS__DS_OR_B64
6724 
6725  GPUStaticInst*
6727  {
6728  return new Inst_DS__DS_XOR_B64(&iFmt->iFmt_DS);
6729  } // decode_OP_DS__DS_XOR_B64
6730 
6731  GPUStaticInst*
6733  {
6734  return new Inst_DS__DS_MSKOR_B64(&iFmt->iFmt_DS);
6735  } // decode_OP_DS__DS_MSKOR_B64
6736 
6737  GPUStaticInst*
6739  {
6740  return new Inst_DS__DS_WRITE_B64(&iFmt->iFmt_DS);
6741  } // decode_OP_DS__DS_WRITE_B64
6742 
6743  GPUStaticInst*
6745  {
6746  return new Inst_DS__DS_WRITE2_B64(&iFmt->iFmt_DS);
6747  } // decode_OP_DS__DS_WRITE2_B64
6748 
6749  GPUStaticInst*
6751  {
6752  return new Inst_DS__DS_WRITE2ST64_B64(&iFmt->iFmt_DS);
6753  } // decode_OP_DS__DS_WRITE2ST64_B64
6754 
6755  GPUStaticInst*
6757  {
6758  return new Inst_DS__DS_CMPST_B64(&iFmt->iFmt_DS);
6759  } // decode_OP_DS__DS_CMPST_B64
6760 
6761  GPUStaticInst*
6763  {
6764  return new Inst_DS__DS_CMPST_F64(&iFmt->iFmt_DS);
6765  } // decode_OP_DS__DS_CMPST_F64
6766 
6767  GPUStaticInst*
6769  {
6770  return new Inst_DS__DS_MIN_F64(&iFmt->iFmt_DS);
6771  } // decode_OP_DS__DS_MIN_F64
6772 
6773  GPUStaticInst*
6775  {
6776  return new Inst_DS__DS_MAX_F64(&iFmt->iFmt_DS);
6777  } // decode_OP_DS__DS_MAX_F64
6778 
6779  GPUStaticInst*
6781  {
6782  return new Inst_DS__DS_ADD_RTN_U64(&iFmt->iFmt_DS);
6783  } // decode_OP_DS__DS_ADD_RTN_U64
6784 
6785  GPUStaticInst*
6787  {
6788  return new Inst_DS__DS_SUB_RTN_U64(&iFmt->iFmt_DS);
6789  } // decode_OP_DS__DS_SUB_RTN_U64
6790 
6791  GPUStaticInst*
6793  {
6794  return new Inst_DS__DS_RSUB_RTN_U64(&iFmt->iFmt_DS);
6795  } // decode_OP_DS__DS_RSUB_RTN_U64
6796 
6797  GPUStaticInst*
6799  {
6800  return new Inst_DS__DS_INC_RTN_U64(&iFmt->iFmt_DS);
6801  } // decode_OP_DS__DS_INC_RTN_U64
6802 
6803  GPUStaticInst*
6805  {
6806  return new Inst_DS__DS_DEC_RTN_U64(&iFmt->iFmt_DS);
6807  } // decode_OP_DS__DS_DEC_RTN_U64
6808 
6809  GPUStaticInst*
6811  {
6812  return new Inst_DS__DS_MIN_RTN_I64(&iFmt->iFmt_DS);
6813  } // decode_OP_DS__DS_MIN_RTN_I64
6814 
6815  GPUStaticInst*
6817  {
6818  return new Inst_DS__DS_MAX_RTN_I64(&iFmt->iFmt_DS);
6819  } // decode_OP_DS__DS_MAX_RTN_I64
6820 
6821  GPUStaticInst*
6823  {
6824  return new Inst_DS__DS_MIN_RTN_U64(&iFmt->iFmt_DS);
6825  } // decode_OP_DS__DS_MIN_RTN_U64
6826 
6827  GPUStaticInst*
6829  {
6830  return new Inst_DS__DS_MAX_RTN_U64(&iFmt->iFmt_DS);
6831  } // decode_OP_DS__DS_MAX_RTN_U64
6832 
6833  GPUStaticInst*
6835  {
6836  return new Inst_DS__DS_AND_RTN_B64(&iFmt->iFmt_DS);
6837  } // decode_OP_DS__DS_AND_RTN_B64
6838 
6839  GPUStaticInst*
6841  {
6842  return new Inst_DS__DS_OR_RTN_B64(&iFmt->iFmt_DS);
6843  } // decode_OP_DS__DS_OR_RTN_B64
6844 
6845  GPUStaticInst*
6847  {
6848  return new Inst_DS__DS_XOR_RTN_B64(&iFmt->iFmt_DS);
6849  } // decode_OP_DS__DS_XOR_RTN_B64
6850 
6851  GPUStaticInst*
6853  {
6854  return new Inst_DS__DS_MSKOR_RTN_B64(&iFmt->iFmt_DS);
6855  } // decode_OP_DS__DS_MSKOR_RTN_B64
6856 
6857  GPUStaticInst*
6859  {
6860  return new Inst_DS__DS_WRXCHG_RTN_B64(&iFmt->iFmt_DS);
6861  } // decode_OP_DS__DS_WRXCHG_RTN_B64
6862 
6863  GPUStaticInst*
6865  {
6866  return new Inst_DS__DS_WRXCHG2_RTN_B64(&iFmt->iFmt_DS);
6867  } // decode_OP_DS__DS_WRXCHG2_RTN_B64
6868 
6869  GPUStaticInst*
6871  {
6872  return new Inst_DS__DS_WRXCHG2ST64_RTN_B64(&iFmt->iFmt_DS);
6873  } // decode_OP_DS__DS_WRXCHG2ST64_RTN_B64
6874 
6875  GPUStaticInst*
6877  {
6878  return new Inst_DS__DS_CMPST_RTN_B64(&iFmt->iFmt_DS);
6879  } // decode_OP_DS__DS_CMPST_RTN_B64
6880 
6881  GPUStaticInst*
6883  {
6884  return new Inst_DS__DS_CMPST_RTN_F64(&iFmt->iFmt_DS);
6885  } // decode_OP_DS__DS_CMPST_RTN_F64
6886 
6887  GPUStaticInst*
6889  {
6890  return new Inst_DS__DS_MIN_RTN_F64(&iFmt->iFmt_DS);
6891  } // decode_OP_DS__DS_MIN_RTN_F64
6892 
6893  GPUStaticInst*
6895  {
6896  return new Inst_DS__DS_MAX_RTN_F64(&iFmt->iFmt_DS);
6897  } // decode_OP_DS__DS_MAX_RTN_F64
6898 
6899  GPUStaticInst*
6901  {
6902  return new Inst_DS__DS_READ_B64(&iFmt->iFmt_DS);
6903  } // decode_OP_DS__DS_READ_B64
6904 
6905  GPUStaticInst*
6907  {
6908  return new Inst_DS__DS_READ2_B64(&iFmt->iFmt_DS);
6909  } // decode_OP_DS__DS_READ2_B64
6910 
6911  GPUStaticInst*
6913  {
6914  return new Inst_DS__DS_READ2ST64_B64(&iFmt->iFmt_DS);
6915  } // decode_OP_DS__DS_READ2ST64_B64
6916 
6917  GPUStaticInst*
6919  {
6920  return new Inst_DS__DS_CONDXCHG32_RTN_B64(&iFmt->iFmt_DS);
6921  } // decode_OP_DS__DS_CONDXCHG32_RTN_B64
6922 
6923  GPUStaticInst*
6925  {
6926  return new Inst_DS__DS_ADD_SRC2_U32(&iFmt->iFmt_DS);
6927  } // decode_OP_DS__DS_ADD_SRC2_U32
6928 
6929  GPUStaticInst*
6931  {
6932  return new Inst_DS__DS_SUB_SRC2_U32(&iFmt->iFmt_DS);
6933  } // decode_OP_DS__DS_SUB_SRC2_U32
6934 
6935  GPUStaticInst*
6937  {
6938  return new Inst_DS__DS_RSUB_SRC2_U32(&iFmt->iFmt_DS);
6939  } // decode_OP_DS__DS_RSUB_SRC2_U32
6940 
6941  GPUStaticInst*
6943  {
6944  return new Inst_DS__DS_INC_SRC2_U32(&iFmt->iFmt_DS);
6945  } // decode_OP_DS__DS_INC_SRC2_U32
6946 
6947  GPUStaticInst*
6949  {
6950  return new Inst_DS__DS_DEC_SRC2_U32(&iFmt->iFmt_DS);
6951  } // decode_OP_DS__DS_DEC_SRC2_U32
6952 
6953  GPUStaticInst*
6955  {
6956  return new Inst_DS__DS_MIN_SRC2_I32(&iFmt->iFmt_DS);
6957  } // decode_OP_DS__DS_MIN_SRC2_I32
6958 
6959  GPUStaticInst*
6961  {
6962  return new Inst_DS__DS_MAX_SRC2_I32(&iFmt->iFmt_DS);
6963  } // decode_OP_DS__DS_MAX_SRC2_I32
6964 
6965  GPUStaticInst*
6967  {
6968  return new Inst_DS__DS_MIN_SRC2_U32(&iFmt->iFmt_DS);
6969  } // decode_OP_DS__DS_MIN_SRC2_U32
6970 
6971  GPUStaticInst*
6973  {
6974  return new Inst_DS__DS_MAX_SRC2_U32(&iFmt->iFmt_DS);
6975  } // decode_OP_DS__DS_MAX_SRC2_U32
6976 
6977  GPUStaticInst*
6979  {
6980  return new Inst_DS__DS_AND_SRC2_B32(&iFmt->iFmt_DS);
6981  } // decode_OP_DS__DS_AND_SRC2_B32
6982 
6983  GPUStaticInst*
6985  {
6986  return new Inst_DS__DS_OR_SRC2_B32(&iFmt->iFmt_DS);
6987  } // decode_OP_DS__DS_OR_SRC2_B32
6988 
6989  GPUStaticInst*
6991  {
6992  return new Inst_DS__DS_XOR_SRC2_B32(&iFmt->iFmt_DS);
6993  } // decode_OP_DS__DS_XOR_SRC2_B32
6994 
6995  GPUStaticInst*
6997  {
6998  return new Inst_DS__DS_WRITE_SRC2_B32(&iFmt->iFmt_DS);
6999  } // decode_OP_DS__DS_WRITE_SRC2_B32
7000 
7001  GPUStaticInst*
7003  {
7004  return new Inst_DS__DS_MIN_SRC2_F32(&iFmt->iFmt_DS);
7005  } // decode_OP_DS__DS_MIN_SRC2_F32
7006 
7007  GPUStaticInst*
7009  {
7010  return new Inst_DS__DS_MAX_SRC2_F32(&iFmt->iFmt_DS);
7011  } // decode_OP_DS__DS_MAX_SRC2_F32
7012 
7013  GPUStaticInst*
7015  {
7016  return new Inst_DS__DS_ADD_SRC2_F32(&iFmt->iFmt_DS);
7017  } // decode_OP_DS__DS_ADD_SRC2_F32
7018 
7019  GPUStaticInst*
7021  {
7022  return new Inst_DS__DS_GWS_SEMA_RELEASE_ALL(&iFmt->iFmt_DS);
7023  } // decode_OP_DS__DS_GWS_SEMA_RELEASE_ALL
7024 
7025  GPUStaticInst*
7027  {
7028  return new Inst_DS__DS_GWS_INIT(&iFmt->iFmt_DS);
7029  } // decode_OP_DS__DS_GWS_INIT
7030 
7031  GPUStaticInst*
7033  {
7034  return new Inst_DS__DS_GWS_SEMA_V(&iFmt->iFmt_DS);
7035  } // decode_OP_DS__DS_GWS_SEMA_V
7036 
7037  GPUStaticInst*
7039  {
7040  return new Inst_DS__DS_GWS_SEMA_BR(&iFmt->iFmt_DS);
7041  } // decode_OP_DS__DS_GWS_SEMA_BR
7042 
7043  GPUStaticInst*
7045  {
7046  return new Inst_DS__DS_GWS_SEMA_P(&iFmt->iFmt_DS);
7047  } // decode_OP_DS__DS_GWS_SEMA_P
7048 
7049  GPUStaticInst*
7051  {
7052  return new Inst_DS__DS_GWS_BARRIER(&iFmt->iFmt_DS);
7053  } // decode_OP_DS__DS_GWS_BARRIER
7054 
7055  GPUStaticInst*
7057  {
7058  return new Inst_DS__DS_CONSUME(&iFmt->iFmt_DS);
7059  } // decode_OP_DS__DS_CONSUME
7060 
7061  GPUStaticInst*
7063  {
7064  return new Inst_DS__DS_APPEND(&iFmt->iFmt_DS);
7065  } // decode_OP_DS__DS_APPEND
7066 
7067  GPUStaticInst*
7069  {
7070  return new Inst_DS__DS_ORDERED_COUNT(&iFmt->iFmt_DS);
7071  } // decode_OP_DS__DS_ORDERED_COUNT
7072 
7073  GPUStaticInst*
7075  {
7076  return new Inst_DS__DS_ADD_SRC2_U64(&iFmt->iFmt_DS);
7077  } // decode_OP_DS__DS_ADD_SRC2_U64
7078 
7079  GPUStaticInst*
7081  {
7082  return new Inst_DS__DS_SUB_SRC2_U64(&iFmt->iFmt_DS);
7083  } // decode_OP_DS__DS_SUB_SRC2_U64
7084 
7085  GPUStaticInst*
7087  {
7088  return new Inst_DS__DS_RSUB_SRC2_U64(&iFmt->iFmt_DS);
7089  } // decode_OP_DS__DS_RSUB_SRC2_U64
7090 
7091  GPUStaticInst*
7093  {
7094  return new Inst_DS__DS_INC_SRC2_U64(&iFmt->iFmt_DS);
7095  } // decode_OP_DS__DS_INC_SRC2_U64
7096 
7097  GPUStaticInst*
7099  {
7100  return new Inst_DS__DS_DEC_SRC2_U64(&iFmt->iFmt_DS);
7101  } // decode_OP_DS__DS_DEC_SRC2_U64
7102 
7103  GPUStaticInst*
7105  {
7106  return new Inst_DS__DS_MIN_SRC2_I64(&iFmt->iFmt_DS);
7107  } // decode_OP_DS__DS_MIN_SRC2_I64
7108 
7109  GPUStaticInst*
7111  {
7112  return new Inst_DS__DS_MAX_SRC2_I64(&iFmt->iFmt_DS);
7113  } // decode_OP_DS__DS_MAX_SRC2_I64
7114 
7115  GPUStaticInst*
7117  {
7118  return new Inst_DS__DS_MIN_SRC2_U64(&iFmt->iFmt_DS);
7119  } // decode_OP_DS__DS_MIN_SRC2_U64
7120 
7121  GPUStaticInst*
7123  {
7124  return new Inst_DS__DS_MAX_SRC2_U64(&iFmt->iFmt_DS);
7125  } // decode_OP_DS__DS_MAX_SRC2_U64
7126 
7127  GPUStaticInst*
7129  {
7130  return new Inst_DS__DS_AND_SRC2_B64(&iFmt->iFmt_DS);
7131  } // decode_OP_DS__DS_AND_SRC2_B64
7132 
7133  GPUStaticInst*
7135  {
7136  return new Inst_DS__DS_OR_SRC2_B64(&iFmt->iFmt_DS);
7137  } // decode_OP_DS__DS_OR_SRC2_B64
7138 
7139  GPUStaticInst*
7141  {
7142  return new Inst_DS__DS_XOR_SRC2_B64(&iFmt->iFmt_DS);
7143  } // decode_OP_DS__DS_XOR_SRC2_B64
7144 
7145  GPUStaticInst*
7147  {
7148  return new Inst_DS__DS_WRITE_SRC2_B64(&iFmt->iFmt_DS);
7149  } // decode_OP_DS__DS_WRITE_SRC2_B64
7150 
7151  GPUStaticInst*
7153  {
7154  return new Inst_DS__DS_MIN_SRC2_F64(&iFmt->iFmt_DS);
7155  } // decode_OP_DS__DS_MIN_SRC2_F64
7156 
7157  GPUStaticInst*
7159  {
7160  return new Inst_DS__DS_MAX_SRC2_F64(&iFmt->iFmt_DS);
7161  } // decode_OP_DS__DS_MAX_SRC2_F64
7162 
7163  GPUStaticInst*
7165  {
7166  return new Inst_DS__DS_WRITE_B96(&iFmt->iFmt_DS);
7167  } // decode_OP_DS__DS_WRITE_B96
7168 
7169  GPUStaticInst*
7171  {
7172  return new Inst_DS__DS_WRITE_B128(&iFmt->iFmt_DS);
7173  } // decode_OP_DS__DS_WRITE_B128
7174 
7175  GPUStaticInst*
7177  {
7178  return new Inst_DS__DS_READ_B96(&iFmt->iFmt_DS);
7179  } // decode_OP_DS__DS_READ_B96
7180 
7181  GPUStaticInst*
7183  {
7184  return new Inst_DS__DS_READ_B128(&iFmt->iFmt_DS);
7185  } // decode_OP_DS__DS_READ_B128
7186 
7187  GPUStaticInst*
7189  {
7190  return new Inst_FLAT__FLAT_LOAD_UBYTE(&iFmt->iFmt_FLAT);
7191  } // decode_OP_FLAT__FLAT_LOAD_UBYTE
7192 
7193  GPUStaticInst*
7195  {
7196  return new Inst_FLAT__FLAT_LOAD_SBYTE(&iFmt->iFmt_FLAT);
7197  } // decode_OP_FLAT__FLAT_LOAD_SBYTE
7198 
7199  GPUStaticInst*
7201  {
7202  return new Inst_FLAT__FLAT_LOAD_USHORT(&iFmt->iFmt_FLAT);
7203  } // decode_OP_FLAT__FLAT_LOAD_USHORT
7204 
7205  GPUStaticInst*
7207  {
7208  return new Inst_FLAT__FLAT_LOAD_SSHORT(&iFmt->iFmt_FLAT);
7209  } // decode_OP_FLAT__FLAT_LOAD_SSHORT
7210 
7211  GPUStaticInst*
7213  {
7214  return new Inst_FLAT__FLAT_LOAD_DWORD(&iFmt->iFmt_FLAT);
7215  } // decode_OP_FLAT__FLAT_LOAD_DWORD
7216 
7217  GPUStaticInst*
7219  {
7220  return new Inst_FLAT__FLAT_LOAD_DWORDX2(&iFmt->iFmt_FLAT);
7221  } // decode_OP_FLAT__FLAT_LOAD_DWORDX2
7222 
7223  GPUStaticInst*
7225  {
7226  return new Inst_FLAT__FLAT_LOAD_DWORDX3(&iFmt->iFmt_FLAT);
7227  } // decode_OP_FLAT__FLAT_LOAD_DWORDX3
7228 
7229  GPUStaticInst*
7231  {
7232  return new Inst_FLAT__FLAT_LOAD_DWORDX4(&iFmt->iFmt_FLAT);
7233  } // decode_OP_FLAT__FLAT_LOAD_DWORDX4
7234 
7235  GPUStaticInst*
7237  {
7238  return new Inst_FLAT__FLAT_STORE_BYTE(&iFmt->iFmt_FLAT);
7239  } // decode_OP_FLAT__FLAT_STORE_BYTE
7240 
7241  GPUStaticInst*
7243  {
7244  return new Inst_FLAT__FLAT_STORE_SHORT(&iFmt->iFmt_FLAT);
7245  } // decode_OP_FLAT__FLAT_STORE_SHORT
7246 
7247  GPUStaticInst*
7249  {
7250  return new Inst_FLAT__FLAT_STORE_DWORD(&iFmt->iFmt_FLAT);
7251  } // decode_OP_FLAT__FLAT_STORE_DWORD
7252 
7253  GPUStaticInst*
7255  {
7256  return new Inst_FLAT__FLAT_STORE_DWORDX2(&iFmt->iFmt_FLAT);
7257  } // decode_OP_FLAT__FLAT_STORE_DWORDX2
7258 
7259  GPUStaticInst*
7261  {
7262  return new Inst_FLAT__FLAT_STORE_DWORDX3(&iFmt->iFmt_FLAT);
7263  } // decode_OP_FLAT__FLAT_STORE_DWORDX3
7264 
7265  GPUStaticInst*
7267  {
7268  return new Inst_FLAT__FLAT_STORE_DWORDX4(&iFmt->iFmt_FLAT);
7269  } // decode_OP_FLAT__FLAT_STORE_DWORDX4
7270 
7271  GPUStaticInst*
7273  {
7274  return new Inst_FLAT__FLAT_ATOMIC_SWAP(&iFmt->iFmt_FLAT);
7275  } // decode_OP_FLAT__FLAT_ATOMIC_SWAP
7276 
7277  GPUStaticInst*
7279  {
7280  return new Inst_FLAT__FLAT_ATOMIC_CMPSWAP(&iFmt->iFmt_FLAT);
7281  } // decode_OP_FLAT__FLAT_ATOMIC_CMPSWAP
7282 
7283  GPUStaticInst*
7285  {
7286  return new Inst_FLAT__FLAT_ATOMIC_ADD(&iFmt->iFmt_FLAT);
7287  } // decode_OP_FLAT__FLAT_ATOMIC_ADD
7288 
7289  GPUStaticInst*
7291  {
7292  return new Inst_FLAT__FLAT_ATOMIC_SUB(&iFmt->iFmt_FLAT);
7293  } // decode_OP_FLAT__FLAT_ATOMIC_SUB
7294 
7295  GPUStaticInst*
7297  {
7298  return new Inst_FLAT__FLAT_ATOMIC_SMIN(&iFmt->iFmt_FLAT);
7299  } // decode_OP_FLAT__FLAT_ATOMIC_SMIN
7300 
7301  GPUStaticInst*
7303  {
7304  return new Inst_FLAT__FLAT_ATOMIC_UMIN(&iFmt->iFmt_FLAT);
7305  } // decode_OP_FLAT__FLAT_ATOMIC_UMIN
7306 
7307  GPUStaticInst*
7309  {
7310  return new Inst_FLAT__FLAT_ATOMIC_SMAX(&iFmt->iFmt_FLAT);
7311  } // decode_OP_FLAT__FLAT_ATOMIC_SMAX
7312 
7313  GPUStaticInst*
7315  {
7316  return new Inst_FLAT__FLAT_ATOMIC_UMAX(&iFmt->iFmt_FLAT);
7317  } // decode_OP_FLAT__FLAT_ATOMIC_UMAX
7318 
7319  GPUStaticInst*
7321  {
7322  return new Inst_FLAT__FLAT_ATOMIC_AND(&iFmt->iFmt_FLAT);
7323  } // decode_OP_FLAT__FLAT_ATOMIC_AND
7324 
7325  GPUStaticInst*
7327  {
7328  return new Inst_FLAT__FLAT_ATOMIC_OR(&iFmt->iFmt_FLAT);
7329  } // decode_OP_FLAT__FLAT_ATOMIC_OR
7330 
7331  GPUStaticInst*
7333  {
7334  return new Inst_FLAT__FLAT_ATOMIC_XOR(&iFmt->iFmt_FLAT);
7335  } // decode_OP_FLAT__FLAT_ATOMIC_XOR
7336 
7337  GPUStaticInst*
7339  {
7340  return new Inst_FLAT__FLAT_ATOMIC_INC(&iFmt->iFmt_FLAT);
7341  } // decode_OP_FLAT__FLAT_ATOMIC_INC
7342 
7343  GPUStaticInst*
7345  {
7346  return new Inst_FLAT__FLAT_ATOMIC_DEC(&iFmt->iFmt_FLAT);
7347  } // decode_OP_FLAT__FLAT_ATOMIC_DEC
7348 
7349  GPUStaticInst*
7351  {
7352  return new Inst_FLAT__FLAT_ATOMIC_SWAP_X2(&iFmt->iFmt_FLAT);
7353  } // decode_OP_FLAT__FLAT_ATOMIC_SWAP_X2
7354 
7355  GPUStaticInst*
7357  {
7358  return new Inst_FLAT__FLAT_ATOMIC_CMPSWAP_X2(&iFmt->iFmt_FLAT);
7359  } // decode_OP_FLAT__FLAT_ATOMIC_CMPSWAP_X2
7360 
7361  GPUStaticInst*
7363  {
7364  return new Inst_FLAT__FLAT_ATOMIC_ADD_X2(&iFmt->iFmt_FLAT);
7365  } // decode_OP_FLAT__FLAT_ATOMIC_ADD_X2
7366 
7367  GPUStaticInst*
7369  {
7370  return new Inst_FLAT__FLAT_ATOMIC_SUB_X2(&iFmt->iFmt_FLAT);
7371  } // decode_OP_FLAT__FLAT_ATOMIC_SUB_X2
7372 
7373  GPUStaticInst*
7375  {
7376  return new Inst_FLAT__FLAT_ATOMIC_SMIN_X2(&iFmt->iFmt_FLAT);
7377  } // decode_OP_FLAT__FLAT_ATOMIC_SMIN_X2
7378 
7379  GPUStaticInst*
7381  {
7382  return new Inst_FLAT__FLAT_ATOMIC_UMIN_X2(&iFmt->iFmt_FLAT);
7383  } // decode_OP_FLAT__FLAT_ATOMIC_UMIN_X2
7384 
7385  GPUStaticInst*
7387  {
7388  return new Inst_FLAT__FLAT_ATOMIC_SMAX_X2(&iFmt->iFmt_FLAT);
7389  } // decode_OP_FLAT__FLAT_ATOMIC_SMAX_X2
7390 
7391  GPUStaticInst*
7393  {
7394  return new Inst_FLAT__FLAT_ATOMIC_UMAX_X2(&iFmt->iFmt_FLAT);
7395  } // decode_OP_FLAT__FLAT_ATOMIC_UMAX_X2
7396 
7397  GPUStaticInst*
7399  {
7400  return new Inst_FLAT__FLAT_ATOMIC_AND_X2(&iFmt->iFmt_FLAT);
7401  } // decode_OP_FLAT__FLAT_ATOMIC_AND_X2
7402 
7403  GPUStaticInst*
7405  {
7406  return new Inst_FLAT__FLAT_ATOMIC_OR_X2(&iFmt->iFmt_FLAT);
7407  } // decode_OP_FLAT__FLAT_ATOMIC_OR_X2
7408 
7409  GPUStaticInst*
7411  {
7412  return new Inst_FLAT__FLAT_ATOMIC_XOR_X2(&iFmt->iFmt_FLAT);
7413  } // decode_OP_FLAT__FLAT_ATOMIC_XOR_X2
7414 
7415  GPUStaticInst*
7417  {
7418  return new Inst_FLAT__FLAT_ATOMIC_INC_X2(&iFmt->iFmt_FLAT);
7419  } // decode_OP_FLAT__FLAT_ATOMIC_INC_X2
7420 
7421  GPUStaticInst*
7423  {
7424  return new Inst_FLAT__FLAT_ATOMIC_DEC_X2(&iFmt->iFmt_FLAT);
7425  } // decode_OP_FLAT__FLAT_ATOMIC_DEC_X2
7426 
7427  GPUStaticInst*
7429  {
7430  return new Inst_MIMG__IMAGE_LOAD(&iFmt->iFmt_MIMG);
7431  } // decode_OP_MIMG__IMAGE_LOAD
7432 
7433  GPUStaticInst*
7435  {
7436  return new Inst_MIMG__IMAGE_LOAD_MIP(&iFmt->iFmt_MIMG);
7437  } // decode_OP_MIMG__IMAGE_LOAD_MIP
7438 
7439  GPUStaticInst*
7441  {
7442  return new Inst_MIMG__IMAGE_LOAD_PCK(&iFmt->iFmt_MIMG);
7443  } // decode_OP_MIMG__IMAGE_LOAD_PCK
7444 
7445  GPUStaticInst*
7447  {
7448  return new Inst_MIMG__IMAGE_LOAD_PCK_SGN(&iFmt->iFmt_MIMG);
7449  } // decode_OP_MIMG__IMAGE_LOAD_PCK_SGN
7450 
7451  GPUStaticInst*
7453  {
7454  return new Inst_MIMG__IMAGE_LOAD_MIP_PCK(&iFmt->iFmt_MIMG);
7455  } // decode_OP_MIMG__IMAGE_LOAD_MIP_PCK
7456 
7457  GPUStaticInst*
7459  {
7460  return new Inst_MIMG__IMAGE_LOAD_MIP_PCK_SGN(&iFmt->iFmt_MIMG);
7461  } // decode_OP_MIMG__IMAGE_LOAD_MIP_PCK_SGN
7462 
7463  GPUStaticInst*
7465  {
7466  return new Inst_MIMG__IMAGE_STORE(&iFmt->iFmt_MIMG);
7467  } // decode_OP_MIMG__IMAGE_STORE
7468 
7469  GPUStaticInst*
7471  {
7472  return new Inst_MIMG__IMAGE_STORE_MIP(&iFmt->iFmt_MIMG);
7473  } // decode_OP_MIMG__IMAGE_STORE_MIP
7474 
7475  GPUStaticInst*
7477  {
7478  return new Inst_MIMG__IMAGE_STORE_PCK(&iFmt->iFmt_MIMG);
7479  } // decode_OP_MIMG__IMAGE_STORE_PCK
7480 
7481  GPUStaticInst*
7483  {
7484  return new Inst_MIMG__IMAGE_STORE_MIP_PCK(&iFmt->iFmt_MIMG);
7485  } // decode_OP_MIMG__IMAGE_STORE_MIP_PCK
7486 
7487  GPUStaticInst*
7489  {
7490  return new Inst_MIMG__IMAGE_GET_RESINFO(&iFmt->iFmt_MIMG);
7491  } // decode_OP_MIMG__IMAGE_GET_RESINFO
7492 
7493  GPUStaticInst*
7495  {
7496  return new Inst_MIMG__IMAGE_ATOMIC_SWAP(&iFmt->iFmt_MIMG);
7497  } // decode_OP_MIMG__IMAGE_ATOMIC_SWAP
7498 
7499  GPUStaticInst*
7501  {
7502  return new Inst_MIMG__IMAGE_ATOMIC_CMPSWAP(&iFmt->iFmt_MIMG);
7503  } // decode_OP_MIMG__IMAGE_ATOMIC_CMPSWAP
7504 
7505  GPUStaticInst*
7507  {
7508  return new Inst_MIMG__IMAGE_ATOMIC_ADD(&iFmt->iFmt_MIMG);
7509  } // decode_OP_MIMG__IMAGE_ATOMIC_ADD
7510 
7511  GPUStaticInst*
7513  {
7514  return new Inst_MIMG__IMAGE_ATOMIC_SUB(&iFmt->iFmt_MIMG);
7515  } // decode_OP_MIMG__IMAGE_ATOMIC_SUB
7516 
7517  GPUStaticInst*
7519  {
7520  return new Inst_MIMG__IMAGE_ATOMIC_SMIN(&iFmt->iFmt_MIMG);
7521  } // decode_OP_MIMG__IMAGE_ATOMIC_SMIN
7522 
7523  GPUStaticInst*
7525  {
7526  return new Inst_MIMG__IMAGE_ATOMIC_UMIN(&iFmt->iFmt_MIMG);
7527  } // decode_OP_MIMG__IMAGE_ATOMIC_UMIN
7528 
7529  GPUStaticInst*
7531  {
7532  return new Inst_MIMG__IMAGE_ATOMIC_SMAX(&iFmt->iFmt_MIMG);
7533  } // decode_OP_MIMG__IMAGE_ATOMIC_SMAX
7534 
7535  GPUStaticInst*
7537  {
7538  return new Inst_MIMG__IMAGE_ATOMIC_UMAX(&iFmt->iFmt_MIMG);
7539  } // decode_OP_MIMG__IMAGE_ATOMIC_UMAX
7540 
7541  GPUStaticInst*
7543  {
7544  return new Inst_MIMG__IMAGE_ATOMIC_AND(&iFmt->iFmt_MIMG);
7545  } // decode_OP_MIMG__IMAGE_ATOMIC_AND
7546 
7547  GPUStaticInst*
7549  {
7550  return new Inst_MIMG__IMAGE_ATOMIC_OR(&iFmt->iFmt_MIMG);
7551  } // decode_OP_MIMG__IMAGE_ATOMIC_OR
7552 
7553  GPUStaticInst*
7555  {
7556  return new Inst_MIMG__IMAGE_ATOMIC_XOR(&iFmt->iFmt_MIMG);
7557  } // decode_OP_MIMG__IMAGE_ATOMIC_XOR
7558 
7559  GPUStaticInst*
7561  {
7562  return new Inst_MIMG__IMAGE_ATOMIC_INC(&iFmt->iFmt_MIMG);
7563  } // decode_OP_MIMG__IMAGE_ATOMIC_INC
7564 
7565  GPUStaticInst*
7567  {
7568  return new Inst_MIMG__IMAGE_ATOMIC_DEC(&iFmt->iFmt_MIMG);
7569  } // decode_OP_MIMG__IMAGE_ATOMIC_DEC
7570 
7571  GPUStaticInst*
7573  {
7574  return new Inst_MIMG__IMAGE_SAMPLE(&iFmt->iFmt_MIMG);
7575  } // decode_OP_MIMG__IMAGE_SAMPLE
7576 
7577  GPUStaticInst*
7579  {
7580  return new Inst_MIMG__IMAGE_SAMPLE_CL(&iFmt->iFmt_MIMG);
7581  } // decode_OP_MIMG__IMAGE_SAMPLE_CL
7582 
7583  GPUStaticInst*
7585  {
7586  return new Inst_MIMG__IMAGE_SAMPLE_D(&iFmt->iFmt_MIMG);
7587  } // decode_OP_MIMG__IMAGE_SAMPLE_D
7588 
7589  GPUStaticInst*
7591  {
7592  return new Inst_MIMG__IMAGE_SAMPLE_D_CL(&iFmt->iFmt_MIMG);
7593  } // decode_OP_MIMG__IMAGE_SAMPLE_D_CL
7594 
7595  GPUStaticInst*
7597  {
7598  return new Inst_MIMG__IMAGE_SAMPLE_L(&iFmt->iFmt_MIMG);
7599  } // decode_OP_MIMG__IMAGE_SAMPLE_L
7600 
7601  GPUStaticInst*
7603  {
7604  return new Inst_MIMG__IMAGE_SAMPLE_B(&iFmt->iFmt_MIMG);
7605  } // decode_OP_MIMG__IMAGE_SAMPLE_B
7606 
7607  GPUStaticInst*
7609  {
7610  return new Inst_MIMG__IMAGE_SAMPLE_B_CL(&iFmt->iFmt_MIMG);
7611  } // decode_OP_MIMG__IMAGE_SAMPLE_B_CL
7612 
7613  GPUStaticInst*
7615  {
7616  return new Inst_MIMG__IMAGE_SAMPLE_LZ(&iFmt->iFmt_MIMG);
7617  } // decode_OP_MIMG__IMAGE_SAMPLE_LZ
7618 
7619  GPUStaticInst*
7621  {
7622  return new Inst_MIMG__IMAGE_SAMPLE_C(&iFmt->iFmt_MIMG);
7623  } // decode_OP_MIMG__IMAGE_SAMPLE_C
7624 
7625  GPUStaticInst*
7627  {
7628  return new Inst_MIMG__IMAGE_SAMPLE_C_CL(&iFmt->iFmt_MIMG);
7629  } // decode_OP_MIMG__IMAGE_SAMPLE_C_CL
7630 
7631  GPUStaticInst*
7633  {
7634  return new Inst_MIMG__IMAGE_SAMPLE_C_D(&iFmt->iFmt_MIMG);
7635  } // decode_OP_MIMG__IMAGE_SAMPLE_C_D
7636 
7637  GPUStaticInst*
7639  {
7640  return new Inst_MIMG__IMAGE_SAMPLE_C_D_CL(&iFmt->iFmt_MIMG);
7641  } // decode_OP_MIMG__IMAGE_SAMPLE_C_D_CL
7642 
7643  GPUStaticInst*
7645  {
7646  return new Inst_MIMG__IMAGE_SAMPLE_C_L(&iFmt->iFmt_MIMG);
7647  } // decode_OP_MIMG__IMAGE_SAMPLE_C_L
7648 
7649  GPUStaticInst*
7651  {
7652  return new Inst_MIMG__IMAGE_SAMPLE_C_B(&iFmt->iFmt_MIMG);
7653  } // decode_OP_MIMG__IMAGE_SAMPLE_C_B
7654 
7655  GPUStaticInst*
7657  {
7658  return new Inst_MIMG__IMAGE_SAMPLE_C_B_CL(&iFmt->iFmt_MIMG);
7659  } // decode_OP_MIMG__IMAGE_SAMPLE_C_B_CL
7660 
7661  GPUStaticInst*
7663  {
7664  return new Inst_MIMG__IMAGE_SAMPLE_C_LZ(&iFmt->iFmt_MIMG);
7665  } // decode_OP_MIMG__IMAGE_SAMPLE_C_LZ
7666 
7667  GPUStaticInst*
7669  {
7670  return new Inst_MIMG__IMAGE_SAMPLE_O(&iFmt->iFmt_MIMG);
7671  } // decode_OP_MIMG__IMAGE_SAMPLE_O
7672 
7673  GPUStaticInst*
7675  {
7676  return new Inst_MIMG__IMAGE_SAMPLE_CL_O(&iFmt->iFmt_MIMG);
7677  } // decode_OP_MIMG__IMAGE_SAMPLE_CL_O
7678 
7679  GPUStaticInst*
7681  {
7682  return new Inst_MIMG__IMAGE_SAMPLE_D_O(&iFmt->iFmt_MIMG);
7683  } // decode_OP_MIMG__IMAGE_SAMPLE_D_O
7684 
7685  GPUStaticInst*
7687  {
7688  return new Inst_MIMG__IMAGE_SAMPLE_D_CL_O(&iFmt->iFmt_MIMG);
7689  } // decode_OP_MIMG__IMAGE_SAMPLE_D_CL_O
7690 
7691  GPUStaticInst*
7693  {
7694  return new Inst_MIMG__IMAGE_SAMPLE_L_O(&iFmt->iFmt_MIMG);
7695  } // decode_OP_MIMG__IMAGE_SAMPLE_L_O
7696 
7697  GPUStaticInst*
7699  {
7700  return new Inst_MIMG__IMAGE_SAMPLE_B_O(&iFmt->iFmt_MIMG);
7701  } // decode_OP_MIMG__IMAGE_SAMPLE_B_O
7702 
7703  GPUStaticInst*
7705  {
7706  return new Inst_MIMG__IMAGE_SAMPLE_B_CL_O(&iFmt->iFmt_MIMG);
7707  } // decode_OP_MIMG__IMAGE_SAMPLE_B_CL_O
7708 
7709  GPUStaticInst*
7711  {
7712  return new Inst_MIMG__IMAGE_SAMPLE_LZ_O(&iFmt->iFmt_MIMG);
7713  } // decode_OP_MIMG__IMAGE_SAMPLE_LZ_O
7714 
7715  GPUStaticInst*
7717  {
7718  return new Inst_MIMG__IMAGE_SAMPLE_C_O(&iFmt->iFmt_MIMG);
7719  } // decode_OP_MIMG__IMAGE_SAMPLE_C_O
7720 
7721  GPUStaticInst*
7723  {
7724  return new Inst_MIMG__IMAGE_SAMPLE_C_CL_O(&iFmt->iFmt_MIMG);
7725  } // decode_OP_MIMG__IMAGE_SAMPLE_C_CL_O
7726 
7727  GPUStaticInst*
7729  {
7730  return new Inst_MIMG__IMAGE_SAMPLE_C_D_O(&iFmt->iFmt_MIMG);
7731  } // decode_OP_MIMG__IMAGE_SAMPLE_C_D_O
7732 
7733  GPUStaticInst*
7735  {
7736  return new Inst_MIMG__IMAGE_SAMPLE_C_D_CL_O(&iFmt->iFmt_MIMG);
7737  } // decode_OP_MIMG__IMAGE_SAMPLE_C_D_CL_O
7738 
7739  GPUStaticInst*
7741  {
7742  return new Inst_MIMG__IMAGE_SAMPLE_C_L_O(&iFmt->iFmt_MIMG);
7743  } // decode_OP_MIMG__IMAGE_SAMPLE_C_L_O
7744 
7745  GPUStaticInst*
7747  {
7748  return new Inst_MIMG__IMAGE_SAMPLE_C_B_O(&iFmt->iFmt_MIMG);
7749  } // decode_OP_MIMG__IMAGE_SAMPLE_C_B_O
7750 
7751  GPUStaticInst*
7753  {
7754  return new Inst_MIMG__IMAGE_SAMPLE_C_B_CL_O(&iFmt->iFmt_MIMG);
7755  } // decode_OP_MIMG__IMAGE_SAMPLE_C_B_CL_O
7756 
7757  GPUStaticInst*
7759  {
7760  return new Inst_MIMG__IMAGE_SAMPLE_C_LZ_O(&iFmt->iFmt_MIMG);
7761  } // decode_OP_MIMG__IMAGE_SAMPLE_C_LZ_O
7762 
7763  GPUStaticInst*
7765  {
7766  return new Inst_MIMG__IMAGE_GATHER4(&iFmt->iFmt_MIMG);
7767  } // decode_OP_MIMG__IMAGE_GATHER4
7768 
7769  GPUStaticInst*
7771  {
7772  return new Inst_MIMG__IMAGE_GATHER4_CL(&iFmt->iFmt_MIMG);
7773  } // decode_OP_MIMG__IMAGE_GATHER4_CL
7774 
7775  GPUStaticInst*
7777  {
7778  return new Inst_MIMG__IMAGE_GATHER4_L(&iFmt->iFmt_MIMG);
7779  } // decode_OP_MIMG__IMAGE_GATHER4_L
7780 
7781  GPUStaticInst*
7783  {
7784  return new Inst_MIMG__IMAGE_GATHER4_B(&iFmt->iFmt_MIMG);
7785  } // decode_OP_MIMG__IMAGE_GATHER4_B
7786 
7787  GPUStaticInst*
7789  {
7790  return new Inst_MIMG__IMAGE_GATHER4_B_CL(&iFmt->iFmt_MIMG);
7791  } // decode_OP_MIMG__IMAGE_GATHER4_B_CL
7792 
7793  GPUStaticInst*
7795  {
7796  return new Inst_MIMG__IMAGE_GATHER4_LZ(&iFmt->iFmt_MIMG);
7797  } // decode_OP_MIMG__IMAGE_GATHER4_LZ
7798 
7799  GPUStaticInst*
7801  {
7802  return new Inst_MIMG__IMAGE_GATHER4_C(&iFmt->iFmt_MIMG);
7803  } // decode_OP_MIMG__IMAGE_GATHER4_C
7804 
7805  GPUStaticInst*
7807  {
7808  return new Inst_MIMG__IMAGE_GATHER4_C_CL(&iFmt->iFmt_MIMG);
7809  } // decode_OP_MIMG__IMAGE_GATHER4_C_CL
7810 
7811  GPUStaticInst*
7813  {
7814  return new Inst_MIMG__IMAGE_GATHER4_C_L(&iFmt->iFmt_MIMG);
7815  } // decode_OP_MIMG__IMAGE_GATHER4_C_L
7816 
7817  GPUStaticInst*
7819  {
7820  return new Inst_MIMG__IMAGE_GATHER4_C_B(&iFmt->iFmt_MIMG);
7821  } // decode_OP_MIMG__IMAGE_GATHER4_C_B
7822 
7823  GPUStaticInst*
7825  {
7826  return new Inst_MIMG__IMAGE_GATHER4_C_B_CL(&iFmt->iFmt_MIMG);
7827  } // decode_OP_MIMG__IMAGE_GATHER4_C_B_CL
7828 
7829  GPUStaticInst*
7831  {
7832  return new Inst_MIMG__IMAGE_GATHER4_C_LZ(&iFmt->iFmt_MIMG);
7833  } // decode_OP_MIMG__IMAGE_GATHER4_C_LZ
7834 
7835  GPUStaticInst*
7837  {
7838  return new Inst_MIMG__IMAGE_GATHER4_O(&iFmt->iFmt_MIMG);
7839  } // decode_OP_MIMG__IMAGE_GATHER4_O
7840 
7841  GPUStaticInst*
7843  {
7844  return new Inst_MIMG__IMAGE_GATHER4_CL_O(&iFmt->iFmt_MIMG);
7845  } // decode_OP_MIMG__IMAGE_GATHER4_CL_O
7846 
7847  GPUStaticInst*
7849  {
7850  return new Inst_MIMG__IMAGE_GATHER4_L_O(&iFmt->iFmt_MIMG);
7851  } // decode_OP_MIMG__IMAGE_GATHER4_L_O
7852 
7853  GPUStaticInst*
7855  {
7856  return new Inst_MIMG__IMAGE_GATHER4_B_O(&iFmt->iFmt_MIMG);
7857  } // decode_OP_MIMG__IMAGE_GATHER4_B_O
7858 
7859  GPUStaticInst*
7861  {
7862  return new Inst_MIMG__IMAGE_GATHER4_B_CL_O(&iFmt->iFmt_MIMG);
7863  } // decode_OP_MIMG__IMAGE_GATHER4_B_CL_O
7864 
7865  GPUStaticInst*
7867  {
7868  return new Inst_MIMG__IMAGE_GATHER4_LZ_O(&iFmt->iFmt_MIMG);
7869  } // decode_OP_MIMG__IMAGE_GATHER4_LZ_O
7870 
7871  GPUStaticInst*
7873  {
7874  return new Inst_MIMG__IMAGE_GATHER4_C_O(&iFmt->iFmt_MIMG);
7875  } // decode_OP_MIMG__IMAGE_GATHER4_C_O
7876 
7877  GPUStaticInst*
7879  {
7880  return new Inst_MIMG__IMAGE_GATHER4_C_CL_O(&iFmt->iFmt_MIMG);
7881  } // decode_OP_MIMG__IMAGE_GATHER4_C_CL_O
7882 
7883  GPUStaticInst*
7885  {
7886  return new Inst_MIMG__IMAGE_GATHER4_C_L_O(&iFmt->iFmt_MIMG);
7887  } // decode_OP_MIMG__IMAGE_GATHER4_C_L_O
7888 
7889  GPUStaticInst*
7891  {
7892  return new Inst_MIMG__IMAGE_GATHER4_C_B_O(&iFmt->iFmt_MIMG);
7893  } // decode_OP_MIMG__IMAGE_GATHER4_C_B_O
7894 
7895  GPUStaticInst*
7897  {
7898  return new Inst_MIMG__IMAGE_GATHER4_C_B_CL_O(&iFmt->iFmt_MIMG);
7899  } // decode_OP_MIMG__IMAGE_GATHER4_C_B_CL_O
7900 
7901  GPUStaticInst*
7903  {
7904  return new Inst_MIMG__IMAGE_GATHER4_C_LZ_O(&iFmt->iFmt_MIMG);
7905  } // decode_OP_MIMG__IMAGE_GATHER4_C_LZ_O
7906 
7907  GPUStaticInst*
7909  {
7910  return new Inst_MIMG__IMAGE_GET_LOD(&iFmt->iFmt_MIMG);
7911  } // decode_OP_MIMG__IMAGE_GET_LOD
7912 
7913  GPUStaticInst*
7915  {
7916  return new Inst_MIMG__IMAGE_SAMPLE_CD(&iFmt->iFmt_MIMG);
7917  } // decode_OP_MIMG__IMAGE_SAMPLE_CD
7918 
7919  GPUStaticInst*
7921  {
7922  return new Inst_MIMG__IMAGE_SAMPLE_CD_CL(&iFmt->iFmt_MIMG);
7923  } // decode_OP_MIMG__IMAGE_SAMPLE_CD_CL
7924 
7925  GPUStaticInst*
7927  {
7928  return new Inst_MIMG__IMAGE_SAMPLE_C_CD(&iFmt->iFmt_MIMG);
7929  } // decode_OP_MIMG__IMAGE_SAMPLE_C_CD
7930 
7931  GPUStaticInst*
7933  {
7934  return new Inst_MIMG__IMAGE_SAMPLE_C_CD_CL(&iFmt->iFmt_MIMG);
7935  } // decode_OP_MIMG__IMAGE_SAMPLE_C_CD_CL
7936 
7937  GPUStaticInst*
7939  {
7940  return new Inst_MIMG__IMAGE_SAMPLE_CD_O(&iFmt->iFmt_MIMG);
7941  } // decode_OP_MIMG__IMAGE_SAMPLE_CD_O
7942 
7943  GPUStaticInst*
7945  {
7946  return new Inst_MIMG__IMAGE_SAMPLE_CD_CL_O(&iFmt->iFmt_MIMG);
7947  } // decode_OP_MIMG__IMAGE_SAMPLE_CD_CL_O
7948 
7949  GPUStaticInst*
7951  {
7952  return new Inst_MIMG__IMAGE_SAMPLE_C_CD_O(&iFmt->iFmt_MIMG);
7953  } // decode_OP_MIMG__IMAGE_SAMPLE_C_CD_O
7954 
7955  GPUStaticInst*
7957  {
7958  return new Inst_MIMG__IMAGE_SAMPLE_C_CD_CL_O(&iFmt->iFmt_MIMG);
7959  } // decode_OP_MIMG__IMAGE_SAMPLE_C_CD_CL_O
7960 
7961  GPUStaticInst*
7963  {
7964  return new Inst_MTBUF__TBUFFER_LOAD_FORMAT_X(&iFmt->iFmt_MTBUF);
7965  } // decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_X
7966 
7967  GPUStaticInst*
7969  {
7971  } // decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_XY
7972 
7973  GPUStaticInst*
7975  {
7977  } // decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_XYZ
7978 
7979  GPUStaticInst*
7981  {
7983  } // decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_XYZW
7984 
7985  GPUStaticInst*
7987  {
7989  } // decode_OP_MTBUF__TBUFFER_STORE_FORMAT_X
7990 
7991  GPUStaticInst*
7993  {
7995  } // decode_OP_MTBUF__TBUFFER_STORE_FORMAT_XY
7996 
7997  GPUStaticInst*
7999  {
8001  } // decode_OP_MTBUF__TBUFFER_STORE_FORMAT_XYZ
8002 
8003  GPUStaticInst*
8005  {
8007  } // decode_OP_MTBUF__TBUFFER_STORE_FORMAT_XYZW
8008 
8009  GPUStaticInst*
8011  {
8013  } // decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_D16_X
8014 
8015  GPUStaticInst*
8017  {
8019  } // decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_D16_XY
8020 
8021  GPUStaticInst*
8023  {
8025  } // decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_D16_XYZ
8026 
8027  GPUStaticInst*
8029  {
8031  } // decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_D16_XYZW
8032 
8033  GPUStaticInst*
8035  {
8037  } // decode_OP_MTBUF__TBUFFER_STORE_FORMAT_D16_X
8038 
8039  GPUStaticInst*
8041  {
8043  } // decode_OP_MTBUF__TBUFFER_STORE_FORMAT_D16_XY
8044 
8045  GPUStaticInst*
8047  {
8049  } // decode_OP_MTBUF__TBUFFER_STORE_FORMAT_D16_XYZ
8050 
8051  GPUStaticInst*
8053  {
8054  return new
8056  } // decode_OP_MTBUF__TBUFFER_STORE_FORMAT_D16_XYZW
8057 
8058  GPUStaticInst*
8060  {
8061  return new Inst_MUBUF__BUFFER_LOAD_FORMAT_X(&iFmt->iFmt_MUBUF);
8062  } // decode_OP_MUBUF__BUFFER_LOAD_FORMAT_X
8063 
8064  GPUStaticInst*
8066  {
8067  return new Inst_MUBUF__BUFFER_LOAD_FORMAT_XY(&iFmt->iFmt_MUBUF);
8068  } // decode_OP_MUBUF__BUFFER_LOAD_FORMAT_XY
8069 
8070  GPUStaticInst*
8072  {
8074  } // decode_OP_MUBUF__BUFFER_LOAD_FORMAT_XYZ
8075 
8076  GPUStaticInst*
8078  {
8080  } // decode_OP_MUBUF__BUFFER_LOAD_FORMAT_XYZW
8081 
8082  GPUStaticInst*
8084  {
8085  return new Inst_MUBUF__BUFFER_STORE_FORMAT_X(&iFmt->iFmt_MUBUF);
8086  } // decode_OP_MUBUF__BUFFER_STORE_FORMAT_X
8087 
8088  GPUStaticInst*
8090  {
8092  } // decode_OP_MUBUF__BUFFER_STORE_FORMAT_XY
8093 
8094  GPUStaticInst*
8096  {
8098  } // decode_OP_MUBUF__BUFFER_STORE_FORMAT_XYZ
8099 
8100  GPUStaticInst*
8102  {
8104  } // decode_OP_MUBUF__BUFFER_STORE_FORMAT_XYZW
8105 
8106  GPUStaticInst*
8108  {
8110  } // decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_X
8111 
8112  GPUStaticInst*
8114  {
8116  } // decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_XY
8117 
8118  GPUStaticInst*
8120  {
8122  } // decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_XYZ
8123 
8124  GPUStaticInst*
8126  {
8128  } // decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_XYZW
8129 
8130  GPUStaticInst*
8132  {
8134  } // decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_X
8135 
8136  GPUStaticInst*
8138  {
8140  } // decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_XY
8141 
8142  GPUStaticInst*
8144  {
8146  } // decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_XYZ
8147 
8148  GPUStaticInst*
8150  {
8152  } // decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_XYZW
8153 
8154  GPUStaticInst*
8156  {
8157  return new Inst_MUBUF__BUFFER_LOAD_UBYTE(&iFmt->iFmt_MUBUF);
8158  } // decode_OP_MUBUF__BUFFER_LOAD_UBYTE
8159 
8160  GPUStaticInst*
8162  {
8163  return new Inst_MUBUF__BUFFER_LOAD_SBYTE(&iFmt->iFmt_MUBUF);
8164  } // decode_OP_MUBUF__BUFFER_LOAD_SBYTE
8165 
8166  GPUStaticInst*
8168  {
8169  return new Inst_MUBUF__BUFFER_LOAD_USHORT(&iFmt->iFmt_MUBUF);
8170  } // decode_OP_MUBUF__BUFFER_LOAD_USHORT
8171 
8172  GPUStaticInst*
8174  {
8175  return new Inst_MUBUF__BUFFER_LOAD_SSHORT(&iFmt->iFmt_MUBUF);
8176  } // decode_OP_MUBUF__BUFFER_LOAD_SSHORT
8177 
8178  GPUStaticInst*
8180  {
8181  return new Inst_MUBUF__BUFFER_LOAD_DWORD(&iFmt->iFmt_MUBUF);
8182  } // decode_OP_MUBUF__BUFFER_LOAD_DWORD
8183 
8184  GPUStaticInst*
8186  {
8187  return new Inst_MUBUF__BUFFER_LOAD_DWORDX2(&iFmt->iFmt_MUBUF);
8188  } // decode_OP_MUBUF__BUFFER_LOAD_DWORDX2
8189 
8190  GPUStaticInst*
8192  {
8193  return new Inst_MUBUF__BUFFER_LOAD_DWORDX3(&iFmt->iFmt_MUBUF);
8194  } // decode_OP_MUBUF__BUFFER_LOAD_DWORDX3
8195 
8196  GPUStaticInst*
8198  {
8199  return new Inst_MUBUF__BUFFER_LOAD_DWORDX4(&iFmt->iFmt_MUBUF);
8200  } // decode_OP_MUBUF__BUFFER_LOAD_DWORDX4
8201 
8202  GPUStaticInst*
8204  {
8205  return new Inst_MUBUF__BUFFER_STORE_BYTE(&iFmt->iFmt_MUBUF);
8206  } // decode_OP_MUBUF__BUFFER_STORE_BYTE
8207 
8208  GPUStaticInst*
8210  {
8211  return new Inst_MUBUF__BUFFER_STORE_SHORT(&iFmt->iFmt_MUBUF);
8212  } // decode_OP_MUBUF__BUFFER_STORE_SHORT
8213 
8214  GPUStaticInst*
8216  {
8217  return new Inst_MUBUF__BUFFER_STORE_DWORD(&iFmt->iFmt_MUBUF);
8218  } // decode_OP_MUBUF__BUFFER_STORE_DWORD
8219 
8220  GPUStaticInst*
8222  {
8223  return new Inst_MUBUF__BUFFER_STORE_DWORDX2(&iFmt->iFmt_MUBUF);
8224  } // decode_OP_MUBUF__BUFFER_STORE_DWORDX2
8225 
8226  GPUStaticInst*
8228  {
8229  return new Inst_MUBUF__BUFFER_STORE_DWORDX3(&iFmt->iFmt_MUBUF);
8230  } // decode_OP_MUBUF__BUFFER_STORE_DWORDX3
8231 
8232  GPUStaticInst*
8234  {
8235  return new Inst_MUBUF__BUFFER_STORE_DWORDX4(&iFmt->iFmt_MUBUF);
8236  } // decode_OP_MUBUF__BUFFER_STORE_DWORDX4
8237 
8238  GPUStaticInst*
8240  {
8242  } // decode_OP_MUBUF__BUFFER_STORE_LDS_DWORD
8243 
8244  GPUStaticInst*
8246  {
8247  return new Inst_MUBUF__BUFFER_WBINVL1(&iFmt->iFmt_MUBUF);
8248  } // decode_OP_MUBUF__BUFFER_WBINVL1
8249 
8250  GPUStaticInst*
8252  {
8253  return new Inst_MUBUF__BUFFER_WBINVL1_VOL(&iFmt->iFmt_MUBUF);
8254  } // decode_OP_MUBUF__BUFFER_WBINVL1_VOL
8255 
8256  GPUStaticInst*
8258  {
8259  return new Inst_MUBUF__BUFFER_ATOMIC_SWAP(&iFmt->iFmt_MUBUF);
8260  } // decode_OP_MUBUF__BUFFER_ATOMIC_SWAP
8261 
8262  GPUStaticInst*
8264  {
8265  return new Inst_MUBUF__BUFFER_ATOMIC_CMPSWAP(&iFmt->iFmt_MUBUF);
8266  } // decode_OP_MUBUF__BUFFER_ATOMIC_CMPSWAP
8267 
8268  GPUStaticInst*
8270  {
8271  return new Inst_MUBUF__BUFFER_ATOMIC_ADD(&iFmt->iFmt_MUBUF);
8272  } // decode_OP_MUBUF__BUFFER_ATOMIC_ADD
8273 
8274  GPUStaticInst*
8276  {
8277  return new Inst_MUBUF__BUFFER_ATOMIC_SUB(&iFmt->iFmt_MUBUF);
8278  } // decode_OP_MUBUF__BUFFER_ATOMIC_SUB
8279 
8280  GPUStaticInst*
8282  {
8283  return new Inst_MUBUF__BUFFER_ATOMIC_SMIN(&iFmt->iFmt_MUBUF);
8284  } // decode_OP_MUBUF__BUFFER_ATOMIC_SMIN
8285 
8286  GPUStaticInst*
8288  {
8289  return new Inst_MUBUF__BUFFER_ATOMIC_UMIN(&iFmt->iFmt_MUBUF);
8290  } // decode_OP_MUBUF__BUFFER_ATOMIC_UMIN
8291 
8292  GPUStaticInst*
8294  {
8295  return new Inst_MUBUF__BUFFER_ATOMIC_SMAX(&iFmt->iFmt_MUBUF);
8296  } // decode_OP_MUBUF__BUFFER_ATOMIC_SMAX
8297 
8298  GPUStaticInst*
8300  {
8301  return new Inst_MUBUF__BUFFER_ATOMIC_UMAX(&iFmt->iFmt_MUBUF);
8302  } // decode_OP_MUBUF__BUFFER_ATOMIC_UMAX
8303 
8304  GPUStaticInst*
8306  {
8307  return new Inst_MUBUF__BUFFER_ATOMIC_AND(&iFmt->iFmt_MUBUF);
8308  } // decode_OP_MUBUF__BUFFER_ATOMIC_AND
8309 
8310  GPUStaticInst*
8312  {
8313  return new Inst_MUBUF__BUFFER_ATOMIC_OR(&iFmt->iFmt_MUBUF);
8314  } // decode_OP_MUBUF__BUFFER_ATOMIC_OR
8315 
8316  GPUStaticInst*
8318  {
8319  return new Inst_MUBUF__BUFFER_ATOMIC_XOR(&iFmt->iFmt_MUBUF);
8320  } // decode_OP_MUBUF__BUFFER_ATOMIC_XOR
8321 
8322  GPUStaticInst*
8324  {
8325  return new Inst_MUBUF__BUFFER_ATOMIC_INC(&iFmt->iFmt_MUBUF);
8326  } // decode_OP_MUBUF__BUFFER_ATOMIC_INC
8327 
8328  GPUStaticInst*
8330  {
8331  return new Inst_MUBUF__BUFFER_ATOMIC_DEC(&iFmt->iFmt_MUBUF);
8332  } // decode_OP_MUBUF__BUFFER_ATOMIC_DEC
8333 
8334  GPUStaticInst*
8336  {
8337  return new Inst_MUBUF__BUFFER_ATOMIC_SWAP_X2(&iFmt->iFmt_MUBUF);
8338  } // decode_OP_MUBUF__BUFFER_ATOMIC_SWAP_X2
8339 
8340  GPUStaticInst*
8342  {
8344  } // decode_OP_MUBUF__BUFFER_ATOMIC_CMPSWAP_X2
8345 
8346  GPUStaticInst*
8348  {
8349  return new Inst_MUBUF__BUFFER_ATOMIC_ADD_X2(&iFmt->iFmt_MUBUF);
8350  } // decode_OP_MUBUF__BUFFER_ATOMIC_ADD_X2
8351 
8352  GPUStaticInst*
8354  {
8355  return new Inst_MUBUF__BUFFER_ATOMIC_SUB_X2(&iFmt->iFmt_MUBUF);
8356  } // decode_OP_MUBUF__BUFFER_ATOMIC_SUB_X2
8357 
8358  GPUStaticInst*
8360  {
8361  return new Inst_MUBUF__BUFFER_ATOMIC_SMIN_X2(&iFmt->iFmt_MUBUF);
8362  } // decode_OP_MUBUF__BUFFER_ATOMIC_SMIN_X2
8363 
8364  GPUStaticInst*
8366  {
8367  return new Inst_MUBUF__BUFFER_ATOMIC_UMIN_X2(&iFmt->iFmt_MUBUF);
8368  } // decode_OP_MUBUF__BUFFER_ATOMIC_UMIN_X2
8369 
8370  GPUStaticInst*
8372  {
8373  return new Inst_MUBUF__BUFFER_ATOMIC_SMAX_X2(&iFmt->iFmt_MUBUF);
8374  } // decode_OP_MUBUF__BUFFER_ATOMIC_SMAX_X2
8375 
8376  GPUStaticInst*
8378  {
8379  return new Inst_MUBUF__BUFFER_ATOMIC_UMAX_X2(&iFmt->iFmt_MUBUF);
8380  } // decode_OP_MUBUF__BUFFER_ATOMIC_UMAX_X2
8381 
8382  GPUStaticInst*
8384  {
8385  return new Inst_MUBUF__BUFFER_ATOMIC_AND_X2(&iFmt->iFmt_MUBUF);
8386  } // decode_OP_MUBUF__BUFFER_ATOMIC_AND_X2
8387 
8388  GPUStaticInst*
8390  {
8391  return new Inst_MUBUF__BUFFER_ATOMIC_OR_X2(&iFmt->iFmt_MUBUF);
8392  } // decode_OP_MUBUF__BUFFER_ATOMIC_OR_X2
8393 
8394  GPUStaticInst*
8396  {
8397  return new Inst_MUBUF__BUFFER_ATOMIC_XOR_X2(&iFmt->iFmt_MUBUF);
8398  } // decode_OP_MUBUF__BUFFER_ATOMIC_XOR_X2
8399 
8400  GPUStaticInst*
8402  {
8403  return new Inst_MUBUF__BUFFER_ATOMIC_INC_X2(&iFmt->iFmt_MUBUF);
8404  } // decode_OP_MUBUF__BUFFER_ATOMIC_INC_X2
8405 
8406  GPUStaticInst*
8408  {
8409  return new Inst_MUBUF__BUFFER_ATOMIC_DEC_X2(&iFmt->iFmt_MUBUF);
8410  } // decode_OP_MUBUF__BUFFER_ATOMIC_DEC_X2
8411 
8412  GPUStaticInst*
8414  {
8415  return new Inst_SMEM__S_LOAD_DWORD(&iFmt->iFmt_SMEM);
8416  } // decode_OP_SMEM__S_LOAD_DWORD
8417 
8418  GPUStaticInst*
8420  {
8421  return new Inst_SMEM__S_LOAD_DWORDX2(&iFmt->iFmt_SMEM);
8422  } // decode_OP_SMEM__S_LOAD_DWORDX2
8423 
8424  GPUStaticInst*
8426  {
8427  return new Inst_SMEM__S_LOAD_DWORDX4(&iFmt->iFmt_SMEM);
8428  } // decode_OP_SMEM__S_LOAD_DWORDX4
8429 
8430  GPUStaticInst*
8432  {
8433  return new Inst_SMEM__S_LOAD_DWORDX8(&iFmt->iFmt_SMEM);
8434  } // decode_OP_SMEM__S_LOAD_DWORDX8
8435 
8436  GPUStaticInst*
8438  {
8439  return new Inst_SMEM__S_LOAD_DWORDX16(&iFmt->iFmt_SMEM);
8440  } // decode_OP_SMEM__S_LOAD_DWORDX16
8441 
8442  GPUStaticInst*
8444  {
8445  return new Inst_SMEM__S_BUFFER_LOAD_DWORD(&iFmt->iFmt_SMEM);
8446  } // decode_OP_SMEM__S_BUFFER_LOAD_DWORD
8447 
8448  GPUStaticInst*
8450  {
8451  return new Inst_SMEM__S_BUFFER_LOAD_DWORDX2(&iFmt->iFmt_SMEM);
8452  } // decode_OP_SMEM__S_BUFFER_LOAD_DWORDX2
8453 
8454  GPUStaticInst*
8456  {
8457  return new Inst_SMEM__S_BUFFER_LOAD_DWORDX4(&iFmt->iFmt_SMEM);
8458  } // decode_OP_SMEM__S_BUFFER_LOAD_DWORDX4
8459 
8460  GPUStaticInst*
8462  {
8463  return new Inst_SMEM__S_BUFFER_LOAD_DWORDX8(&iFmt->iFmt_SMEM);
8464  } // decode_OP_SMEM__S_BUFFER_LOAD_DWORDX8
8465 
8466  GPUStaticInst*
8468  {
8469  return new Inst_SMEM__S_BUFFER_LOAD_DWORDX16(&iFmt->iFmt_SMEM);
8470  } // decode_OP_SMEM__S_BUFFER_LOAD_DWORDX16
8471 
8472  GPUStaticInst*
8474  {
8475  return new Inst_SMEM__S_STORE_DWORD(&iFmt->iFmt_SMEM);
8476  } // decode_OP_SMEM__S_STORE_DWORD
8477 
8478  GPUStaticInst*
8480  {
8481  return new Inst_SMEM__S_STORE_DWORDX2(&iFmt->iFmt_SMEM);
8482  } // decode_OP_SMEM__S_STORE_DWORDX2
8483 
8484  GPUStaticInst*
8486  {
8487  return new Inst_SMEM__S_STORE_DWORDX4(&iFmt->iFmt_SMEM);
8488  } // decode_OP_SMEM__S_STORE_DWORDX4
8489 
8490  GPUStaticInst*
8492  {
8493  return new Inst_SMEM__S_BUFFER_STORE_DWORD(&iFmt->iFmt_SMEM);
8494  } // decode_OP_SMEM__S_BUFFER_STORE_DWORD
8495 
8496  GPUStaticInst*
8498  {
8499  return new Inst_SMEM__S_BUFFER_STORE_DWORDX2(&iFmt->iFmt_SMEM);
8500  } // decode_OP_SMEM__S_BUFFER_STORE_DWORDX2
8501 
8502  GPUStaticInst*
8504  {
8505  return new Inst_SMEM__S_BUFFER_STORE_DWORDX4(&iFmt->iFmt_SMEM);
8506  } // decode_OP_SMEM__S_BUFFER_STORE_DWORDX4
8507 
8508  GPUStaticInst*
8510  {
8511  return new Inst_SMEM__S_DCACHE_INV(&iFmt->iFmt_SMEM);
8512  } // decode_OP_SMEM__S_DCACHE_INV
8513 
8514  GPUStaticInst*
8516  {
8517  return new Inst_SMEM__S_DCACHE_WB(&iFmt->iFmt_SMEM);
8518  } // decode_OP_SMEM__S_DCACHE_WB
8519 
8520  GPUStaticInst*
8522  {
8523  return new Inst_SMEM__S_DCACHE_INV_VOL(&iFmt->iFmt_SMEM);
8524  } // decode_OP_SMEM__S_DCACHE_INV_VOL
8525 
8526  GPUStaticInst*
8528  {
8529  return new Inst_SMEM__S_DCACHE_WB_VOL(&iFmt->iFmt_SMEM);
8530  } // decode_OP_SMEM__S_DCACHE_WB_VOL
8531 
8532  GPUStaticInst*
8534  {
8535  return new Inst_SMEM__S_MEMTIME(&iFmt->iFmt_SMEM);
8536  } // decode_OP_SMEM__S_MEMTIME
8537 
8538  GPUStaticInst*
8540  {
8541  return new Inst_SMEM__S_MEMREALTIME(&iFmt->iFmt_SMEM);
8542  } // decode_OP_SMEM__S_MEMREALTIME
8543 
8544  GPUStaticInst*
8546  {
8547  return new Inst_SMEM__S_ATC_PROBE(&iFmt->iFmt_SMEM);
8548  } // decode_OP_SMEM__S_ATC_PROBE
8549 
8550  GPUStaticInst*
8552  {
8553  return new Inst_SMEM__S_ATC_PROBE_BUFFER(&iFmt->iFmt_SMEM);
8554  } // decode_OP_SMEM__S_ATC_PROBE_BUFFER
8555 
8556  GPUStaticInst*
8558  {
8559  return new Inst_SOP1__S_MOV_B32(&iFmt->iFmt_SOP1);
8560  } // decode_OP_SOP1__S_MOV_B32
8561 
8562  GPUStaticInst*
8564  {
8565  return new Inst_SOP1__S_MOV_B64(&iFmt->iFmt_SOP1);
8566  } // decode_OP_SOP1__S_MOV_B64
8567 
8568  GPUStaticInst*
8570  {
8571  return new Inst_SOP1__S_CMOV_B32(&iFmt->iFmt_SOP1);
8572  } // decode_OP_SOP1__S_CMOV_B32
8573 
8574  GPUStaticInst*
8576  {
8577  return new Inst_SOP1__S_CMOV_B64(&iFmt->iFmt_SOP1);
8578  } // decode_OP_SOP1__S_CMOV_B64
8579 
8580  GPUStaticInst*
8582  {
8583  return new Inst_SOP1__S_NOT_B32(&iFmt->iFmt_SOP1);
8584  } // decode_OP_SOP1__S_NOT_B32
8585 
8586  GPUStaticInst*
8588  {
8589  return new Inst_SOP1__S_NOT_B64(&iFmt->iFmt_SOP1);
8590  } // decode_OP_SOP1__S_NOT_B64
8591 
8592  GPUStaticInst*
8594  {
8595  return new Inst_SOP1__S_WQM_B32(&iFmt->iFmt_SOP1);
8596  } // decode_OP_SOP1__S_WQM_B32
8597 
8598  GPUStaticInst*
8600  {
8601  return new Inst_SOP1__S_WQM_B64(&iFmt->iFmt_SOP1);
8602  } // decode_OP_SOP1__S_WQM_B64
8603 
8604  GPUStaticInst*
8606  {
8607  return new Inst_SOP1__S_BREV_B32(&iFmt->iFmt_SOP1);
8608  } // decode_OP_SOP1__S_BREV_B32
8609 
8610  GPUStaticInst*
8612  {
8613  return new Inst_SOP1__S_BREV_B64(&iFmt->iFmt_SOP1);
8614  } // decode_OP_SOP1__S_BREV_B64
8615 
8616  GPUStaticInst*
8618  {
8619  return new Inst_SOP1__S_BCNT0_I32_B32(&iFmt->iFmt_SOP1);
8620  } // decode_OP_SOP1__S_BCNT0_I32_B32
8621 
8622  GPUStaticInst*
8624  {
8625  return new Inst_SOP1__S_BCNT0_I32_B64(&iFmt->iFmt_SOP1);
8626  } // decode_OP_SOP1__S_BCNT0_I32_B64
8627 
8628  GPUStaticInst*
8630  {
8631  return new Inst_SOP1__S_BCNT1_I32_B32(&iFmt->iFmt_SOP1);
8632  } // decode_OP_SOP1__S_BCNT1_I32_B32
8633 
8634  GPUStaticInst*
8636  {
8637  return new Inst_SOP1__S_BCNT1_I32_B64(&iFmt->iFmt_SOP1);
8638  } // decode_OP_SOP1__S_BCNT1_I32_B64
8639 
8640  GPUStaticInst*
8642  {
8643  return new Inst_SOP1__S_FF0_I32_B32(&iFmt->iFmt_SOP1);
8644  } // decode_OP_SOP1__S_FF0_I32_B32
8645 
8646  GPUStaticInst*
8648  {
8649  return new Inst_SOP1__S_FF0_I32_B64(&iFmt->iFmt_SOP1);
8650  } // decode_OP_SOP1__S_FF0_I32_B64
8651 
8652  GPUStaticInst*
8654  {
8655  return new Inst_SOP1__S_FF1_I32_B32(&iFmt->iFmt_SOP1);
8656  } // decode_OP_SOP1__S_FF1_I32_B32
8657 
8658  GPUStaticInst*
8660  {
8661  return new Inst_SOP1__S_FF1_I32_B64(&iFmt->iFmt_SOP1);
8662  } // decode_OP_SOP1__S_FF1_I32_B64
8663 
8664  GPUStaticInst*
8666  {
8667  return new Inst_SOP1__S_FLBIT_I32_B32(&iFmt->iFmt_SOP1);
8668  } // decode_OP_SOP1__S_FLBIT_I32_B32
8669 
8670  GPUStaticInst*
8672  {
8673  return new Inst_SOP1__S_FLBIT_I32_B64(&iFmt->iFmt_SOP1);
8674  } // decode_OP_SOP1__S_FLBIT_I32_B64
8675 
8676  GPUStaticInst*
8678  {
8679  return new Inst_SOP1__S_FLBIT_I32(&iFmt->iFmt_SOP1);
8680  } // decode_OP_SOP1__S_FLBIT_I32
8681 
8682  GPUStaticInst*
8684  {
8685  return new Inst_SOP1__S_FLBIT_I32_I64(&iFmt->iFmt_SOP1);
8686  } // decode_OP_SOP1__S_FLBIT_I32_I64
8687 
8688  GPUStaticInst*
8690  {
8691  return new Inst_SOP1__S_SEXT_I32_I8(&iFmt->iFmt_SOP1);
8692  } // decode_OP_SOP1__S_SEXT_I32_I8
8693 
8694  GPUStaticInst*
8696  {
8697  return new Inst_SOP1__S_SEXT_I32_I16(&iFmt->iFmt_SOP1);
8698  } // decode_OP_SOP1__S_SEXT_I32_I16
8699 
8700  GPUStaticInst*
8702  {
8703  return new Inst_SOP1__S_BITSET0_B32(&iFmt->iFmt_SOP1);
8704  } // decode_OP_SOP1__S_BITSET0_B32
8705 
8706  GPUStaticInst*
8708  {
8709  return new Inst_SOP1__S_BITSET0_B64(&iFmt->iFmt_SOP1);
8710  } // decode_OP_SOP1__S_BITSET0_B64
8711 
8712  GPUStaticInst*
8714  {
8715  return new Inst_SOP1__S_BITSET1_B32(&iFmt->iFmt_SOP1);
8716  } // decode_OP_SOP1__S_BITSET1_B32
8717 
8718  GPUStaticInst*
8720  {
8721  return new Inst_SOP1__S_BITSET1_B64(&iFmt->iFmt_SOP1);
8722  } // decode_OP_SOP1__S_BITSET1_B64
8723 
8724  GPUStaticInst*
8726  {
8727  return new Inst_SOP1__S_GETPC_B64(&iFmt->iFmt_SOP1);
8728  } // decode_OP_SOP1__S_GETPC_B64
8729 
8730  GPUStaticInst*
8732  {
8733  return new Inst_SOP1__S_SETPC_B64(&iFmt->iFmt_SOP1);
8734  } // decode_OP_SOP1__S_SETPC_B64
8735 
8736  GPUStaticInst*
8738  {
8739  return new Inst_SOP1__S_SWAPPC_B64(&iFmt->iFmt_SOP1);
8740  } // decode_OP_SOP1__S_SWAPPC_B64
8741 
8742  GPUStaticInst*
8744  {
8745  return new Inst_SOP1__S_RFE_B64(&iFmt->iFmt_SOP1);
8746  } // decode_OP_SOP1__S_RFE_B64
8747 
8748  GPUStaticInst*
8750  {
8751  return new Inst_SOP1__S_AND_SAVEEXEC_B64(&iFmt->iFmt_SOP1);
8752  } // decode_OP_SOP1__S_AND_SAVEEXEC_B64
8753 
8754  GPUStaticInst*
8756  {
8757  return new Inst_SOP1__S_OR_SAVEEXEC_B64(&iFmt->iFmt_SOP1);
8758  } // decode_OP_SOP1__S_OR_SAVEEXEC_B64
8759 
8760  GPUStaticInst*
8762  {
8763  return new Inst_SOP1__S_XOR_SAVEEXEC_B64(&iFmt->iFmt_SOP1);
8764  } // decode_OP_SOP1__S_XOR_SAVEEXEC_B64
8765 
8766  GPUStaticInst*
8768  {
8769  return new Inst_SOP1__S_ANDN2_SAVEEXEC_B64(&iFmt->iFmt_SOP1);
8770  } // decode_OP_SOP1__S_ANDN2_SAVEEXEC_B64
8771 
8772  GPUStaticInst*
8774  {
8775  return new Inst_SOP1__S_ORN2_SAVEEXEC_B64(&iFmt->iFmt_SOP1);
8776  } // decode_OP_SOP1__S_ORN2_SAVEEXEC_B64
8777 
8778  GPUStaticInst*
8780  {
8781  return new Inst_SOP1__S_NAND_SAVEEXEC_B64(&iFmt->iFmt_SOP1);
8782  } // decode_OP_SOP1__S_NAND_SAVEEXEC_B64
8783 
8784  GPUStaticInst*
8786  {
8787  return new Inst_SOP1__S_NOR_SAVEEXEC_B64(&iFmt->iFmt_SOP1);
8788  } // decode_OP_SOP1__S_NOR_SAVEEXEC_B64
8789 
8790  GPUStaticInst*
8792  {
8793  return new Inst_SOP1__S_XNOR_SAVEEXEC_B64(&iFmt->iFmt_SOP1);
8794  } // decode_OP_SOP1__S_XNOR_SAVEEXEC_B64
8795 
8796  GPUStaticInst*
8798  {
8799  return new Inst_SOP1__S_QUADMASK_B32(&iFmt->iFmt_SOP1);
8800  } // decode_OP_SOP1__S_QUADMASK_B32
8801 
8802  GPUStaticInst*
8804  {
8805  return new Inst_SOP1__S_QUADMASK_B64(&iFmt->iFmt_SOP1);
8806  } // decode_OP_SOP1__S_QUADMASK_B64
8807 
8808  GPUStaticInst*
8810  {
8811  return new Inst_SOP1__S_MOVRELS_B32(&iFmt->iFmt_SOP1);
8812  } // decode_OP_SOP1__S_MOVRELS_B32
8813 
8814  GPUStaticInst*
8816  {
8817  return new Inst_SOP1__S_MOVRELS_B64(&iFmt->iFmt_SOP1);
8818  } // decode_OP_SOP1__S_MOVRELS_B64
8819 
8820  GPUStaticInst*
8822  {
8823  return new Inst_SOP1__S_MOVRELD_B32(&iFmt->iFmt_SOP1);
8824  } // decode_OP_SOP1__S_MOVRELD_B32
8825 
8826  GPUStaticInst*
8828  {
8829  return new Inst_SOP1__S_MOVRELD_B64(&iFmt->iFmt_SOP1);
8830  } // decode_OP_SOP1__S_MOVRELD_B64
8831 
8832  GPUStaticInst*
8834  {
8835  return new Inst_SOP1__S_CBRANCH_JOIN(&iFmt->iFmt_SOP1);
8836  } // decode_OP_SOP1__S_CBRANCH_JOIN
8837 
8838  GPUStaticInst*
8840  {
8841  return new Inst_SOP1__S_ABS_I32(&iFmt->iFmt_SOP1);
8842  } // decode_OP_SOP1__S_ABS_I32
8843 
8844  GPUStaticInst*
8846  {
8847  return new Inst_SOP1__S_MOV_FED_B32(&iFmt->iFmt_SOP1);
8848  } // decode_OP_SOP1__S_MOV_FED_B32
8849 
8850  GPUStaticInst*
8852  {
8853  return new Inst_SOP1__S_SET_GPR_IDX_IDX(&iFmt->iFmt_SOP1);
8854  } // decode_OP_SOP1__S_SET_GPR_IDX_IDX
8855 
8856  GPUStaticInst*
8858  {
8859  return new Inst_SOPC__S_CMP_EQ_I32(&iFmt->iFmt_SOPC);
8860  } // decode_OP_SOPC__S_CMP_EQ_I32
8861 
8862  GPUStaticInst*
8864  {
8865  return new Inst_SOPC__S_CMP_LG_I32(&iFmt->iFmt_SOPC);
8866  } // decode_OP_SOPC__S_CMP_LG_I32
8867 
8868  GPUStaticInst*
8870  {
8871  return new Inst_SOPC__S_CMP_GT_I32(&iFmt->iFmt_SOPC);
8872  } // decode_OP_SOPC__S_CMP_GT_I32
8873 
8874  GPUStaticInst*
8876  {
8877  return new Inst_SOPC__S_CMP_GE_I32(&iFmt->iFmt_SOPC);
8878  } // decode_OP_SOPC__S_CMP_GE_I32
8879 
8880  GPUStaticInst*
8882  {
8883  return new Inst_SOPC__S_CMP_LT_I32(&iFmt->iFmt_SOPC);
8884  } // decode_OP_SOPC__S_CMP_LT_I32
8885 
8886  GPUStaticInst*
8888  {
8889  return new Inst_SOPC__S_CMP_LE_I32(&iFmt->iFmt_SOPC);
8890  } // decode_OP_SOPC__S_CMP_LE_I32
8891 
8892  GPUStaticInst*
8894  {
8895  return new Inst_SOPC__S_CMP_EQ_U32(&iFmt->iFmt_SOPC);
8896  } // decode_OP_SOPC__S_CMP_EQ_U32
8897 
8898  GPUStaticInst*
8900  {
8901  return new Inst_SOPC__S_CMP_LG_U32(&iFmt->iFmt_SOPC);
8902  } // decode_OP_SOPC__S_CMP_LG_U32
8903 
8904  GPUStaticInst*
8906  {
8907  return new Inst_SOPC__S_CMP_GT_U32(&iFmt->iFmt_SOPC);
8908  } // decode_OP_SOPC__S_CMP_GT_U32
8909 
8910  GPUStaticInst*
8912  {
8913  return new Inst_SOPC__S_CMP_GE_U32(&iFmt->iFmt_SOPC);
8914  } // decode_OP_SOPC__S_CMP_GE_U32
8915 
8916  GPUStaticInst*
8918  {
8919  return new Inst_SOPC__S_CMP_LT_U32(&iFmt->iFmt_SOPC);
8920  } // decode_OP_SOPC__S_CMP_LT_U32
8921 
8922  GPUStaticInst*
8924  {
8925  return new Inst_SOPC__S_CMP_LE_U32(&iFmt->iFmt_SOPC);
8926  } // decode_OP_SOPC__S_CMP_LE_U32
8927 
8928  GPUStaticInst*
8930  {
8931  return new Inst_SOPC__S_BITCMP0_B32(&iFmt->iFmt_SOPC);
8932  } // decode_OP_SOPC__S_BITCMP0_B32
8933 
8934  GPUStaticInst*
8936  {
8937  return new Inst_SOPC__S_BITCMP1_B32(&iFmt->iFmt_SOPC);
8938  } // decode_OP_SOPC__S_BITCMP1_B32
8939 
8940  GPUStaticInst*
8942  {
8943  return new Inst_SOPC__S_BITCMP0_B64(&iFmt->iFmt_SOPC);
8944  } // decode_OP_SOPC__S_BITCMP0_B64
8945 
8946  GPUStaticInst*
8948  {
8949  return new Inst_SOPC__S_BITCMP1_B64(&iFmt->iFmt_SOPC);
8950  } // decode_OP_SOPC__S_BITCMP1_B64
8951 
8952  GPUStaticInst*
8954  {
8955  return new Inst_SOPC__S_SETVSKIP(&iFmt->iFmt_SOPC);
8956  } // decode_OP_SOPC__S_SETVSKIP
8957 
8958  GPUStaticInst*
8960  {
8961  return new Inst_SOPC__S_SET_GPR_IDX_ON(&iFmt->iFmt_SOPC);
8962  } // decode_OP_SOPC__S_SET_GPR_IDX_ON
8963 
8964  GPUStaticInst*
8966  {
8967  return new Inst_SOPC__S_CMP_EQ_U64(&iFmt->iFmt_SOPC);
8968  } // decode_OP_SOPC__S_CMP_EQ_U64
8969 
8970  GPUStaticInst*
8972  {
8973  return new Inst_SOPC__S_CMP_LG_U64(&iFmt->iFmt_SOPC);
8974  } // decode_OP_SOPC__S_CMP_LG_U64
8975 
8976  GPUStaticInst*
8978  {
8979  return new Inst_SOPP__S_NOP(&iFmt->iFmt_SOPP);
8980  } // decode_OP_SOPP__S_NOP
8981 
8982  GPUStaticInst*
8984  {
8985  return new Inst_SOPP__S_ENDPGM(&iFmt->iFmt_SOPP);
8986  } // decode_OP_SOPP__S_ENDPGM
8987 
8988  GPUStaticInst*
8990  {
8991  return new Inst_SOPP__S_BRANCH(&iFmt->iFmt_SOPP);
8992  } // decode_OP_SOPP__S_BRANCH
8993 
8994  GPUStaticInst*
8996  {
8997  return new Inst_SOPP__S_WAKEUP(&iFmt->iFmt_SOPP);
8998  } // decode_OP_SOPP__S_WAKEUP
8999 
9000  GPUStaticInst*
9002  {
9003  return new Inst_SOPP__S_CBRANCH_SCC0(&iFmt->iFmt_SOPP);
9004  } // decode_OP_SOPP__S_CBRANCH_SCC0
9005 
9006  GPUStaticInst*
9008  {
9009  return new Inst_SOPP__S_CBRANCH_SCC1(&iFmt->iFmt_SOPP);
9010  } // decode_OP_SOPP__S_CBRANCH_SCC1
9011 
9012  GPUStaticInst*
9014  {
9015  return new Inst_SOPP__S_CBRANCH_VCCZ(&iFmt->iFmt_SOPP);
9016  } // decode_OP_SOPP__S_CBRANCH_VCCZ
9017 
9018  GPUStaticInst*
9020  {
9021  return new Inst_SOPP__S_CBRANCH_VCCNZ(&iFmt->iFmt_SOPP);
9022  } // decode_OP_SOPP__S_CBRANCH_VCCNZ
9023 
9024  GPUStaticInst*
9026  {
9027  return new Inst_SOPP__S_CBRANCH_EXECZ(&iFmt->iFmt_SOPP);
9028  } // decode_OP_SOPP__S_CBRANCH_EXECZ
9029 
9030  GPUStaticInst*
9032  {
9033  return new Inst_SOPP__S_CBRANCH_EXECNZ(&iFmt->iFmt_SOPP);
9034  } // decode_OP_SOPP__S_CBRANCH_EXECNZ
9035 
9036  GPUStaticInst*
9038  {
9039  return new Inst_SOPP__S_BARRIER(&iFmt->iFmt_SOPP);
9040  } // decode_OP_SOPP__S_BARRIER
9041 
9042  GPUStaticInst*
9044  {
9045  return new Inst_SOPP__S_SETKILL(&iFmt->iFmt_SOPP);
9046  } // decode_OP_SOPP__S_SETKILL
9047 
9048  GPUStaticInst*
9050  {
9051  return new Inst_SOPP__S_WAITCNT(&iFmt->iFmt_SOPP);
9052  } // decode_OP_SOPP__S_WAITCNT
9053 
9054  GPUStaticInst*
9056  {
9057  return new Inst_SOPP__S_SETHALT(&iFmt->iFmt_SOPP);
9058  } // decode_OP_SOPP__S_SETHALT
9059 
9060  GPUStaticInst*
9062  {
9063  return new Inst_SOPP__S_SLEEP(&iFmt->iFmt_SOPP);
9064  } // decode_OP_SOPP__S_SLEEP
9065 
9066  GPUStaticInst*
9068  {
9069  return new Inst_SOPP__S_SETPRIO(&iFmt->iFmt_SOPP);
9070  } // decode_OP_SOPP__S_SETPRIO
9071 
9072  GPUStaticInst*
9074  {
9075  return new Inst_SOPP__S_SENDMSG(&iFmt->iFmt_SOPP);
9076  } // decode_OP_SOPP__S_SENDMSG
9077 
9078  GPUStaticInst*
9080  {
9081  return new Inst_SOPP__S_SENDMSGHALT(&iFmt->iFmt_SOPP);
9082  } // decode_OP_SOPP__S_SENDMSGHALT
9083 
9084  GPUStaticInst*
9086  {
9087  return new Inst_SOPP__S_TRAP(&iFmt->iFmt_SOPP);
9088  } // decode_OP_SOPP__S_TRAP
9089 
9090  GPUStaticInst*
9092  {
9093  return new Inst_SOPP__S_ICACHE_INV(&iFmt->iFmt_SOPP);
9094  } // decode_OP_SOPP__S_ICACHE_INV
9095 
9096  GPUStaticInst*
9098  {
9099  return new Inst_SOPP__S_INCPERFLEVEL(&iFmt->iFmt_SOPP);
9100  } // decode_OP_SOPP__S_INCPERFLEVEL
9101 
9102  GPUStaticInst*
9104  {
9105  return new Inst_SOPP__S_DECPERFLEVEL(&iFmt->iFmt_SOPP);
9106  } // decode_OP_SOPP__S_DECPERFLEVEL
9107 
9108  GPUStaticInst*
9110  {
9111  return new Inst_SOPP__S_TTRACEDATA(&iFmt->iFmt_SOPP);
9112  } // decode_OP_SOPP__S_TTRACEDATA
9113 
9114  GPUStaticInst*
9116  {
9117  return new Inst_SOPP__S_CBRANCH_CDBGSYS(&iFmt->iFmt_SOPP);
9118  } // decode_OP_SOPP__S_CBRANCH_CDBGSYS
9119 
9120  GPUStaticInst*
9122  {
9123  return new Inst_SOPP__S_CBRANCH_CDBGUSER(&iFmt->iFmt_SOPP);
9124  } // decode_OP_SOPP__S_CBRANCH_CDBGUSER
9125 
9126  GPUStaticInst*
9128  {
9130  } // decode_OP_SOPP__S_CBRANCH_CDBGSYS_OR_USER
9131 
9132  GPUStaticInst*
9134  {
9136  } // decode_OP_SOPP__S_CBRANCH_CDBGSYS_AND_USER
9137 
9138  GPUStaticInst*
9140  {
9141  return new Inst_SOPP__S_ENDPGM_SAVED(&iFmt->iFmt_SOPP);
9142  } // decode_OP_SOPP__S_ENDPGM_SAVED
9143 
9144  GPUStaticInst*
9146  {
9147  return new Inst_SOPP__S_SET_GPR_IDX_OFF(&iFmt->iFmt_SOPP);
9148  } // decode_OP_SOPP__S_SET_GPR_IDX_OFF
9149 
9150  GPUStaticInst*
9152  {
9153  return new Inst_SOPP__S_SET_GPR_IDX_MODE(&iFmt->iFmt_SOPP);
9154  } // decode_OP_SOPP__S_SET_GPR_IDX_MODE
9155 
9156  GPUStaticInst*
9158  {
9159  return new Inst_VINTRP__V_INTERP_P1_F32(&iFmt->iFmt_VINTRP);
9160  } // decode_OP_VINTRP__V_INTERP_P1_F32
9161 
9162  GPUStaticInst*
9164  {
9165  return new Inst_VINTRP__V_INTERP_P2_F32(&iFmt->iFmt_VINTRP);
9166  } // decode_OP_VINTRP__V_INTERP_P2_F32
9167 
9168  GPUStaticInst*
9170  {
9171  return new Inst_VINTRP__V_INTERP_MOV_F32(&iFmt->iFmt_VINTRP);
9172  } // decode_OP_VINTRP__V_INTERP_MOV_F32
9173 
9174  GPUStaticInst*
9176  {
9177  return new Inst_VOP1__V_NOP(&iFmt->iFmt_VOP1);
9178  } // decode_OP_VOP1__V_NOP
9179 
9180  GPUStaticInst*
9182  {
9183  return new Inst_VOP1__V_MOV_B32(&iFmt->iFmt_VOP1);
9184  } // decode_OP_VOP1__V_MOV_B32
9185 
9186  GPUStaticInst*
9188  {
9189  return new Inst_VOP1__V_READFIRSTLANE_B32(&iFmt->iFmt_VOP1);
9190  } // decode_OP_VOP1__V_READFIRSTLANE_B32
9191 
9192  GPUStaticInst*
9194  {
9195  return new Inst_VOP1__V_CVT_I32_F64(&iFmt->iFmt_VOP1);
9196  } // decode_OP_VOP1__V_CVT_I32_F64
9197 
9198  GPUStaticInst*
9200  {
9201  return new Inst_VOP1__V_CVT_F64_I32(&iFmt->iFmt_VOP1);
9202  } // decode_OP_VOP1__V_CVT_F64_I32
9203 
9204  GPUStaticInst*
9206  {
9207  return new Inst_VOP1__V_CVT_F32_I32(&iFmt->iFmt_VOP1);
9208  } // decode_OP_VOP1__V_CVT_F32_I32
9209 
9210  GPUStaticInst*
9212  {
9213  return new Inst_VOP1__V_CVT_F32_U32(&iFmt->iFmt_VOP1);
9214  } // decode_OP_VOP1__V_CVT_F32_U32
9215 
9216  GPUStaticInst*
9218  {
9219  return new Inst_VOP1__V_CVT_U32_F32(&iFmt->iFmt_VOP1);
9220  } // decode_OP_VOP1__V_CVT_U32_F32
9221 
9222  GPUStaticInst*
9224  {
9225  return new Inst_VOP1__V_CVT_I32_F32(&iFmt->iFmt_VOP1);
9226  } // decode_OP_VOP1__V_CVT_I32_F32
9227 
9228  GPUStaticInst*
9230  {
9231  return new Inst_VOP1__V_MOV_FED_B32(&iFmt->iFmt_VOP1);
9232  } // decode_OP_VOP1__V_MOV_FED_B32
9233 
9234  GPUStaticInst*
9236  {
9237  return new Inst_VOP1__V_CVT_F16_F32(&iFmt->iFmt_VOP1);
9238  } // decode_OP_VOP1__V_CVT_F16_F32
9239 
9240  GPUStaticInst*
9242  {
9243  return new Inst_VOP1__V_CVT_F32_F16(&iFmt->iFmt_VOP1);
9244  } // decode_OP_VOP1__V_CVT_F32_F16
9245 
9246  GPUStaticInst*
9248  {
9249  return new Inst_VOP1__V_CVT_RPI_I32_F32(&iFmt->iFmt_VOP1);
9250  } // decode_OP_VOP1__V_CVT_RPI_I32_F32
9251 
9252  GPUStaticInst*
9254  {
9255  return new Inst_VOP1__V_CVT_FLR_I32_F32(&iFmt->iFmt_VOP1);
9256  } // decode_OP_VOP1__V_CVT_FLR_I32_F32
9257 
9258  GPUStaticInst*
9260  {
9261  return new Inst_VOP1__V_CVT_OFF_F32_I4(&iFmt->iFmt_VOP1);
9262  } // decode_OP_VOP1__V_CVT_OFF_F32_I4
9263 
9264  GPUStaticInst*
9266  {
9267  return new Inst_VOP1__V_CVT_F32_F64(&iFmt->iFmt_VOP1);
9268  } // decode_OP_VOP1__V_CVT_F32_F64
9269 
9270  GPUStaticInst*
9272  {
9273  return new Inst_VOP1__V_CVT_F64_F32(&iFmt->iFmt_VOP1);
9274  } // decode_OP_VOP1__V_CVT_F64_F32
9275 
9276  GPUStaticInst*
9278  {
9279  return new Inst_VOP1__V_CVT_F32_UBYTE0(&iFmt->iFmt_VOP1);
9280  } // decode_OP_VOP1__V_CVT_F32_UBYTE0
9281 
9282  GPUStaticInst*
9284  {
9285  return new Inst_VOP1__V_CVT_F32_UBYTE1(&iFmt->iFmt_VOP1);
9286  } // decode_OP_VOP1__V_CVT_F32_UBYTE1
9287 
9288  GPUStaticInst*
9290  {
9291  return new Inst_VOP1__V_CVT_F32_UBYTE2(&iFmt->iFmt_VOP1);
9292  } // decode_OP_VOP1__V_CVT_F32_UBYTE2
9293 
9294  GPUStaticInst*
9296  {
9297  return new Inst_VOP1__V_CVT_F32_UBYTE3(&iFmt->iFmt_VOP1);
9298  } // decode_OP_VOP1__V_CVT_F32_UBYTE3
9299 
9300  GPUStaticInst*
9302  {
9303  return new Inst_VOP1__V_CVT_U32_F64(&iFmt->iFmt_VOP1);
9304  } // decode_OP_VOP1__V_CVT_U32_F64
9305 
9306  GPUStaticInst*
9308  {
9309  return new Inst_VOP1__V_CVT_F64_U32(&iFmt->iFmt_VOP1);
9310  } // decode_OP_VOP1__V_CVT_F64_U32
9311 
9312  GPUStaticInst*
9314  {
9315  return new Inst_VOP1__V_TRUNC_F64(&iFmt->iFmt_VOP1);
9316  } // decode_OP_VOP1__V_TRUNC_F64
9317 
9318  GPUStaticInst*
9320  {
9321  return new Inst_VOP1__V_CEIL_F64(&iFmt->iFmt_VOP1);
9322  } // decode_OP_VOP1__V_CEIL_F64
9323 
9324  GPUStaticInst*
9326  {
9327  return new Inst_VOP1__V_RNDNE_F64(&iFmt->iFmt_VOP1);
9328  } // decode_OP_VOP1__V_RNDNE_F64
9329 
9330  GPUStaticInst*
9332  {
9333  return new Inst_VOP1__V_FLOOR_F64(&iFmt->iFmt_VOP1);
9334  } // decode_OP_VOP1__V_FLOOR_F64
9335 
9336  GPUStaticInst*
9338  {
9339  return new Inst_VOP1__V_FRACT_F32(&iFmt->iFmt_VOP1);
9340  } // decode_OP_VOP1__V_FRACT_F32
9341 
9342  GPUStaticInst*
9344  {
9345  return new Inst_VOP1__V_TRUNC_F32(&iFmt->iFmt_VOP1);
9346  } // decode_OP_VOP1__V_TRUNC_F32
9347 
9348  GPUStaticInst*
9350  {
9351  return new Inst_VOP1__V_CEIL_F32(&iFmt->iFmt_VOP1);
9352  } // decode_OP_VOP1__V_CEIL_F32
9353 
9354  GPUStaticInst*
9356  {
9357  return new Inst_VOP1__V_RNDNE_F32(&iFmt->iFmt_VOP1);
9358  } // decode_OP_VOP1__V_RNDNE_F32
9359 
9360  GPUStaticInst*
9362  {
9363  return new Inst_VOP1__V_FLOOR_F32(&iFmt->iFmt_VOP1);
9364  } // decode_OP_VOP1__V_FLOOR_F32
9365 
9366  GPUStaticInst*
9368  {
9369  return new Inst_VOP1__V_EXP_F32(&iFmt->iFmt_VOP1);
9370  } // decode_OP_VOP1__V_EXP_F32
9371 
9372  GPUStaticInst*
9374  {
9375  return new Inst_VOP1__V_LOG_F32(&iFmt->iFmt_VOP1);
9376  } // decode_OP_VOP1__V_LOG_F32
9377 
9378  GPUStaticInst*
9380  {
9381  return new Inst_VOP1__V_RCP_F32(&iFmt->iFmt_VOP1);
9382  } // decode_OP_VOP1__V_RCP_F32
9383 
9384  GPUStaticInst*
9386  {
9387  return new Inst_VOP1__V_RCP_IFLAG_F32(&iFmt->iFmt_VOP1);
9388  } // decode_OP_VOP1__V_RCP_IFLAG_F32
9389 
9390  GPUStaticInst*
9392  {
9393  return new Inst_VOP1__V_RSQ_F32(&iFmt->iFmt_VOP1);
9394  } // decode_OP_VOP1__V_RSQ_F32
9395 
9396  GPUStaticInst*
9398  {
9399  return new Inst_VOP1__V_RCP_F64(&iFmt->iFmt_VOP1);
9400  } // decode_OP_VOP1__V_RCP_F64
9401 
9402  GPUStaticInst*
9404  {
9405  return new Inst_VOP1__V_RSQ_F64(&iFmt->iFmt_VOP1);
9406  } // decode_OP_VOP1__V_RSQ_F64
9407 
9408  GPUStaticInst*
9410  {
9411  return new Inst_VOP1__V_SQRT_F32(&iFmt->iFmt_VOP1);
9412  } // decode_OP_VOP1__V_SQRT_F32
9413 
9414  GPUStaticInst*
9416  {
9417  return new Inst_VOP1__V_SQRT_F64(&iFmt->iFmt_VOP1);
9418  } // decode_OP_VOP1__V_SQRT_F64
9419 
9420  GPUStaticInst*
9422  {
9423  return new Inst_VOP1__V_SIN_F32(&iFmt->iFmt_VOP1);
9424  } // decode_OP_VOP1__V_SIN_F32
9425 
9426  GPUStaticInst*
9428  {
9429  return new Inst_VOP1__V_COS_F32(&iFmt->iFmt_VOP1);
9430  } // decode_OP_VOP1__V_COS_F32
9431 
9432  GPUStaticInst*
9434  {
9435  return new Inst_VOP1__V_NOT_B32(&iFmt->iFmt_VOP1);
9436  } // decode_OP_VOP1__V_NOT_B32
9437 
9438  GPUStaticInst*
9440  {
9441  return new Inst_VOP1__V_BFREV_B32(&iFmt->iFmt_VOP1);
9442  } // decode_OP_VOP1__V_BFREV_B32
9443 
9444  GPUStaticInst*
9446  {
9447  return new Inst_VOP1__V_FFBH_U32(&iFmt->iFmt_VOP1);
9448  } // decode_OP_VOP1__V_FFBH_U32
9449 
9450  GPUStaticInst*
9452  {
9453  return new Inst_VOP1__V_FFBL_B32(&iFmt->iFmt_VOP1);
9454  } // decode_OP_VOP1__V_FFBL_B32
9455 
9456  GPUStaticInst*
9458  {
9459  return new Inst_VOP1__V_FFBH_I32(&iFmt->iFmt_VOP1);
9460  } // decode_OP_VOP1__V_FFBH_I32
9461 
9462  GPUStaticInst*
9464  {
9465  return new Inst_VOP1__V_FREXP_EXP_I32_F64(&iFmt->iFmt_VOP1);
9466  } // decode_OP_VOP1__V_FREXP_EXP_I32_F64
9467 
9468  GPUStaticInst*
9470  {
9471  return new Inst_VOP1__V_FREXP_MANT_F64(&iFmt->iFmt_VOP1);
9472  } // decode_OP_VOP1__V_FREXP_MANT_F64
9473 
9474  GPUStaticInst*
9476  {
9477  return new Inst_VOP1__V_FRACT_F64(&iFmt->iFmt_VOP1);
9478  } // decode_OP_VOP1__V_FRACT_F64
9479 
9480  GPUStaticInst*
9482  {
9483  return new Inst_VOP1__V_FREXP_EXP_I32_F32(&iFmt->iFmt_VOP1);
9484  } // decode_OP_VOP1__V_FREXP_EXP_I32_F32
9485 
9486  GPUStaticInst*
9488  {
9489  return new Inst_VOP1__V_FREXP_MANT_F32(&iFmt->iFmt_VOP1);
9490  } // decode_OP_VOP1__V_FREXP_MANT_F32
9491 
9492  GPUStaticInst*
9494  {
9495  return new Inst_VOP1__V_CLREXCP(&iFmt->iFmt_VOP1);
9496  } // decode_OP_VOP1__V_CLREXCP
9497 
9498  GPUStaticInst*
9500  {
9501  return new Inst_VOP1__V_CVT_F16_U16(&iFmt->iFmt_VOP1);
9502  } // decode_OP_VOP1__V_CVT_F16_U16
9503 
9504  GPUStaticInst*
9506  {
9507  return new Inst_VOP1__V_CVT_F16_I16(&iFmt->iFmt_VOP1);
9508  } // decode_OP_VOP1__V_CVT_F16_I16
9509 
9510  GPUStaticInst*
9512  {
9513  return new Inst_VOP1__V_CVT_U16_F16(&iFmt->iFmt_VOP1);
9514  } // decode_OP_VOP1__V_CVT_U16_F16
9515 
9516  GPUStaticInst*
9518  {
9519  return new Inst_VOP1__V_CVT_I16_F16(&iFmt->iFmt_VOP1);
9520  } // decode_OP_VOP1__V_CVT_I16_F16
9521 
9522  GPUStaticInst*
9524  {
9525  return new Inst_VOP1__V_RCP_F16(&iFmt->iFmt_VOP1);
9526  } // decode_OP_VOP1__V_RCP_F16
9527 
9528  GPUStaticInst*
9530  {
9531  return new Inst_VOP1__V_SQRT_F16(&iFmt->iFmt_VOP1);
9532  } // decode_OP_VOP1__V_SQRT_F16
9533 
9534  GPUStaticInst*
9536  {
9537  return new Inst_VOP1__V_RSQ_F16(&iFmt->iFmt_VOP1);
9538  } // decode_OP_VOP1__V_RSQ_F16
9539 
9540  GPUStaticInst*
9542  {
9543  return new Inst_VOP1__V_LOG_F16(&iFmt->iFmt_VOP1);
9544  } // decode_OP_VOP1__V_LOG_F16
9545 
9546  GPUStaticInst*
9548  {
9549  return new Inst_VOP1__V_EXP_F16(&iFmt->iFmt_VOP1);
9550  } // decode_OP_VOP1__V_EXP_F16
9551 
9552  GPUStaticInst*
9554  {
9555  return new Inst_VOP1__V_FREXP_MANT_F16(&iFmt->iFmt_VOP1);
9556  } // decode_OP_VOP1__V_FREXP_MANT_F16
9557 
9558  GPUStaticInst*
9560  {
9561  return new Inst_VOP1__V_FREXP_EXP_I16_F16(&iFmt->iFmt_VOP1);
9562  } // decode_OP_VOP1__V_FREXP_EXP_I16_F16
9563 
9564  GPUStaticInst*
9566  {
9567  return new Inst_VOP1__V_FLOOR_F16(&iFmt->iFmt_VOP1);
9568  } // decode_OP_VOP1__V_FLOOR_F16
9569 
9570  GPUStaticInst*
9572  {
9573  return new Inst_VOP1__V_CEIL_F16(&iFmt->iFmt_VOP1);
9574  } // decode_OP_VOP1__V_CEIL_F16
9575 
9576  GPUStaticInst*
9578  {
9579  return new Inst_VOP1__V_TRUNC_F16(&iFmt->iFmt_VOP1);
9580  } // decode_OP_VOP1__V_TRUNC_F16
9581 
9582  GPUStaticInst*
9584  {
9585  return new Inst_VOP1__V_RNDNE_F16(&iFmt->iFmt_VOP1);
9586  } // decode_OP_VOP1__V_RNDNE_F16
9587 
9588  GPUStaticInst*
9590  {
9591  return new Inst_VOP1__V_FRACT_F16(&iFmt->iFmt_VOP1);
9592  } // decode_OP_VOP1__V_FRACT_F16
9593 
9594  GPUStaticInst*
9596  {
9597  return new Inst_VOP1__V_SIN_F16(&iFmt->iFmt_VOP1);
9598  } // decode_OP_VOP1__V_SIN_F16
9599 
9600  GPUStaticInst*
9602  {
9603  return new Inst_VOP1__V_COS_F16(&iFmt->iFmt_VOP1);
9604  } // decode_OP_VOP1__V_COS_F16
9605 
9606  GPUStaticInst*
9608  {
9609  return new Inst_VOP1__V_EXP_LEGACY_F32(&iFmt->iFmt_VOP1);
9610  } // decode_OP_VOP1__V_EXP_LEGACY_F32
9611 
9612  GPUStaticInst*
9614  {
9615  return new Inst_VOP1__V_LOG_LEGACY_F32(&iFmt->iFmt_VOP1);
9616  } // decode_OP_VOP1__V_LOG_LEGACY_F32
9617 
9618  GPUStaticInst*
9620  {
9621  return new Inst_VOPC__V_CMP_CLASS_F32(&iFmt->iFmt_VOPC);
9622  } // decode_OP_VOPC__V_CMP_CLASS_F32
9623 
9624  GPUStaticInst*
9626  {
9627  return new Inst_VOPC__V_CMPX_CLASS_F32(&iFmt->iFmt_VOPC);
9628  } // decode_OP_VOPC__V_CMPX_CLASS_F32
9629 
9630  GPUStaticInst*
9632  {
9633  return new Inst_VOPC__V_CMP_CLASS_F64(&iFmt->iFmt_VOPC);
9634  } // decode_OP_VOPC__V_CMP_CLASS_F64
9635 
9636  GPUStaticInst*
9638  {
9639  return new Inst_VOPC__V_CMPX_CLASS_F64(&iFmt->iFmt_VOPC);
9640  } // decode_OP_VOPC__V_CMPX_CLASS_F64
9641 
9642  GPUStaticInst*
9644  {
9645  return new Inst_VOPC__V_CMP_CLASS_F16(&iFmt->iFmt_VOPC);
9646  } // decode_OP_VOPC__V_CMP_CLASS_F16
9647 
9648  GPUStaticInst*
9650  {
9651  return new Inst_VOPC__V_CMPX_CLASS_F16(&iFmt->iFmt_VOPC);
9652  } // decode_OP_VOPC__V_CMPX_CLASS_F16
9653 
9654  GPUStaticInst*
9656  {
9657  return new Inst_VOPC__V_CMP_F_F16(&iFmt->iFmt_VOPC);
9658  } // decode_OP_VOPC__V_CMP_F_F16
9659 
9660  GPUStaticInst*
9662  {
9663  return new Inst_VOPC__V_CMP_LT_F16(&iFmt->iFmt_VOPC);
9664  } // decode_OP_VOPC__V_CMP_LT_F16
9665 
9666  GPUStaticInst*
9668  {
9669  return new Inst_VOPC__V_CMP_EQ_F16(&iFmt->iFmt_VOPC);
9670  } // decode_OP_VOPC__V_CMP_EQ_F16
9671 
9672  GPUStaticInst*
9674  {
9675  return new Inst_VOPC__V_CMP_LE_F16(&iFmt->iFmt_VOPC);
9676  } // decode_OP_VOPC__V_CMP_LE_F16
9677 
9678  GPUStaticInst*
9680  {
9681  return new Inst_VOPC__V_CMP_GT_F16(&iFmt->iFmt_VOPC);
9682  } // decode_OP_VOPC__V_CMP_GT_F16
9683 
9684  GPUStaticInst*
9686  {
9687  return new Inst_VOPC__V_CMP_LG_F16(&iFmt->iFmt_VOPC);
9688  } // decode_OP_VOPC__V_CMP_LG_F16
9689 
9690  GPUStaticInst*
9692  {
9693  return new Inst_VOPC__V_CMP_GE_F16(&iFmt->iFmt_VOPC);
9694  } // decode_OP_VOPC__V_CMP_GE_F16
9695 
9696  GPUStaticInst*
9698  {
9699  return new Inst_VOPC__V_CMP_O_F16(&iFmt->iFmt_VOPC);
9700  } // decode_OP_VOPC__V_CMP_O_F16
9701 
9702  GPUStaticInst*
9704  {
9705  return new Inst_VOPC__V_CMP_U_F16(&iFmt->iFmt_VOPC);
9706  } // decode_OP_VOPC__V_CMP_U_F16
9707 
9708  GPUStaticInst*
9710  {
9711  return new Inst_VOPC__V_CMP_NGE_F16(&iFmt->iFmt_VOPC);
9712  } // decode_OP_VOPC__V_CMP_NGE_F16
9713 
9714  GPUStaticInst*
9716  {
9717  return new Inst_VOPC__V_CMP_NLG_F16(&iFmt->iFmt_VOPC);
9718  } // decode_OP_VOPC__V_CMP_NLG_F16
9719 
9720  GPUStaticInst*
9722  {
9723  return new Inst_VOPC__V_CMP_NGT_F16(&iFmt->iFmt_VOPC);
9724  } // decode_OP_VOPC__V_CMP_NGT_F16
9725 
9726  GPUStaticInst*
9728  {
9729  return new Inst_VOPC__V_CMP_NLE_F16(&iFmt->iFmt_VOPC);
9730  } // decode_OP_VOPC__V_CMP_NLE_F16
9731 
9732  GPUStaticInst*
9734  {
9735  return new Inst_VOPC__V_CMP_NEQ_F16(&iFmt->iFmt_VOPC);
9736  } // decode_OP_VOPC__V_CMP_NEQ_F16
9737 
9738  GPUStaticInst*
9740  {
9741  return new Inst_VOPC__V_CMP_NLT_F16(&iFmt->iFmt_VOPC);
9742  } // decode_OP_VOPC__V_CMP_NLT_F16
9743 
9744  GPUStaticInst*
9746  {
9747  return new Inst_VOPC__V_CMP_TRU_F16(&iFmt->iFmt_VOPC);
9748  } // decode_OP_VOPC__V_CMP_TRU_F16
9749 
9750  GPUStaticInst*
9752  {
9753  return new Inst_VOPC__V_CMPX_F_F16(&iFmt->iFmt_VOPC);
9754  } // decode_OP_VOPC__V_CMPX_F_F16
9755 
9756  GPUStaticInst*
9758  {
9759  return new Inst_VOPC__V_CMPX_LT_F16(&iFmt->iFmt_VOPC);
9760  } // decode_OP_VOPC__V_CMPX_LT_F16
9761 
9762  GPUStaticInst*
9764  {
9765  return new Inst_VOPC__V_CMPX_EQ_F16(&iFmt->iFmt_VOPC);
9766  } // decode_OP_VOPC__V_CMPX_EQ_F16
9767 
9768  GPUStaticInst*
9770  {
9771  return new Inst_VOPC__V_CMPX_LE_F16(&iFmt->iFmt_VOPC);
9772  } // decode_OP_VOPC__V_CMPX_LE_F16
9773 
9774  GPUStaticInst*
9776  {
9777  return new Inst_VOPC__V_CMPX_GT_F16(&iFmt->iFmt_VOPC);
9778  } // decode_OP_VOPC__V_CMPX_GT_F16
9779 
9780  GPUStaticInst*
9782  {
9783  return new Inst_VOPC__V_CMPX_LG_F16(&iFmt->iFmt_VOPC);
9784  } // decode_OP_VOPC__V_CMPX_LG_F16
9785 
9786  GPUStaticInst*
9788  {
9789  return new Inst_VOPC__V_CMPX_GE_F16(&iFmt->iFmt_VOPC);
9790  } // decode_OP_VOPC__V_CMPX_GE_F16
9791 
9792  GPUStaticInst*
9794  {
9795  return new Inst_VOPC__V_CMPX_O_F16(&iFmt->iFmt_VOPC);
9796  } // decode_OP_VOPC__V_CMPX_O_F16
9797 
9798  GPUStaticInst*
9800  {
9801  return new Inst_VOPC__V_CMPX_U_F16(&iFmt->iFmt_VOPC);
9802  } // decode_OP_VOPC__V_CMPX_U_F16
9803 
9804  GPUStaticInst*
9806  {
9807  return new Inst_VOPC__V_CMPX_NGE_F16(&iFmt->iFmt_VOPC);
9808  } // decode_OP_VOPC__V_CMPX_NGE_F16
9809 
9810  GPUStaticInst*
9812  {
9813  return new Inst_VOPC__V_CMPX_NLG_F16(&iFmt->iFmt_VOPC);
9814  } // decode_OP_VOPC__V_CMPX_NLG_F16
9815 
9816  GPUStaticInst*
9818  {
9819  return new Inst_VOPC__V_CMPX_NGT_F16(&iFmt->iFmt_VOPC);
9820  } // decode_OP_VOPC__V_CMPX_NGT_F16
9821 
9822  GPUStaticInst*
9824  {
9825  return new Inst_VOPC__V_CMPX_NLE_F16(&iFmt->iFmt_VOPC);
9826  } // decode_OP_VOPC__V_CMPX_NLE_F16
9827 
9828  GPUStaticInst*
9830  {
9831  return new Inst_VOPC__V_CMPX_NEQ_F16(&iFmt->iFmt_VOPC);
9832  } // decode_OP_VOPC__V_CMPX_NEQ_F16
9833 
9834  GPUStaticInst*
9836  {
9837  return new Inst_VOPC__V_CMPX_NLT_F16(&iFmt->iFmt_VOPC);
9838  } // decode_OP_VOPC__V_CMPX_NLT_F16
9839 
9840  GPUStaticInst*
9842  {
9843  return new Inst_VOPC__V_CMPX_TRU_F16(&iFmt->iFmt_VOPC);
9844  } // decode_OP_VOPC__V_CMPX_TRU_F16
9845 
9846  GPUStaticInst*
9848  {
9849  return new Inst_VOPC__V_CMP_F_F32(&iFmt->iFmt_VOPC);
9850  } // decode_OP_VOPC__V_CMP_F_F32
9851 
9852  GPUStaticInst*
9854  {
9855  return new Inst_VOPC__V_CMP_LT_F32(&iFmt->iFmt_VOPC);
9856  } // decode_OP_VOPC__V_CMP_LT_F32
9857 
9858  GPUStaticInst*
9860  {
9861  return new Inst_VOPC__V_CMP_EQ_F32(&iFmt->iFmt_VOPC);
9862  } // decode_OP_VOPC__V_CMP_EQ_F32
9863 
9864  GPUStaticInst*
9866  {
9867  return new Inst_VOPC__V_CMP_LE_F32(&iFmt->iFmt_VOPC);
9868  } // decode_OP_VOPC__V_CMP_LE_F32
9869 
9870  GPUStaticInst*
9872  {
9873  return new Inst_VOPC__V_CMP_GT_F32(&iFmt->iFmt_VOPC);
9874  } // decode_OP_VOPC__V_CMP_GT_F32
9875 
9876  GPUStaticInst*
9878  {
9879  return new Inst_VOPC__V_CMP_LG_F32(&iFmt->iFmt_VOPC);
9880  } // decode_OP_VOPC__V_CMP_LG_F32
9881 
9882  GPUStaticInst*
9884  {
9885  return new Inst_VOPC__V_CMP_GE_F32(&iFmt->iFmt_VOPC);
9886  } // decode_OP_VOPC__V_CMP_GE_F32
9887 
9888  GPUStaticInst*
9890  {
9891  return new Inst_VOPC__V_CMP_O_F32(&iFmt->iFmt_VOPC);
9892  } // decode_OP_VOPC__V_CMP_O_F32
9893 
9894  GPUStaticInst*
9896  {
9897  return new Inst_VOPC__V_CMP_U_F32(&iFmt->iFmt_VOPC);
9898  } // decode_OP_VOPC__V_CMP_U_F32
9899 
9900  GPUStaticInst*
9902  {
9903  return new Inst_VOPC__V_CMP_NGE_F32(&iFmt->iFmt_VOPC);
9904  } // decode_OP_VOPC__V_CMP_NGE_F32
9905 
9906  GPUStaticInst*
9908  {
9909  return new Inst_VOPC__V_CMP_NLG_F32(&iFmt->iFmt_VOPC);
9910  } // decode_OP_VOPC__V_CMP_NLG_F32
9911 
9912  GPUStaticInst*
9914  {
9915  return new Inst_VOPC__V_CMP_NGT_F32(&iFmt->iFmt_VOPC);
9916  } // decode_OP_VOPC__V_CMP_NGT_F32
9917 
9918  GPUStaticInst*
9920  {
9921  return new Inst_VOPC__V_CMP_NLE_F32(&iFmt->iFmt_VOPC);
9922  } // decode_OP_VOPC__V_CMP_NLE_F32
9923 
9924  GPUStaticInst*
9926  {
9927  return new Inst_VOPC__V_CMP_NEQ_F32(&iFmt->iFmt_VOPC);
9928  } // decode_OP_VOPC__V_CMP_NEQ_F32
9929 
9930  GPUStaticInst*
9932  {
9933  return new Inst_VOPC__V_CMP_NLT_F32(&iFmt->iFmt_VOPC);
9934  } // decode_OP_VOPC__V_CMP_NLT_F32
9935 
9936  GPUStaticInst*
9938  {
9939  return new Inst_VOPC__V_CMP_TRU_F32(&iFmt->iFmt_VOPC);
9940  } // decode_OP_VOPC__V_CMP_TRU_F32
9941 
9942  GPUStaticInst*
9944  {
9945  return new Inst_VOPC__V_CMPX_F_F32(&iFmt->iFmt_VOPC);
9946  } // decode_OP_VOPC__V_CMPX_F_F32
9947 
9948  GPUStaticInst*
9950  {
9951  return new Inst_VOPC__V_CMPX_LT_F32(&iFmt->iFmt_VOPC);
9952  } // decode_OP_VOPC__V_CMPX_LT_F32
9953 
9954  GPUStaticInst*
9956  {
9957  return new Inst_VOPC__V_CMPX_EQ_F32(&iFmt->iFmt_VOPC);
9958  } // decode_OP_VOPC__V_CMPX_EQ_F32
9959 
9960  GPUStaticInst*
9962  {
9963  return new Inst_VOPC__V_CMPX_LE_F32(&iFmt->iFmt_VOPC);
9964  } // decode_OP_VOPC__V_CMPX_LE_F32
9965 
9966  GPUStaticInst*
9968  {
9969  return new Inst_VOPC__V_CMPX_GT_F32(&iFmt->iFmt_VOPC);
9970  } // decode_OP_VOPC__V_CMPX_GT_F32
9971 
9972  GPUStaticInst*
9974  {
9975  return new Inst_VOPC__V_CMPX_LG_F32(&iFmt->iFmt_VOPC);
9976  } // decode_OP_VOPC__V_CMPX_LG_F32
9977 
9978  GPUStaticInst*
9980  {
9981  return new Inst_VOPC__V_CMPX_GE_F32(&iFmt->iFmt_VOPC);
9982  } // decode_OP_VOPC__V_CMPX_GE_F32
9983 
9984  GPUStaticInst*
9986  {
9987  return new Inst_VOPC__V_CMPX_O_F32(&iFmt->iFmt_VOPC);
9988  } // decode_OP_VOPC__V_CMPX_O_F32
9989 
9990  GPUStaticInst*
9992  {
9993  return new Inst_VOPC__V_CMPX_U_F32(&iFmt->iFmt_VOPC);
9994  } // decode_OP_VOPC__V_CMPX_U_F32
9995 
9996  GPUStaticInst*
9998  {
9999  return new Inst_VOPC__V_CMPX_NGE_F32(&iFmt->iFmt_VOPC);
10000  } // decode_OP_VOPC__V_CMPX_NGE_F32
10001 
10002  GPUStaticInst*
10004  {
10005  return new Inst_VOPC__V_CMPX_NLG_F32(&iFmt->iFmt_VOPC);
10006  } // decode_OP_VOPC__V_CMPX_NLG_F32
10007 
10008  GPUStaticInst*
10010  {
10011  return new Inst_VOPC__V_CMPX_NGT_F32(&iFmt->iFmt_VOPC);
10012  } // decode_OP_VOPC__V_CMPX_NGT_F32
10013 
10014  GPUStaticInst*
10016  {
10017  return new Inst_VOPC__V_CMPX_NLE_F32(&iFmt->iFmt_VOPC);
10018  } // decode_OP_VOPC__V_CMPX_NLE_F32
10019 
10020  GPUStaticInst*
10022  {
10023  return new Inst_VOPC__V_CMPX_NEQ_F32(&iFmt->iFmt_VOPC);
10024  } // decode_OP_VOPC__V_CMPX_NEQ_F32
10025 
10026  GPUStaticInst*
10028  {
10029  return new Inst_VOPC__V_CMPX_NLT_F32(&iFmt->iFmt_VOPC);
10030  } // decode_OP_VOPC__V_CMPX_NLT_F32
10031 
10032  GPUStaticInst*
10034  {
10035  return new Inst_VOPC__V_CMPX_TRU_F32(&iFmt->iFmt_VOPC);
10036  } // decode_OP_VOPC__V_CMPX_TRU_F32
10037 
10038  GPUStaticInst*
10040  {
10041  return new Inst_VOPC__V_CMP_F_F64(&iFmt->iFmt_VOPC);
10042  } // decode_OP_VOPC__V_CMP_F_F64
10043 
10044  GPUStaticInst*
10046  {
10047  return new Inst_VOPC__V_CMP_LT_F64(&iFmt->iFmt_VOPC);
10048  } // decode_OP_VOPC__V_CMP_LT_F64
10049 
10050  GPUStaticInst*
10052  {
10053  return new Inst_VOPC__V_CMP_EQ_F64(&iFmt->iFmt_VOPC);
10054  } // decode_OP_VOPC__V_CMP_EQ_F64
10055 
10056  GPUStaticInst*
10058  {
10059  return new Inst_VOPC__V_CMP_LE_F64(&iFmt->iFmt_VOPC);
10060  } // decode_OP_VOPC__V_CMP_LE_F64
10061 
10062  GPUStaticInst*
10064  {
10065  return new Inst_VOPC__V_CMP_GT_F64(&iFmt->iFmt_VOPC);
10066  } // decode_OP_VOPC__V_CMP_GT_F64
10067 
10068  GPUStaticInst*
10070  {
10071  return new Inst_VOPC__V_CMP_LG_F64(&iFmt->iFmt_VOPC);
10072  } // decode_OP_VOPC__V_CMP_LG_F64
10073 
10074  GPUStaticInst*
10076  {
10077  return new Inst_VOPC__V_CMP_GE_F64(&iFmt->iFmt_VOPC);
10078  } // decode_OP_VOPC__V_CMP_GE_F64
10079 
10080  GPUStaticInst*
10082  {
10083  return new Inst_VOPC__V_CMP_O_F64(&iFmt->iFmt_VOPC);
10084  } // decode_OP_VOPC__V_CMP_O_F64
10085 
10086  GPUStaticInst*
10088  {
10089  return new Inst_VOPC__V_CMP_U_F64(&iFmt->iFmt_VOPC);
10090  } // decode_OP_VOPC__V_CMP_U_F64
10091 
10092  GPUStaticInst*
10094  {
10095  return new Inst_VOPC__V_CMP_NGE_F64(&iFmt->iFmt_VOPC);
10096  } // decode_OP_VOPC__V_CMP_NGE_F64
10097 
10098  GPUStaticInst*
10100  {
10101  return new Inst_VOPC__V_CMP_NLG_F64(&iFmt->iFmt_VOPC);
10102  } // decode_OP_VOPC__V_CMP_NLG_F64
10103 
10104  GPUStaticInst*
10106  {
10107  return new Inst_VOPC__V_CMP_NGT_F64(&iFmt->iFmt_VOPC);
10108  } // decode_OP_VOPC__V_CMP_NGT_F64
10109 
10110  GPUStaticInst*
10112  {
10113  return new Inst_VOPC__V_CMP_NLE_F64(&iFmt->iFmt_VOPC);
10114  } // decode_OP_VOPC__V_CMP_NLE_F64
10115 
10116  GPUStaticInst*
10118  {
10119  return new Inst_VOPC__V_CMP_NEQ_F64(&iFmt->iFmt_VOPC);
10120  } // decode_OP_VOPC__V_CMP_NEQ_F64
10121 
10122  GPUStaticInst*
10124  {
10125  return new Inst_VOPC__V_CMP_NLT_F64(&iFmt->iFmt_VOPC);
10126  } // decode_OP_VOPC__V_CMP_NLT_F64
10127 
10128  GPUStaticInst*
10130  {
10131  return new Inst_VOPC__V_CMP_TRU_F64(&iFmt->iFmt_VOPC);
10132  } // decode_OP_VOPC__V_CMP_TRU_F64
10133 
10134  GPUStaticInst*
10136  {
10137  return new Inst_VOPC__V_CMPX_F_F64(&iFmt->iFmt_VOPC);
10138  } // decode_OP_VOPC__V_CMPX_F_F64
10139 
10140  GPUStaticInst*
10142  {
10143  return new Inst_VOPC__V_CMPX_LT_F64(&iFmt->iFmt_VOPC);
10144  } // decode_OP_VOPC__V_CMPX_LT_F64
10145 
10146  GPUStaticInst*
10148  {
10149  return new Inst_VOPC__V_CMPX_EQ_F64(&iFmt->iFmt_VOPC);
10150  } // decode_OP_VOPC__V_CMPX_EQ_F64
10151 
10152  GPUStaticInst*
10154  {
10155  return new Inst_VOPC__V_CMPX_LE_F64(&iFmt->iFmt_VOPC);
10156  } // decode_OP_VOPC__V_CMPX_LE_F64
10157 
10158  GPUStaticInst*
10160  {
10161  return new Inst_VOPC__V_CMPX_GT_F64(&iFmt->iFmt_VOPC);
10162  } // decode_OP_VOPC__V_CMPX_GT_F64
10163 
10164  GPUStaticInst*
10166  {
10167  return new Inst_VOPC__V_CMPX_LG_F64(&iFmt->iFmt_VOPC);
10168  } // decode_OP_VOPC__V_CMPX_LG_F64
10169 
10170  GPUStaticInst*
10172  {
10173  return new Inst_VOPC__V_CMPX_GE_F64(&iFmt->iFmt_VOPC);
10174  } // decode_OP_VOPC__V_CMPX_GE_F64
10175 
10176  GPUStaticInst*
10178  {
10179  return new Inst_VOPC__V_CMPX_O_F64(&iFmt->iFmt_VOPC);
10180  } // decode_OP_VOPC__V_CMPX_O_F64
10181 
10182  GPUStaticInst*
10184  {
10185  return new Inst_VOPC__V_CMPX_U_F64(&iFmt->iFmt_VOPC);
10186  } // decode_OP_VOPC__V_CMPX_U_F64
10187 
10188  GPUStaticInst*
10190  {
10191  return new Inst_VOPC__V_CMPX_NGE_F64(&iFmt->iFmt_VOPC);
10192  } // decode_OP_VOPC__V_CMPX_NGE_F64
10193 
10194  GPUStaticInst*
10196  {
10197  return new Inst_VOPC__V_CMPX_NLG_F64(&iFmt->iFmt_VOPC);
10198  } // decode_OP_VOPC__V_CMPX_NLG_F64
10199 
10200  GPUStaticInst*
10202  {
10203  return new Inst_VOPC__V_CMPX_NGT_F64(&iFmt->iFmt_VOPC);
10204  } // decode_OP_VOPC__V_CMPX_NGT_F64
10205 
10206  GPUStaticInst*
10208  {
10209  return new Inst_VOPC__V_CMPX_NLE_F64(&iFmt->iFmt_VOPC);
10210  } // decode_OP_VOPC__V_CMPX_NLE_F64
10211 
10212  GPUStaticInst*
10214  {
10215  return new Inst_VOPC__V_CMPX_NEQ_F64(&iFmt->iFmt_VOPC);
10216  } // decode_OP_VOPC__V_CMPX_NEQ_F64
10217 
10218  GPUStaticInst*
10220  {
10221  return new Inst_VOPC__V_CMPX_NLT_F64(&iFmt->iFmt_VOPC);
10222  } // decode_OP_VOPC__V_CMPX_NLT_F64
10223 
10224  GPUStaticInst*
10226  {
10227  return new Inst_VOPC__V_CMPX_TRU_F64(&iFmt->iFmt_VOPC);
10228  } // decode_OP_VOPC__V_CMPX_TRU_F64
10229 
10230  GPUStaticInst*
10232  {
10233  return new Inst_VOPC__V_CMP_F_I16(&iFmt->iFmt_VOPC);
10234  } // decode_OP_VOPC__V_CMP_F_I16
10235 
10236  GPUStaticInst*
10238  {
10239  return new Inst_VOPC__V_CMP_LT_I16(&iFmt->iFmt_VOPC);
10240  } // decode_OP_VOPC__V_CMP_LT_I16
10241 
10242  GPUStaticInst*
10244  {
10245  return new Inst_VOPC__V_CMP_EQ_I16(&iFmt->iFmt_VOPC);
10246  } // decode_OP_VOPC__V_CMP_EQ_I16
10247 
10248  GPUStaticInst*
10250  {
10251  return new Inst_VOPC__V_CMP_LE_I16(&iFmt->iFmt_VOPC);
10252  } // decode_OP_VOPC__V_CMP_LE_I16
10253 
10254  GPUStaticInst*
10256  {
10257  return new Inst_VOPC__V_CMP_GT_I16(&iFmt->iFmt_VOPC);
10258  } // decode_OP_VOPC__V_CMP_GT_I16
10259 
10260  GPUStaticInst*
10262  {
10263  return new Inst_VOPC__V_CMP_NE_I16(&iFmt->iFmt_VOPC);
10264  } // decode_OP_VOPC__V_CMP_NE_I16
10265 
10266  GPUStaticInst*
10268  {
10269  return new Inst_VOPC__V_CMP_GE_I16(&iFmt->iFmt_VOPC);
10270  } // decode_OP_VOPC__V_CMP_GE_I16
10271 
10272  GPUStaticInst*
10274  {
10275  return new Inst_VOPC__V_CMP_T_I16(&iFmt->iFmt_VOPC);
10276  } // decode_OP_VOPC__V_CMP_T_I16
10277 
10278  GPUStaticInst*
10280  {
10281  return new Inst_VOPC__V_CMP_F_U16(&iFmt->iFmt_VOPC);
10282  } // decode_OP_VOPC__V_CMP_F_U16
10283 
10284  GPUStaticInst*
10286  {
10287  return new Inst_VOPC__V_CMP_LT_U16(&iFmt->iFmt_VOPC);
10288  } // decode_OP_VOPC__V_CMP_LT_U16
10289 
10290  GPUStaticInst*
10292  {
10293  return new Inst_VOPC__V_CMP_EQ_U16(&iFmt->iFmt_VOPC);
10294  } // decode_OP_VOPC__V_CMP_EQ_U16
10295 
10296  GPUStaticInst*
10298  {
10299  return new Inst_VOPC__V_CMP_LE_U16(&iFmt->iFmt_VOPC);
10300  } // decode_OP_VOPC__V_CMP_LE_U16
10301 
10302  GPUStaticInst*
10304  {
10305  return new Inst_VOPC__V_CMP_GT_U16(&iFmt->iFmt_VOPC);
10306  } // decode_OP_VOPC__V_CMP_GT_U16
10307 
10308  GPUStaticInst*
10310  {
10311  return new Inst_VOPC__V_CMP_NE_U16(&iFmt->iFmt_VOPC);
10312  } // decode_OP_VOPC__V_CMP_NE_U16
10313 
10314  GPUStaticInst*
10316  {
10317  return new Inst_VOPC__V_CMP_GE_U16(&iFmt->iFmt_VOPC);
10318  } // decode_OP_VOPC__V_CMP_GE_U16
10319 
10320  GPUStaticInst*
10322  {
10323  return new Inst_VOPC__V_CMP_T_U16(&iFmt->iFmt_VOPC);
10324  } // decode_OP_VOPC__V_CMP_T_U16
10325 
10326  GPUStaticInst*
10328  {
10329  return new Inst_VOPC__V_CMPX_F_I16(&iFmt->iFmt_VOPC);
10330  } // decode_OP_VOPC__V_CMPX_F_I16
10331 
10332  GPUStaticInst*
10334  {
10335  return new Inst_VOPC__V_CMPX_LT_I16(&iFmt->iFmt_VOPC);
10336  } // decode_OP_VOPC__V_CMPX_LT_I16
10337 
10338  GPUStaticInst*
10340  {
10341  return new Inst_VOPC__V_CMPX_EQ_I16(&iFmt->iFmt_VOPC);
10342  } // decode_OP_VOPC__V_CMPX_EQ_I16
10343 
10344  GPUStaticInst*
10346  {
10347  return new Inst_VOPC__V_CMPX_LE_I16(&iFmt->iFmt_VOPC);
10348  } // decode_OP_VOPC__V_CMPX_LE_I16
10349 
10350  GPUStaticInst*
10352  {
10353  return new Inst_VOPC__V_CMPX_GT_I16(&iFmt->iFmt_VOPC);
10354  } // decode_OP_VOPC__V_CMPX_GT_I16
10355 
10356  GPUStaticInst*
10358  {
10359  return new Inst_VOPC__V_CMPX_NE_I16(&iFmt->iFmt_VOPC);
10360  } // decode_OP_VOPC__V_CMPX_NE_I16
10361 
10362  GPUStaticInst*
10364  {
10365  return new Inst_VOPC__V_CMPX_GE_I16(&iFmt->iFmt_VOPC);
10366  } // decode_OP_VOPC__V_CMPX_GE_I16
10367 
10368  GPUStaticInst*
10370  {
10371  return new Inst_VOPC__V_CMPX_T_I16(&iFmt->iFmt_VOPC);
10372  } // decode_OP_VOPC__V_CMPX_T_I16
10373 
10374  GPUStaticInst*
10376  {
10377  return new Inst_VOPC__V_CMPX_F_U16(&iFmt->iFmt_VOPC);
10378  } // decode_OP_VOPC__V_CMPX_F_U16
10379 
10380  GPUStaticInst*
10382  {
10383  return new Inst_VOPC__V_CMPX_LT_U16(&iFmt->iFmt_VOPC);
10384  } // decode_OP_VOPC__V_CMPX_LT_U16
10385 
10386  GPUStaticInst*
10388  {
10389  return new Inst_VOPC__V_CMPX_EQ_U16(&iFmt->iFmt_VOPC);
10390  } // decode_OP_VOPC__V_CMPX_EQ_U16
10391 
10392  GPUStaticInst*
10394  {
10395  return new Inst_VOPC__V_CMPX_LE_U16(&iFmt->iFmt_VOPC);
10396  } // decode_OP_VOPC__V_CMPX_LE_U16
10397 
10398  GPUStaticInst*
10400  {
10401  return new Inst_VOPC__V_CMPX_GT_U16(&iFmt->iFmt_VOPC);
10402  } // decode_OP_VOPC__V_CMPX_GT_U16
10403 
10404  GPUStaticInst*
10406  {
10407  return new Inst_VOPC__V_CMPX_NE_U16(&iFmt->iFmt_VOPC);
10408  } // decode_OP_VOPC__V_CMPX_NE_U16
10409 
10410  GPUStaticInst*
10412  {
10413  return new Inst_VOPC__V_CMPX_GE_U16(&iFmt->iFmt_VOPC);
10414  } // decode_OP_VOPC__V_CMPX_GE_U16
10415 
10416  GPUStaticInst*
10418  {
10419  return new Inst_VOPC__V_CMPX_T_U16(&iFmt->iFmt_VOPC);
10420  } // decode_OP_VOPC__V_CMPX_T_U16
10421 
10422  GPUStaticInst*
10424  {
10425  return new Inst_VOPC__V_CMP_F_I32(&iFmt->iFmt_VOPC);
10426  } // decode_OP_VOPC__V_CMP_F_I32
10427 
10428  GPUStaticInst*
10430  {
10431  return new Inst_VOPC__V_CMP_LT_I32(&iFmt->iFmt_VOPC);
10432  } // decode_OP_VOPC__V_CMP_LT_I32
10433 
10434  GPUStaticInst*
10436  {
10437  return new Inst_VOPC__V_CMP_EQ_I32(&iFmt->iFmt_VOPC);
10438  } // decode_OP_VOPC__V_CMP_EQ_I32
10439 
10440  GPUStaticInst*
10442  {
10443  return new Inst_VOPC__V_CMP_LE_I32(&iFmt->iFmt_VOPC);
10444  } // decode_OP_VOPC__V_CMP_LE_I32
10445 
10446  GPUStaticInst*
10448  {
10449  return new Inst_VOPC__V_CMP_GT_I32(&iFmt->iFmt_VOPC);
10450  } // decode_OP_VOPC__V_CMP_GT_I32
10451 
10452  GPUStaticInst*
10454  {
10455  return new Inst_VOPC__V_CMP_NE_I32(&iFmt->iFmt_VOPC);
10456  } // decode_OP_VOPC__V_CMP_NE_I32
10457 
10458  GPUStaticInst*
10460  {
10461  return new Inst_VOPC__V_CMP_GE_I32(&iFmt->iFmt_VOPC);
10462  } // decode_OP_VOPC__V_CMP_GE_I32
10463 
10464  GPUStaticInst*
10466  {
10467  return new Inst_VOPC__V_CMP_T_I32(&iFmt->iFmt_VOPC);
10468  } // decode_OP_VOPC__V_CMP_T_I32
10469 
10470  GPUStaticInst*
10472  {
10473  return new Inst_VOPC__V_CMP_F_U32(&iFmt->iFmt_VOPC);
10474  } // decode_OP_VOPC__V_CMP_F_U32
10475 
10476  GPUStaticInst*
10478  {
10479  return new Inst_VOPC__V_CMP_LT_U32(&iFmt->iFmt_VOPC);
10480  } // decode_OP_VOPC__V_CMP_LT_U32
10481 
10482  GPUStaticInst*
10484  {
10485  return new Inst_VOPC__V_CMP_EQ_U32(&iFmt->iFmt_VOPC);
10486  } // decode_OP_VOPC__V_CMP_EQ_U32
10487 
10488  GPUStaticInst*
10490  {
10491  return new Inst_VOPC__V_CMP_LE_U32(&iFmt->iFmt_VOPC);
10492  } // decode_OP_VOPC__V_CMP_LE_U32
10493 
10494  GPUStaticInst*
10496  {
10497  return new Inst_VOPC__V_CMP_GT_U32(&iFmt->iFmt_VOPC);
10498  } // decode_OP_VOPC__V_CMP_GT_U32
10499 
10500  GPUStaticInst*
10502  {
10503  return new Inst_VOPC__V_CMP_NE_U32(&iFmt->iFmt_VOPC);
10504  } // decode_OP_VOPC__V_CMP_NE_U32
10505 
10506  GPUStaticInst*
10508  {
10509  return new Inst_VOPC__V_CMP_GE_U32(&iFmt->iFmt_VOPC);
10510  } // decode_OP_VOPC__V_CMP_GE_U32
10511 
10512  GPUStaticInst*
10514  {
10515  return new Inst_VOPC__V_CMP_T_U32(&iFmt->iFmt_VOPC);
10516  } // decode_OP_VOPC__V_CMP_T_U32
10517 
10518  GPUStaticInst*
10520  {
10521  return new Inst_VOPC__V_CMPX_F_I32(&iFmt->iFmt_VOPC);
10522  } // decode_OP_VOPC__V_CMPX_F_I32
10523 
10524  GPUStaticInst*
10526  {
10527  return new Inst_VOPC__V_CMPX_LT_I32(&iFmt->iFmt_VOPC);
10528  } // decode_OP_VOPC__V_CMPX_LT_I32
10529 
10530  GPUStaticInst*
10532  {
10533  return new Inst_VOPC__V_CMPX_EQ_I32(&iFmt->iFmt_VOPC);
10534  } // decode_OP_VOPC__V_CMPX_EQ_I32
10535 
10536  GPUStaticInst*
10538  {
10539  return new Inst_VOPC__V_CMPX_LE_I32(&iFmt->iFmt_VOPC);
10540  } // decode_OP_VOPC__V_CMPX_LE_I32
10541 
10542  GPUStaticInst*
10544  {
10545  return new Inst_VOPC__V_CMPX_GT_I32(&iFmt->iFmt_VOPC);
10546  } // decode_OP_VOPC__V_CMPX_GT_I32
10547 
10548  GPUStaticInst*
10550  {
10551  return new Inst_VOPC__V_CMPX_NE_I32(&iFmt->iFmt_VOPC);
10552  } // decode_OP_VOPC__V_CMPX_NE_I32
10553 
10554  GPUStaticInst*
10556  {
10557  return new Inst_VOPC__V_CMPX_GE_I32(&iFmt->iFmt_VOPC);
10558  } // decode_OP_VOPC__V_CMPX_GE_I32
10559 
10560  GPUStaticInst*
10562  {
10563  return new Inst_VOPC__V_CMPX_T_I32(&iFmt->iFmt_VOPC);
10564  } // decode_OP_VOPC__V_CMPX_T_I32
10565 
10566  GPUStaticInst*
10568  {
10569  return new Inst_VOPC__V_CMPX_F_U32(&iFmt->iFmt_VOPC);
10570  } // decode_OP_VOPC__V_CMPX_F_U32
10571 
10572  GPUStaticInst*
10574  {
10575  return new Inst_VOPC__V_CMPX_LT_U32(&iFmt->iFmt_VOPC);
10576  } // decode_OP_VOPC__V_CMPX_LT_U32
10577 
10578  GPUStaticInst*
10580  {
10581  return new Inst_VOPC__V_CMPX_EQ_U32(&iFmt->iFmt_VOPC);
10582  } // decode_OP_VOPC__V_CMPX_EQ_U32
10583 
10584  GPUStaticInst*
10586  {
10587  return new Inst_VOPC__V_CMPX_LE_U32(&iFmt->iFmt_VOPC);
10588  } // decode_OP_VOPC__V_CMPX_LE_U32
10589 
10590  GPUStaticInst*
10592  {
10593  return new Inst_VOPC__V_CMPX_GT_U32(&iFmt->iFmt_VOPC);
10594  } // decode_OP_VOPC__V_CMPX_GT_U32
10595 
10596  GPUStaticInst*
10598  {
10599  return new Inst_VOPC__V_CMPX_NE_U32(&iFmt->iFmt_VOPC);
10600  } // decode_OP_VOPC__V_CMPX_NE_U32
10601 
10602  GPUStaticInst*
10604  {
10605  return new Inst_VOPC__V_CMPX_GE_U32(&iFmt->iFmt_VOPC);
10606  } // decode_OP_VOPC__V_CMPX_GE_U32
10607 
10608  GPUStaticInst*
10610  {
10611  return new Inst_VOPC__V_CMPX_T_U32(&iFmt->iFmt_VOPC);
10612  } // decode_OP_VOPC__V_CMPX_T_U32
10613 
10614  GPUStaticInst*
10616  {
10617  return new Inst_VOPC__V_CMP_F_I64(&iFmt->iFmt_VOPC);
10618  } // decode_OP_VOPC__V_CMP_F_I64
10619 
10620  GPUStaticInst*
10622  {
10623  return new Inst_VOPC__V_CMP_LT_I64(&iFmt->iFmt_VOPC);
10624  } // decode_OP_VOPC__V_CMP_LT_I64
10625 
10626  GPUStaticInst*
10628  {
10629  return new Inst_VOPC__V_CMP_EQ_I64(&iFmt->iFmt_VOPC);
10630  } // decode_OP_VOPC__V_CMP_EQ_I64
10631 
10632  GPUStaticInst*
10634  {
10635  return new Inst_VOPC__V_CMP_LE_I64(&iFmt->iFmt_VOPC);
10636  } // decode_OP_VOPC__V_CMP_LE_I64
10637 
10638  GPUStaticInst*
10640  {
10641  return new Inst_VOPC__V_CMP_GT_I64(&iFmt->iFmt_VOPC);
10642  } // decode_OP_VOPC__V_CMP_GT_I64
10643 
10644  GPUStaticInst*
10646  {
10647  return new Inst_VOPC__V_CMP_NE_I64(&iFmt->iFmt_VOPC);
10648  } // decode_OP_VOPC__V_CMP_NE_I64
10649 
10650  GPUStaticInst*
10652  {
10653  return new Inst_VOPC__V_CMP_GE_I64(&iFmt->iFmt_VOPC);
10654  } // decode_OP_VOPC__V_CMP_GE_I64
10655 
10656  GPUStaticInst*
10658  {
10659  return new Inst_VOPC__V_CMP_T_I64(&iFmt->iFmt_VOPC);
10660  } // decode_OP_VOPC__V_CMP_T_I64
10661 
10662  GPUStaticInst*
10664  {
10665  return new Inst_VOPC__V_CMP_F_U64(&iFmt->iFmt_VOPC);
10666  } // decode_OP_VOPC__V_CMP_F_U64
10667 
10668  GPUStaticInst*
10670  {
10671  return new Inst_VOPC__V_CMP_LT_U64(&iFmt->iFmt_VOPC);
10672  } // decode_OP_VOPC__V_CMP_LT_U64
10673 
10674  GPUStaticInst*
10676  {
10677  return new Inst_VOPC__V_CMP_EQ_U64(&iFmt->iFmt_VOPC);
10678  } // decode_OP_VOPC__V_CMP_EQ_U64
10679 
10680  GPUStaticInst*
10682  {
10683  return new Inst_VOPC__V_CMP_LE_U64(&iFmt->iFmt_VOPC);
10684  } // decode_OP_VOPC__V_CMP_LE_U64
10685 
10686  GPUStaticInst*
10688  {
10689  return new Inst_VOPC__V_CMP_GT_U64(&iFmt->iFmt_VOPC);
10690  } // decode_OP_VOPC__V_CMP_GT_U64
10691 
10692  GPUStaticInst*
10694  {
10695  return new Inst_VOPC__V_CMP_NE_U64(&iFmt->iFmt_VOPC);
10696  } // decode_OP_VOPC__V_CMP_NE_U64
10697 
10698  GPUStaticInst*
10700  {
10701  return new Inst_VOPC__V_CMP_GE_U64(&iFmt->iFmt_VOPC);
10702  } // decode_OP_VOPC__V_CMP_GE_U64
10703 
10704  GPUStaticInst*
10706  {
10707  return new Inst_VOPC__V_CMP_T_U64(&iFmt->iFmt_VOPC);
10708  } // decode_OP_VOPC__V_CMP_T_U64
10709 
10710  GPUStaticInst*
10712  {
10713  return new Inst_VOPC__V_CMPX_F_I64(&iFmt->iFmt_VOPC);
10714  } // decode_OP_VOPC__V_CMPX_F_I64
10715 
10716  GPUStaticInst*
10718  {
10719  return new Inst_VOPC__V_CMPX_LT_I64(&iFmt->iFmt_VOPC);
10720  } // decode_OP_VOPC__V_CMPX_LT_I64
10721 
10722  GPUStaticInst*
10724  {
10725  return new Inst_VOPC__V_CMPX_EQ_I64(&iFmt->iFmt_VOPC);
10726  } // decode_OP_VOPC__V_CMPX_EQ_I64
10727 
10728  GPUStaticInst*
10730  {
10731  return new Inst_VOPC__V_CMPX_LE_I64(&iFmt->iFmt_VOPC);
10732  } // decode_OP_VOPC__V_CMPX_LE_I64
10733 
10734  GPUStaticInst*
10736  {
10737  return new Inst_VOPC__V_CMPX_GT_I64(&iFmt->iFmt_VOPC);
10738  } // decode_OP_VOPC__V_CMPX_GT_I64
10739 
10740  GPUStaticInst*
10742  {
10743  return new Inst_VOPC__V_CMPX_NE_I64(&iFmt->iFmt_VOPC);
10744  } // decode_OP_VOPC__V_CMPX_NE_I64
10745 
10746  GPUStaticInst*
10748  {
10749  return new Inst_VOPC__V_CMPX_GE_I64(&iFmt->iFmt_VOPC);
10750  } // decode_OP_VOPC__V_CMPX_GE_I64
10751 
10752  GPUStaticInst*
10754  {
10755  return new Inst_VOPC__V_CMPX_T_I64(&iFmt->iFmt_VOPC);
10756  } // decode_OP_VOPC__V_CMPX_T_I64
10757 
10758  GPUStaticInst*
10760  {
10761  return new Inst_VOPC__V_CMPX_F_U64(&iFmt->iFmt_VOPC);
10762  } // decode_OP_VOPC__V_CMPX_F_U64
10763 
10764  GPUStaticInst*
10766  {
10767  return new Inst_VOPC__V_CMPX_LT_U64(&iFmt->iFmt_VOPC);
10768  } // decode_OP_VOPC__V_CMPX_LT_U64
10769 
10770  GPUStaticInst*
10772  {
10773  return new Inst_VOPC__V_CMPX_EQ_U64(&iFmt->iFmt_VOPC);
10774  } // decode_OP_VOPC__V_CMPX_EQ_U64
10775 
10776  GPUStaticInst*
10778  {
10779  return new Inst_VOPC__V_CMPX_LE_U64(&iFmt->iFmt_VOPC);
10780  } // decode_OP_VOPC__V_CMPX_LE_U64
10781 
10782  GPUStaticInst*
10784  {
10785  return new Inst_VOPC__V_CMPX_GT_U64(&iFmt->iFmt_VOPC);
10786  } // decode_OP_VOPC__V_CMPX_GT_U64
10787 
10788  GPUStaticInst*
10790  {
10791  return new Inst_VOPC__V_CMPX_NE_U64(&iFmt->iFmt_VOPC);
10792  } // decode_OP_VOPC__V_CMPX_NE_U64
10793 
10794  GPUStaticInst*
10796  {
10797  return new Inst_VOPC__V_CMPX_GE_U64(&iFmt->iFmt_VOPC);
10798  } // decode_OP_VOPC__V_CMPX_GE_U64
10799 
10800  GPUStaticInst*
10802  {
10803  return new Inst_VOPC__V_CMPX_T_U64(&iFmt->iFmt_VOPC);
10804  } // decode_OP_VOPC__V_CMPX_T_U64
10805 
10806  GPUStaticInst*
10808  {
10809  fatal("Invalid opcode encountered: %#x\n", iFmt->imm_u32);
10810 
10811  return nullptr;
10812  }
10813 } // namespace Gcn3ISA
10814 } // namespace gem5
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_USHORT(MachInst)
Definition: decoder.cc:8167
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_CD(MachInst)
Definition: decoder.cc:7926
GPUStaticInst * decode_OPU_VOP3__V_DIV_FIXUP_F64(MachInst)
Definition: decoder.cc:6036
GPUStaticInst * decode_OP_DS__DS_INC_RTN_U32(MachInst)
Definition: decoder.cc:6486
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_CD_CL(MachInst)
Definition: decoder.cc:7920
GPUStaticInst * decode_OP_VOP1__V_RCP_F16(MachInst)
Definition: decoder.cc:9523
GPUStaticInst * decode_OP_SOP2__S_MAX_I32(MachInst)
Definition: decoder.cc:3594
GPUStaticInst * decode_OP_VOPC__V_CMPX_LT_I16(MachInst)
Definition: decoder.cc:10333
GPUStaticInst * decode_OPU_VOP3__V_CVT_F64_U32(MachInst)
Definition: decoder.cc:5538
GPUStaticInst * decode_OP_SOP2__S_AND_B64(MachInst)
Definition: decoder.cc:3624
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_SUB(MachInst)
Definition: decoder.cc:7290
GPUStaticInst * decode_OP_VOP2__V_MIN_I32(MachInst)
Definition: decoder.cc:3306
GPUStaticInst * decode_OP_SOPC__S_CMP_GE_U32(MachInst)
Definition: decoder.cc:8911
GPUStaticInst * decode_OP_VOPC__V_CMPX_NLG_F32(MachInst)
Definition: decoder.cc:10003
GPUStaticInst * decode_OP_SOP2__S_MIN_I32(MachInst)
Definition: decoder.cc:3582
GPUStaticInst * decode_OP_SOPC__S_CMP_EQ_U32(MachInst)
Definition: decoder.cc:8893
GPUStaticInst * decode_OP_DS__DS_PERMUTE_B32(MachInst)
Definition: decoder.cc:6648
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_XYZ(MachInst)
Definition: decoder.cc:8143
GPUStaticInst * decode_OPU_VOP3__V_CMPX_O_F64(MachInst)
Definition: decoder.cc:4494
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_SWAP_X2(MachInst)
Definition: decoder.cc:7350
GPUStaticInst * decode_OP_SOP1__S_ANDN2_SAVEEXEC_B64(MachInst)
Definition: decoder.cc:8767
GPUStaticInst * decode_OP_MTBUF__TBUFFER_STORE_FORMAT_XYZW(MachInst)
Definition: decoder.cc:8004
GPUStaticInst * decode_OP_VOPC__V_CMPX_LE_F16(MachInst)
Definition: decoder.cc:9769
GPUStaticInst * decode_OP_VOPC__V_CMP_F_I64(MachInst)
Definition: decoder.cc:10615
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_C_CL_O(MachInst)
Definition: decoder.cc:7878
GPUStaticInst * decode_OPU_VOP3__V_CMPX_T_I32(MachInst)
Definition: decoder.cc:4878
GPUStaticInst * decode_OP_FLAT__FLAT_LOAD_UBYTE(MachInst)
Definition: decoder.cc:7188
GPUStaticInst * decode_OP_DS__DS_OR_SRC2_B32(MachInst)
Definition: decoder.cc:6984
GPUStaticInst * decode_OP_VOPC__V_CMPX_LG_F32(MachInst)
Definition: decoder.cc:9973
GPUStaticInst * decode_OP_VOP1__V_FREXP_MANT_F16(MachInst)
Definition: decoder.cc:9553
GPUStaticInst * decode_OPU_VOP3__V_TRUNC_F32(MachInst)
Definition: decoder.cc:5574
GPUStaticInst * decode_OP_VOP1__V_CVT_OFF_F32_I4(MachInst)
Definition: decoder.cc:9259
GPUStaticInst * decode_OP_SOP2__S_BFM_B32(MachInst)
Definition: decoder.cc:3750
GPUStaticInst * decode_OPU_VOP3__V_ADD_F16(MachInst)
Definition: decoder.cc:5298
GPUStaticInst * decode_OP_VOPC__V_CMP_LE_F16(MachInst)
Definition: decoder.cc:9673
GPUStaticInst * decode_OPU_VOP3__V_MED3_I32(MachInst)
Definition: decoder.cc:5988
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_D_CL_O(MachInst)
Definition: decoder.cc:7686
GPUStaticInst * decode_OP_SOP1__S_RFE_B64(MachInst)
Definition: decoder.cc:8743
GPUStaticInst * decode_OPU_VOP3__V_TRIG_PREOP_F64(MachInst)
Definition: decoder.cc:6282
GPUStaticInst * decode_OP_MTBUF__TBUFFER_STORE_FORMAT_D16_X(MachInst)
Definition: decoder.cc:8034
GPUStaticInst * decode_OPU_VOP3__V_FREXP_MANT_F16(MachInst)
Definition: decoder.cc:5784
GPUStaticInst * decode_OP_VOPC__V_CMP_LT_U16(MachInst)
Definition: decoder.cc:10285
GPUStaticInst * decode_OP_DS__DS_READ_B32(MachInst)
Definition: decoder.cc:6600
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_SBYTE(MachInst)
Definition: decoder.cc:8161
GPUStaticInst * decode_OP_SOP2__S_ORN2_B32(MachInst)
Definition: decoder.cc:3666
GPUStaticInst * decode_OP_DS__DS_MAX_SRC2_U64(MachInst)
Definition: decoder.cc:7122
GPUStaticInst * decode_OP_VOPC__V_CMPX_LT_I32(MachInst)
Definition: decoder.cc:10525
GPUStaticInst * decode_OP_SOPP__S_CBRANCH_EXECZ(MachInst)
Definition: decoder.cc:9025
GPUStaticInst * decode_OPU_VOP3__V_CMPX_EQ_F16(MachInst)
Definition: decoder.cc:4080
GPUStaticInst * decode_OPU_VOP3__V_CMP_T_I16(MachInst)
Definition: decoder.cc:4590
GPUStaticInst * decode_OPU_VOP3__V_SUBBREV_U32(MachInst)
Definition: decoder.cc:5292
GPUStaticInst * decode_OP_FLAT__FLAT_LOAD_DWORDX4(MachInst)
Definition: decoder.cc:7230
GPUStaticInst * decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_D16_XYZ(MachInst)
Definition: decoder.cc:8022
GPUStaticInst * decode_OP_SOPK__S_CMPK_GE_U32(MachInst)
Definition: decoder.cc:3876
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_CD(MachInst)
Definition: decoder.cc:7914
GPUStaticInst * decode_OP_VOPC__V_CMPX_EQ_I16(MachInst)
Definition: decoder.cc:10339
GPUStaticInst * decode_OP_SOPP__S_SENDMSGHALT(MachInst)
Definition: decoder.cc:9079
GPUStaticInst * decode_OP_MTBUF__TBUFFER_STORE_FORMAT_X(MachInst)
Definition: decoder.cc:7986
GPUStaticInst * decode_OPU_VOP3__V_CVT_F16_U16(MachInst)
Definition: decoder.cc:5730
GPUStaticInst * decode_OP_VOP1__V_CVT_F32_UBYTE3(MachInst)
Definition: decoder.cc:9295
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_OR(MachInst)
Definition: decoder.cc:8311
GPUStaticInst * decode_OPU_VOP3__V_BFI_B32(MachInst)
Definition: decoder.cc:5910
GPUStaticInst * decode_OP_VOPC__V_CMP_O_F64(MachInst)
Definition: decoder.cc:10081
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_CL(MachInst)
Definition: decoder.cc:7578
GPUStaticInst * decode_OP_SOPK__S_ADDK_I32(MachInst)
Definition: decoder.cc:3894
GPUStaticInst * decode_OPU_VOP3__V_TRUNC_F16(MachInst)
Definition: decoder.cc:5808
GPUStaticInst * decode_OP_VOPC__V_CMPX_EQ_U16(MachInst)
Definition: decoder.cc:10387
GPUStaticInst * decode_OPU_VOP3__V_LDEXP_F64(MachInst)
Definition: decoder.cc:6204
GPUStaticInst * decode_OP_SOPK__S_CMPK_LG_U32(MachInst)
Definition: decoder.cc:3864
GPUStaticInst * decode_OP_VOPC__V_CMPX_GT_I16(MachInst)
Definition: decoder.cc:10351
GPUStaticInst * decode_OPU_VOP3__V_MBCNT_HI_U32_B32(MachInst)
Definition: decoder.cc:6258
GPUStaticInst * decode_OP_VOP2__V_MIN_F32(MachInst)
Definition: decoder.cc:3294
GPUStaticInst * decode_OPU_VOP3__V_MIN_I16(MachInst)
Definition: decoder.cc:5400
GPUStaticInst * decode_OP_VOPC__V_CMPX_O_F16(MachInst)
Definition: decoder.cc:9793
GPUStaticInst * decode_OP_VOP2__V_ADD_F32(MachInst)
Definition: decoder.cc:3240
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_C(MachInst)
Definition: decoder.cc:7800
GPUStaticInst * decode_OP_VOPC__V_CMPX_F_I32(MachInst)
Definition: decoder.cc:10519
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NGE_F32(MachInst)
Definition: decoder.cc:4314
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GE_I32(MachInst)
Definition: decoder.cc:4872
GPUStaticInst * decode_OP_VOP1__V_CVT_F16_I16(MachInst)
Definition: decoder.cc:9505
GPUStaticInst * decode_OPU_VOP3__V_ADD_F64(MachInst)
Definition: decoder.cc:6180
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_L_O(MachInst)
Definition: decoder.cc:7740
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_AND(MachInst)
Definition: decoder.cc:7320
GPUStaticInst * decode_OP_VOP2__V_ASHRREV_I32(MachInst)
Definition: decoder.cc:3336
GPUStaticInst * decode_OPU_VOP3__V_CMPX_U_F16(MachInst)
Definition: decoder.cc:4116
GPUStaticInst * decode_OP_VOP2__V_MAX_U32(MachInst)
Definition: decoder.cc:3324
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NLT_F32(MachInst)
Definition: decoder.cc:4344
GPUStaticInst * decode_OP_VOPC__V_CMPX_O_F32(MachInst)
Definition: decoder.cc:9985
GPUStaticInst * decode_OPU_VOP3__V_CMPX_F_I32(MachInst)
Definition: decoder.cc:4836
GPUStaticInst * decode_OPU_VOP3__V_CVT_I16_F16(MachInst)
Definition: decoder.cc:5748
GPUStaticInst * decode_OP_SOP2__S_LSHL_B32(MachInst)
Definition: decoder.cc:3714
GPUStaticInst * decode_OP_VOPC__V_CMP_O_F32(MachInst)
Definition: decoder.cc:9889
GPUStaticInst * decode_OPU_VOP3__V_MQSAD_PK_U16_U8(MachInst)
Definition: decoder.cc:6078
GPUStaticInst * decode_OP_DS__DS_READ_U8(MachInst)
Definition: decoder.cc:6624
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_B_O(MachInst)
Definition: decoder.cc:7854
GPUStaticInst * decode_OP_VOP2__V_ADDC_U32(MachInst)
Definition: decoder.cc:3402
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_B_CL_O(MachInst)
Definition: decoder.cc:7860
GPUStaticInst * decode_OP_SOP2__S_XNOR_B64(MachInst)
Definition: decoder.cc:3708
GPUStaticInst * subDecode_OP_MIMG(MachInst)
Definition: decoder.cc:3226
GPUStaticInst * decode_OP_SOP2__S_ANDN2_B32(MachInst)
Definition: decoder.cc:3654
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_CD_CL_O(MachInst)
Definition: decoder.cc:7956
GPUStaticInst * decode_OPU_VOP3__V_CMP_EQ_U32(MachInst)
Definition: decoder.cc:4800
GPUStaticInst * decode_OP_SOP2__S_ABSDIFF_I32(MachInst)
Definition: decoder.cc:3798
GPUStaticInst * decode_OP_DS__DS_RSUB_U32(MachInst)
Definition: decoder.cc:6336
GPUStaticInst * decode_OP_VOPC__V_CMPX_NLG_F16(MachInst)
Definition: decoder.cc:9811
GPUStaticInst * decode_OP_VOP1__V_FLOOR_F32(MachInst)
Definition: decoder.cc:9361
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_AND(MachInst)
Definition: decoder.cc:8305
GPUStaticInst * decode_OP_VOPC__V_CMPX_CLASS_F16(MachInst)
Definition: decoder.cc:9649
GPUStaticInst * decode_OP_SMEM__S_STORE_DWORDX2(MachInst)
Definition: decoder.cc:8479
GPUStaticInst * decode_OP_SOPP__S_CBRANCH_SCC0(MachInst)
Definition: decoder.cc:9001
GPUStaticInst * decode_OP_DS__DS_WRITE2ST64_B32(MachInst)
Definition: decoder.cc:6414
GPUStaticInst * decode_OP_DS__DS_XOR_RTN_B32(MachInst)
Definition: decoder.cc:6534
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GE_U32(MachInst)
Definition: decoder.cc:4920
GPUStaticInst * decode_OPU_VOP3__V_CMP_GT_F32(MachInst)
Definition: decoder.cc:4188
GPUStaticInst * decode_OP_SOPP__S_CBRANCH_CDBGSYS_AND_USER(MachInst)
Definition: decoder.cc:9133
GPUStaticInst * decode_OPU_VOP3__V_ADD_F32(MachInst)
Definition: decoder.cc:5130
GPUStaticInst * decode_OPU_VOP3__V_ALIGNBYTE_B32(MachInst)
Definition: decoder.cc:5940
GPUStaticInst * decode_OP_SMEM__S_DCACHE_WB_VOL(MachInst)
Definition: decoder.cc:8527
GPUStaticInst * decode_OP_VOP1__V_FREXP_MANT_F64(MachInst)
Definition: decoder.cc:9469
GPUStaticInst * decode_OPU_VOP3__V_CMP_NEQ_F32(MachInst)
Definition: decoder.cc:4242
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GE_U64(MachInst)
Definition: decoder.cc:5112
GPUStaticInst * decode_OPU_VOP3__V_CMPX_CLASS_F32(MachInst)
Definition: decoder.cc:3942
GPUStaticInst * decode_OP_DS__DS_MIN_RTN_F32(MachInst)
Definition: decoder.cc:6576
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GT_I64(MachInst)
Definition: decoder.cc:5052
GPUStaticInst * decode_OP_VOPC__V_CMP_EQ_F16(MachInst)
Definition: decoder.cc:9667
GPUStaticInst * decode_OPU_VOP3__V_CMP_EQ_I16(MachInst)
Definition: decoder.cc:4560
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_SWAP(MachInst)
Definition: decoder.cc:8257
GPUStaticInst * decode_OPU_VOP3__V_CMP_LE_F64(MachInst)
Definition: decoder.cc:4374
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GE_U16(MachInst)
Definition: decoder.cc:4728
GPUStaticInst * decode_OPU_VOP3__V_SIN_F32(MachInst)
Definition: decoder.cc:5652
GPUStaticInst * decode_OP_SOPP__S_CBRANCH_SCC1(MachInst)
Definition: decoder.cc:9007
GPUStaticInst * decode_OP_DS__DS_READ2ST64_B32(MachInst)
Definition: decoder.cc:6612
GPUStaticInst * decode_OPU_VOP3__V_CMP_LE_I64(MachInst)
Definition: decoder.cc:4950
GPUStaticInst * decode_OP_VOPC__V_CMP_EQ_F64(MachInst)
Definition: decoder.cc:10051
GPUStaticInst * decode_OP_VOPC__V_CMPX_LT_U64(MachInst)
Definition: decoder.cc:10765
GPUStaticInst * decode_OP_DS__DS_BPERMUTE_B32(MachInst)
Definition: decoder.cc:6654
GPUStaticInst * decode_OP_VOPC__V_CMPX_LE_I64(MachInst)
Definition: decoder.cc:10729
GPUStaticInst * decode_OP_DS__DS_MIN_SRC2_F64(MachInst)
Definition: decoder.cc:7152
GPUStaticInst * decode_OP_VOP2__V_MUL_HI_I32_I24(MachInst)
Definition: decoder.cc:3276
GPUStaticInst * decode_OP_VOPC__V_CMPX_NE_U16(MachInst)
Definition: decoder.cc:10405
GPUStaticInst * decode_OP_VOPC__V_CMP_GE_I16(MachInst)
Definition: decoder.cc:10267
GPUStaticInst * decode_OPU_VOP3__V_CVT_FLR_I32_F32(MachInst)
Definition: decoder.cc:5484
GPUStaticInst * decode_invalid(MachInst)
Definition: decoder.cc:10807
GPUStaticInst * decode_OPU_VOP3__V_CMP_NEQ_F16(MachInst)
Definition: decoder.cc:4050
GPUStaticInst * decode_OP_VOPC__V_CMPX_NGT_F64(MachInst)
Definition: decoder.cc:10201
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_XY(MachInst)
Definition: decoder.cc:8137
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NGE_F16(MachInst)
Definition: decoder.cc:4122
GPUStaticInst * decode_OPU_VOP3__V_LDEXP_F32(MachInst)
Definition: decoder.cc:6228
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_LZ_O(MachInst)
Definition: decoder.cc:7710
GPUStaticInst * decode_OP_VOPC__V_CMPX_LG_F16(MachInst)
Definition: decoder.cc:9781
GPUStaticInst * decode_OP_VOPC__V_CMP_NE_U32(MachInst)
Definition: decoder.cc:10501
GPUStaticInst * decode_OP_VOPC__V_CMP_TRU_F32(MachInst)
Definition: decoder.cc:9937
GPUStaticInst * decode_OPU_VOP3__V_FRACT_F16(MachInst)
Definition: decoder.cc:5820
GPUStaticInst * subDecode_OP_MUBUF(MachInst)
Definition: decoder.cc:3210
GPUStaticInst * decode_OP_SOPC__S_BITCMP0_B64(MachInst)
Definition: decoder.cc:8941
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_AND_X2(MachInst)
Definition: decoder.cc:8383
GPUStaticInst * decode_OP_VOP1__V_CVT_F32_UBYTE1(MachInst)
Definition: decoder.cc:9283
GPUStaticInst * decode_OPU_VOP3__V_CMP_NE_I16(MachInst)
Definition: decoder.cc:4578
GPUStaticInst * decode_OP_SOP1__S_FF0_I32_B32(MachInst)
Definition: decoder.cc:8641
GPUStaticInst * subDecode_OP_SMEM(MachInst)
Definition: decoder.cc:3170
GPUStaticInst * decode_OP_VOPC__V_CMP_TRU_F16(MachInst)
Definition: decoder.cc:9745
GPUStaticInst * decode_OP_VOP2__V_SUB_F16(MachInst)
Definition: decoder.cc:3426
GPUStaticInst * decode_OP_SOPK__S_CMPK_LG_I32(MachInst)
Definition: decoder.cc:3828
GPUStaticInst * decode_OP_VOPC__V_CMPX_GT_U32(MachInst)
Definition: decoder.cc:10591
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_XOR(MachInst)
Definition: decoder.cc:7332
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NE_U16(MachInst)
Definition: decoder.cc:4722
GPUStaticInst * decode_OP_VOPC__V_CMP_F_U64(MachInst)
Definition: decoder.cc:10663
GPUStaticInst * decode_OP_DS__DS_ADD_SRC2_U64(MachInst)
Definition: decoder.cc:7074
GPUStaticInst * decode_OP_SOPC__S_CMP_LT_I32(MachInst)
Definition: decoder.cc:8881
GPUStaticInst * decode_OP_SOP1__S_FF1_I32_B32(MachInst)
Definition: decoder.cc:8653
GPUStaticInst * decode_OPU_VOP3__V_CMP_EQ_U16(MachInst)
Definition: decoder.cc:4608
GPUStaticInst * decode_OPU_VOP3__V_CMP_LE_I16(MachInst)
Definition: decoder.cc:4566
GPUStaticInst * decode_OP_VOP1__V_TRUNC_F16(MachInst)
Definition: decoder.cc:9577
GPUStaticInst * decode_OP_VOPC__V_CMPX_NLT_F32(MachInst)
Definition: decoder.cc:10027
GPUStaticInst * decode_OP_VOP1__V_FRACT_F16(MachInst)
Definition: decoder.cc:9589
GPUStaticInst * decode_OPU_VOP3__V_MUL_I32_I24(MachInst)
Definition: decoder.cc:5160
GPUStaticInst * decode_OP_VOPC__V_CMPX_T_U16(MachInst)
Definition: decoder.cc:10417
GPUStaticInst * decode_OP_SOP1__S_SET_GPR_IDX_IDX(MachInst)
Definition: decoder.cc:8851
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_L_O(MachInst)
Definition: decoder.cc:7692
GPUStaticInst * decode_OPU_VOP3__V_CMP_LT_I32(MachInst)
Definition: decoder.cc:4746
GPUStaticInst * decode_OPU_VOP3__V_MIN_F16(MachInst)
Definition: decoder.cc:5376
GPUStaticInst * decode_OPU_VOP3__V_CMP_LG_F64(MachInst)
Definition: decoder.cc:4386
GPUStaticInst * decode_OP_MIMG__IMAGE_LOAD_PCK_SGN(MachInst)
Definition: decoder.cc:7446
GPUStaticInst * decode_OP_SOPC__S_CMP_EQ_U64(MachInst)
Definition: decoder.cc:8965
GPUStaticInst * decode_OP_SOPK__S_MULK_I32(MachInst)
Definition: decoder.cc:3900
GPUStaticInst * decode_OP_VOP1__V_EXP_F16(MachInst)
Definition: decoder.cc:9547
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_INC_X2(MachInst)
Definition: decoder.cc:7416
GPUStaticInst * decode_OPU_VOP3__V_AND_B32(MachInst)
Definition: decoder.cc:5238
GPUStaticInst * decode_OPU_VOP3__V_BFE_U32(MachInst)
Definition: decoder.cc:5898
GPUStaticInst * decode_OP_SOP2__S_XOR_B64(MachInst)
Definition: decoder.cc:3648
GPUStaticInst * decode_OP_VOPC__V_CMP_T_U32(MachInst)
Definition: decoder.cc:10513
GPUStaticInst * decode_OP_VOP1__V_CVT_F64_F32(MachInst)
Definition: decoder.cc:9271
GPUStaticInst * decode_OP_SOP1__S_MOV_B64(MachInst)
Definition: decoder.cc:8563
GPUStaticInst * decode_OP_VOP1__V_CVT_U32_F32(MachInst)
Definition: decoder.cc:9217
GPUStaticInst * decode_OPU_VOP3__V_CMP_GE_I32(MachInst)
Definition: decoder.cc:4776
GPUStaticInst * decode_OP_VOPC__V_CMP_LE_F32(MachInst)
Definition: decoder.cc:9865
GPUStaticInst * decode_OPU_VOP3__V_CMPX_O_F16(MachInst)
Definition: decoder.cc:4110
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_C_O(MachInst)
Definition: decoder.cc:7872
GPUStaticInst * decode_OP_DS__DS_ADD_U64(MachInst)
Definition: decoder.cc:6660
GPUStaticInst * decode_OP_VOPC__V_CMPX_GE_U32(MachInst)
Definition: decoder.cc:10603
GPUStaticInst * decode_OP_VOPC__V_CMP_LE_I16(MachInst)
Definition: decoder.cc:10249
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_B_CL_O(MachInst)
Definition: decoder.cc:7752
GPUStaticInst * decode_OP_FLAT__FLAT_LOAD_DWORDX2(MachInst)
Definition: decoder.cc:7218
GPUStaticInst * decode_OPU_VOP3__V_EXP_F32(MachInst)
Definition: decoder.cc:5598
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_C_LZ_O(MachInst)
Definition: decoder.cc:7902
GPUStaticInst * decode_OP_FLAT__FLAT_STORE_DWORD(MachInst)
Definition: decoder.cc:7248
GPUStaticInst * decode_OP_VOP2__V_MUL_U32_U24(MachInst)
Definition: decoder.cc:3282
GPUStaticInst * decode_OP_VOP1__V_SIN_F16(MachInst)
Definition: decoder.cc:9595
GPUStaticInst * decode_OPU_VOP3__V_CVT_PK_U8_F32(MachInst)
Definition: decoder.cc:6024
GPUStaticInst * decode_OP_MUBUF__BUFFER_WBINVL1(MachInst)
Definition: decoder.cc:8245
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LT_U32(MachInst)
Definition: decoder.cc:4890
GPUStaticInst * decode_OP_VOPC__V_CMPX_NE_I32(MachInst)
Definition: decoder.cc:10549
GPUStaticInst * decode_OP_MTBUF__TBUFFER_STORE_FORMAT_XY(MachInst)
Definition: decoder.cc:7992
GPUStaticInst * decode_OP_SOP2__S_XNOR_B32(MachInst)
Definition: decoder.cc:3702
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_OR(MachInst)
Definition: decoder.cc:7326
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GT_F64(MachInst)
Definition: decoder.cc:4476
GPUStaticInst * decode_OP_DS__DS_MAX_SRC2_U32(MachInst)
Definition: decoder.cc:6972
GPUStaticInst * decode_OP_MIMG__IMAGE_ATOMIC_ADD(MachInst)
Definition: decoder.cc:7506
GPUStaticInst * decode_OPU_VOP3__V_CMPX_T_U32(MachInst)
Definition: decoder.cc:4926
GPUStaticInst * decode_OP_DS__DS_WRITE_SRC2_B32(MachInst)
Definition: decoder.cc:6996
GPUStaticInst * decode_OPU_VOP3__V_FLOOR_F16(MachInst)
Definition: decoder.cc:5796
GPUStaticInst * decode_OPU_VOP3__V_CMP_LE_U16(MachInst)
Definition: decoder.cc:4614
GPUStaticInst * decode_OPU_VOP3__V_MAX3_I32(MachInst)
Definition: decoder.cc:5970
GPUStaticInst * decode_OPU_VOP3__V_CUBEID_F32(MachInst)
Definition: decoder.cc:5874
GPUStaticInst * decode_OP_VOPC__V_CMPX_NLT_F64(MachInst)
Definition: decoder.cc:10219
GPUStaticInst * decode_OP_VOPC__V_CMPX_LT_I64(MachInst)
Definition: decoder.cc:10717
GPUStaticInst * decode_OP_DS__DS_AND_B64(MachInst)
Definition: decoder.cc:6714
GPUStaticInst * subDecode_OP_FLAT(MachInst)
Definition: decoder.cc:3202
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_O(MachInst)
Definition: decoder.cc:7716
GPUStaticInst * decode_OP_VOPC__V_CMP_GT_U64(MachInst)
Definition: decoder.cc:10687
GPUStaticInst * decode_OPU_VOP3__V_CNDMASK_B32(MachInst)
Definition: decoder.cc:5124
GPUStaticInst * decode_OPU_VOP3__V_RNDNE_F16(MachInst)
Definition: decoder.cc:5814
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_B_O(MachInst)
Definition: decoder.cc:7698
GPUStaticInst * decode_OP_SOPP__S_CBRANCH_CDBGUSER(MachInst)
Definition: decoder.cc:9121
GPUStaticInst * decode_OP_VOPC__V_CMP_GE_F64(MachInst)
Definition: decoder.cc:10075
GPUStaticInst * decode_OP_VOPC__V_CMPX_GE_F16(MachInst)
Definition: decoder.cc:9787
GPUStaticInst * decode_OPU_VOP3__V_SAD_U32(MachInst)
Definition: decoder.cc:6018
static IsaDecodeMethod tableSubDecode_OP_SMEM[64]
Definition: gpu_decoder.hh:68
GPUStaticInst * decode_OP_DS__DS_RSUB_U64(MachInst)
Definition: decoder.cc:6672
GPUStaticInst * decode_OP_SOP2__S_OR_B64(MachInst)
Definition: decoder.cc:3636
GPUStaticInst * decode_OPU_VOP3__V_CMP_NEQ_F64(MachInst)
Definition: decoder.cc:4434
GPUStaticInst * decode_OP_SOPK__S_CMPK_GT_I32(MachInst)
Definition: decoder.cc:3834
GPUStaticInst * decode_OP_SOP2__S_CSELECT_B32(MachInst)
Definition: decoder.cc:3606
GPUStaticInst * decode_OP_DS__DS_OR_RTN_B32(MachInst)
Definition: decoder.cc:6528
GPUStaticInst * decode_OP_VOPC__V_CMP_EQ_I32(MachInst)
Definition: decoder.cc:10435
GPUStaticInst * decode_OP_SOPK__S_CMPK_GT_U32(MachInst)
Definition: decoder.cc:3870
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LE_I16(MachInst)
Definition: decoder.cc:4662
GPUStaticInst * decode_OP_SOPC__S_CMP_GT_U32(MachInst)
Definition: decoder.cc:8905
GPUStaticInst * decode_OP_DS__DS_DEC_RTN_U64(MachInst)
Definition: decoder.cc:6804
GPUStaticInst * decode_OP_VOP1__V_FRACT_F32(MachInst)
Definition: decoder.cc:9337
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_C_LZ(MachInst)
Definition: decoder.cc:7830
GPUStaticInst * decode_OP_VOPC__V_CMPX_GT_F16(MachInst)
Definition: decoder.cc:9775
GPUStaticInst * decode_OP_VOPC__V_CMPX_T_I32(MachInst)
Definition: decoder.cc:10561
GPUStaticInst * decode_OPU_VOP3__V_QSAD_PK_U16_U8(MachInst)
Definition: decoder.cc:6072
GPUStaticInst * decode_OP_SOPK__S_CMPK_LT_U32(MachInst)
Definition: decoder.cc:3882
GPUStaticInst * decode_OP_DS__DS_ADD_SRC2_U32(MachInst)
Definition: decoder.cc:6924
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_DWORDX3(MachInst)
Definition: decoder.cc:8191
GPUStaticInst * decode_OP_DS__DS_RSUB_SRC2_U64(MachInst)
Definition: decoder.cc:7086
GPUStaticInst * decode_OP_SOP2__S_ORN2_B64(MachInst)
Definition: decoder.cc:3672
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LT_I32(MachInst)
Definition: decoder.cc:4842
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_C_B_CL(MachInst)
Definition: decoder.cc:7824
GPUStaticInst * decode_OP_FLAT__FLAT_LOAD_DWORDX3(MachInst)
Definition: decoder.cc:7224
GPUStaticInst * decode_OP_SOP2__S_SUB_I32(MachInst)
Definition: decoder.cc:3564
GPUStaticInst * decode_OP_VOPC__V_CMP_GE_F16(MachInst)
Definition: decoder.cc:9691
GPUStaticInst * decode_OP_DS__DS_SWIZZLE_B32(MachInst)
Definition: decoder.cc:6642
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_SWAP_X2(MachInst)
Definition: decoder.cc:8335
GPUStaticInst * decode_OP_VOPC__V_CMP_NE_U64(MachInst)
Definition: decoder.cc:10693
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LE_I32(MachInst)
Definition: decoder.cc:4854
GPUStaticInst * decode_OPU_VOP3__V_CMPX_F_U16(MachInst)
Definition: decoder.cc:4692
GPUStaticInst * decode_OPU_VOP3__V_CMP_NLG_F64(MachInst)
Definition: decoder.cc:4416
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_FORMAT_XY(MachInst)
Definition: decoder.cc:8065
static IsaDecodeMethod tableSubDecode_OP_FLAT[128]
Definition: gpu_decoder.hh:64
GPUStaticInst * decode_OPU_VOP3__V_CMP_NLE_F32(MachInst)
Definition: decoder.cc:4236
GPUStaticInst * decode_OP_VOPC__V_CMPX_GE_F32(MachInst)
Definition: decoder.cc:9979
GPUStaticInst * decode_OPU_VOP3__V_FFBH_U32(MachInst)
Definition: decoder.cc:5676
GPUStaticInst * decode_OP_VOP1__V_CVT_U16_F16(MachInst)
Definition: decoder.cc:9511
GPUStaticInst * decode_OP_VOP1__V_CVT_F64_U32(MachInst)
Definition: decoder.cc:9307
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_CD_O(MachInst)
Definition: decoder.cc:7938
GPUStaticInst * decode_OP_MIMG__IMAGE_ATOMIC_XOR(MachInst)
Definition: decoder.cc:7554
GPUStaticInst * decode_OP_DS__DS_SUB_RTN_U32(MachInst)
Definition: decoder.cc:6474
GPUStaticInst * decode_OP_SMEM__S_BUFFER_LOAD_DWORDX4(MachInst)
Definition: decoder.cc:8455
GPUStaticInst * decode_OPU_VOP3__V_CMP_GE_F64(MachInst)
Definition: decoder.cc:4392
GPUStaticInst * decode_OP_DS__DS_MAX_F64(MachInst)
Definition: decoder.cc:6774
GPUStaticInst * decode_OP_MIMG__IMAGE_ATOMIC_UMAX(MachInst)
Definition: decoder.cc:7536
GPUStaticInst * decode_OP_VOPC__V_CMP_LE_F64(MachInst)
Definition: decoder.cc:10057
GPUStaticInst * decode_OPU_VOP3__V_ASHRREV_I16(MachInst)
Definition: decoder.cc:5364
GPUStaticInst * decode_OP_SOPC__S_BITCMP1_B64(MachInst)
Definition: decoder.cc:8947
GPUStaticInst * decode_OP_MIMG__IMAGE_STORE_PCK(MachInst)
Definition: decoder.cc:7476
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_C_CL(MachInst)
Definition: decoder.cc:7806
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_SUB(MachInst)
Definition: decoder.cc:8275
GPUStaticInst * decode_OPU_VOP3__V_CMP_LT_F16(MachInst)
Definition: decoder.cc:3978
GPUStaticInst * decode_OPU_VOP3__V_ALIGNBIT_B32(MachInst)
Definition: decoder.cc:5934
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_CL_O(MachInst)
Definition: decoder.cc:7674
GPUStaticInst * decode_OPU_VOP3__V_BFE_I32(MachInst)
Definition: decoder.cc:5904
GPUStaticInst * decode_OP_SOP2__S_CBRANCH_G_FORK(MachInst)
Definition: decoder.cc:3792
GPUStaticInst * decode_OP_SOPC__S_CMP_EQ_I32(MachInst)
Definition: decoder.cc:8857
GPUStaticInst * decode_OPU_VOP3__V_MUL_F64(MachInst)
Definition: decoder.cc:6186
GPUStaticInst * decode_OPU_VOP3__V_MAX_I32(MachInst)
Definition: decoder.cc:5202
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NLE_F64(MachInst)
Definition: decoder.cc:4524
GPUStaticInst * decode_OP_DS__DS_WRITE_B16(MachInst)
Definition: decoder.cc:6462
GPUStaticInst * decode_OP_SMEM__S_LOAD_DWORDX8(MachInst)
Definition: decoder.cc:8431
GPUStaticInst * decode_OPU_VOP3__V_CMP_NLT_F32(MachInst)
Definition: decoder.cc:4248
GPUStaticInst * decode_OP_DS__DS_INC_RTN_U64(MachInst)
Definition: decoder.cc:6798
GPUStaticInst * decode_OP_DS__DS_DEC_SRC2_U32(MachInst)
Definition: decoder.cc:6948
GPUStaticInst * decode_OP_DS__DS_READ_I8(MachInst)
Definition: decoder.cc:6618
GPUStaticInst * decode_OPU_VOP3__V_CVT_PK_I16_I32(MachInst)
Definition: decoder.cc:6318
GPUStaticInst * decode_OP_VOP1__V_CVT_FLR_I32_F32(MachInst)
Definition: decoder.cc:9253
GPUStaticInst * decode_OP_VOP1__V_TRUNC_F64(MachInst)
Definition: decoder.cc:9313
GPUStaticInst * decode_OP_SOPP__S_SETHALT(MachInst)
Definition: decoder.cc:9055
GPUStaticInst * decode_OP_SOP1__S_MOV_FED_B32(MachInst)
Definition: decoder.cc:8845
GPUStaticInst * decode_OP_DS__DS_MSKOR_B64(MachInst)
Definition: decoder.cc:6732
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_LDS_DWORD(MachInst)
Definition: decoder.cc:8239
GPUStaticInst * decode_OP_VOPC__V_CMPX_LE_F64(MachInst)
Definition: decoder.cc:10153
GPUStaticInst * decode_OP_VOPC__V_CMP_NE_I32(MachInst)
Definition: decoder.cc:10453
GPUStaticInst * decode_OPU_VOP3__V_CVT_OFF_F32_I4(MachInst)
Definition: decoder.cc:5490
GPUStaticInst * decode_OP_VOPC__V_CMPX_GE_I16(MachInst)
Definition: decoder.cc:10363
GPUStaticInst * decode_OP_VOPC__V_CMPX_NLT_F16(MachInst)
Definition: decoder.cc:9835
GPUStaticInst * decode_OP_MIMG__IMAGE_GET_LOD(MachInst)
Definition: decoder.cc:7908
GPUStaticInst * decode_OP_MIMG__IMAGE_ATOMIC_AND(MachInst)
Definition: decoder.cc:7542
GPUStaticInst * decode_OP_VOP1__V_CVT_F32_U32(MachInst)
Definition: decoder.cc:9211
GPUStaticInst * decode_OP_DS__DS_ADD_RTN_U32(MachInst)
Definition: decoder.cc:6468
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_FORMAT_XY(MachInst)
Definition: decoder.cc:8089
GPUStaticInst * decode_OP_VOP1__V_FLOOR_F16(MachInst)
Definition: decoder.cc:9565
GPUStaticInst * decode_OP_SOPP__S_ENDPGM(MachInst)
Definition: decoder.cc:8983
GPUStaticInst * decode_OPU_VOP3__V_MUL_HI_U32(MachInst)
Definition: decoder.cc:6216
GPUStaticInst * decode_OP_SOPP__S_SLEEP(MachInst)
Definition: decoder.cc:9061
GPUStaticInst * decode_OP_SOPP__S_SET_GPR_IDX_MODE(MachInst)
Definition: decoder.cc:9151
GPUStaticInst * decode_OP_DS__DS_ADD_RTN_F32(MachInst)
Definition: decoder.cc:6594
GPUStaticInst * decode_OP_VOP1__V_FREXP_EXP_I32_F64(MachInst)
Definition: decoder.cc:9463
GPUStaticInst * decode_OP_SOP2__S_CSELECT_B64(MachInst)
Definition: decoder.cc:3612
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_DEC_X2(MachInst)
Definition: decoder.cc:8407
GPUStaticInst * decode_OP_SOPP__S_SETKILL(MachInst)
Definition: decoder.cc:9043
GPUStaticInst * decode_OP_SOP1__S_XNOR_SAVEEXEC_B64(MachInst)
Definition: decoder.cc:8791
GPUStaticInst * decode_OP_FLAT__FLAT_STORE_DWORDX2(MachInst)
Definition: decoder.cc:7254
GPUStaticInst * decode_OP_VOPC__V_CMP_GT_I16(MachInst)
Definition: decoder.cc:10255
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_ADD_X2(MachInst)
Definition: decoder.cc:8347
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GE_I64(MachInst)
Definition: decoder.cc:5064
GPUStaticInst * decode_OPU_VOP3__V_FRACT_F64(MachInst)
Definition: decoder.cc:5706
static IsaDecodeMethod tableSubDecode_OP_VOPC[256]
Definition: gpu_decoder.hh:74
GPUStaticInst * decode_OPU_VOP3__V_CMP_LT_F32(MachInst)
Definition: decoder.cc:4170
GPUStaticInst * decode_OP_DS__DS_CMPST_RTN_F64(MachInst)
Definition: decoder.cc:6882
GPUStaticInst * decode_OPU_VOP3__V_CMP_GE_F32(MachInst)
Definition: decoder.cc:4200
GPUStaticInst * decode_OP_DS__DS_WRITE_SRC2_B64(MachInst)
Definition: decoder.cc:7146
GPUStaticInst * decode_OP_MIMG__IMAGE_ATOMIC_INC(MachInst)
Definition: decoder.cc:7560
GPUStaticInst * subDecode_OP_VINTRP(MachInst)
Definition: decoder.cc:3186
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_CMPSWAP(MachInst)
Definition: decoder.cc:8263
GPUStaticInst * decode_OPU_VOP3__V_CMPX_CLASS_F64(MachInst)
Definition: decoder.cc:3954
GPUStaticInst * decode_OP_VOP2__V_ADD_F16(MachInst)
Definition: decoder.cc:3420
GPUStaticInst * decode_OPU_VOP3__V_MAD_I64_I32(MachInst)
Definition: decoder.cc:6096
GPUStaticInst * decode_OP_MIMG__IMAGE_LOAD_PCK(MachInst)
Definition: decoder.cc:7440
GPUStaticInst * decode_OP_FLAT__FLAT_STORE_DWORDX4(MachInst)
Definition: decoder.cc:7266
GPUStaticInst * decode_OP_SOPP__S_BARRIER(MachInst)
Definition: decoder.cc:9037
GPUStaticInst * decode_OPU_VOP3__V_ASHRREV_I64(MachInst)
Definition: decoder.cc:6276
GPUStaticInst * decode_OPU_VOP3__V_MQSAD_U32_U8(MachInst)
Definition: decoder.cc:6084
GPUStaticInst * decode_OP_DS__DS_WRAP_RTN_B32(MachInst)
Definition: decoder.cc:6588
GPUStaticInst * decode_OP_DS__DS_INC_U64(MachInst)
Definition: decoder.cc:6678
GPUStaticInst * subDecode_OP_VOPC(MachInst)
Definition: decoder.cc:3130
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LT_U16(MachInst)
Definition: decoder.cc:4698
GPUStaticInst * decode_OP_VOP1__V_RSQ_F32(MachInst)
Definition: decoder.cc:9391
GPUStaticInst * decode_OP_VOP2__V_MIN_U16(MachInst)
Definition: decoder.cc:3528
GPUStaticInst * decode_OPU_VOP3__V_CMP_O_F64(MachInst)
Definition: decoder.cc:4398
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GE_F16(MachInst)
Definition: decoder.cc:4104
GPUStaticInst * decode_OP_VOP2__V_OR_B32(MachInst)
Definition: decoder.cc:3354
GPUStaticInst * decode_OPU_VOP3__V_CMP_F_F64(MachInst)
Definition: decoder.cc:4356
GPUStaticInst * decode_OPU_VOP3__V_SUB_F16(MachInst)
Definition: decoder.cc:5304
GPUStaticInst * decode_OP_VOPC__V_CMPX_GT_F32(MachInst)
Definition: decoder.cc:9967
static IsaDecodeMethod tableSubDecode_OPU_VOP3[768]
Definition: gpu_decoder.hh:62
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_L(MachInst)
Definition: decoder.cc:7644
GPUStaticInst * decode_OP_MIMG__IMAGE_LOAD_MIP_PCK(MachInst)
Definition: decoder.cc:7452
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_BYTE(MachInst)
Definition: decoder.cc:8203
GPUStaticInst * decode_OP_VOPC__V_CMP_NLG_F16(MachInst)
Definition: decoder.cc:9715
GPUStaticInst * decode_OP_VOP2__V_ADD_U32(MachInst)
Definition: decoder.cc:3384
GPUStaticInst * decode_OPU_VOP3__V_CMP_LT_U64(MachInst)
Definition: decoder.cc:4986
GPUStaticInst * decode_OP_VOP1__V_FFBL_B32(MachInst)
Definition: decoder.cc:9451
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_DWORDX3(MachInst)
Definition: decoder.cc:8227
GPUStaticInst * decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_X(MachInst)
Definition: decoder.cc:7962
GPUStaticInst * decode_OP_VOPC__V_CMP_T_I32(MachInst)
Definition: decoder.cc:10465
GPUStaticInst * decode_OP_VOP2__V_LSHRREV_B16(MachInst)
Definition: decoder.cc:3492
GPUStaticInst * decode_OP_SOP1__S_CMOV_B64(MachInst)
Definition: decoder.cc:8575
GPUStaticInst * decode_OPU_VOP3__V_CMP_GE_U16(MachInst)
Definition: decoder.cc:4632
GPUStaticInst * decode_OP_VOPC__V_CMPX_F_F32(MachInst)
Definition: decoder.cc:9943
GPUStaticInst * decode_OPU_VOP3__V_CMP_NLT_F64(MachInst)
Definition: decoder.cc:4440
GPUStaticInst * decode_OPU_VOP3__V_MIN_F32(MachInst)
Definition: decoder.cc:5184
GPUStaticInst * decode_OP_DS__DS_INC_SRC2_U64(MachInst)
Definition: decoder.cc:7092
GPUStaticInst * decode_OP_DS__DS_DEC_U64(MachInst)
Definition: decoder.cc:6684
GPUStaticInst * decode_OPU_VOP3__V_MIN3_I32(MachInst)
Definition: decoder.cc:5952
GPUStaticInst * decode_OP_DS__DS_MIN_SRC2_I32(MachInst)
Definition: decoder.cc:6954
GPUStaticInst * decode_OPU_VOP3__V_SAD_U8(MachInst)
Definition: decoder.cc:6000
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_INC_X2(MachInst)
Definition: decoder.cc:8401
GPUStaticInst * decode_OP_VOP2__V_MAX_F32(MachInst)
Definition: decoder.cc:3300
GPUStaticInst * decode_OP_SOP1__S_GETPC_B64(MachInst)
Definition: decoder.cc:8725
GPUStaticInst * decode_OP_SOPC__S_CMP_LG_U64(MachInst)
Definition: decoder.cc:8971
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_C_L_O(MachInst)
Definition: decoder.cc:7884
GPUStaticInst * decode_OP_VOPC__V_CMP_U_F32(MachInst)
Definition: decoder.cc:9895
GPUStaticInst * decode_OPU_VOP3__V_CMP_F_I32(MachInst)
Definition: decoder.cc:4740
GPUStaticInst * decode_OP_SOP1__S_SEXT_I32_I16(MachInst)
Definition: decoder.cc:8695
GPUStaticInst * decode_OPU_VOP3__V_MAD_I32_I24(MachInst)
Definition: decoder.cc:5862
GPUStaticInst * decode_OPU_VOP3__V_CMPX_T_I64(MachInst)
Definition: decoder.cc:5070
GPUStaticInst * decode_OP_VOP2__V_MAC_F16(MachInst)
Definition: decoder.cc:3444
GPUStaticInst * decode_OPU_VOP3__V_CVT_RPI_I32_F32(MachInst)
Definition: decoder.cc:5478
GPUStaticInst * decode_OP_DS__DS_XOR_SRC2_B64(MachInst)
Definition: decoder.cc:7140
GPUStaticInst * decode_OPU_VOP3__V_CMP_LE_U64(MachInst)
Definition: decoder.cc:4998
GPUStaticInst * decode_OPU_VOP3__V_LERP_U8(MachInst)
Definition: decoder.cc:5928
GPUStaticInst * decode_OP_SOP1__S_FLBIT_I32(MachInst)
Definition: decoder.cc:8677
GPUStaticInst * decode_OPU_VOP3__V_CVT_F16_I16(MachInst)
Definition: decoder.cc:5736
GPUStaticInst * decode_OP_VOPC__V_CMP_LT_F32(MachInst)
Definition: decoder.cc:9853
GPUStaticInst * decode_OPU_VOP3__V_CMPX_EQ_F64(MachInst)
Definition: decoder.cc:4464
GPUStaticInst * decode_OP_DS__DS_SUB_SRC2_U32(MachInst)
Definition: decoder.cc:6930
GPUStaticInst * decode_OP_MIMG__IMAGE_STORE_MIP(MachInst)
Definition: decoder.cc:7470
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_CD_O(MachInst)
Definition: decoder.cc:7950
GPUStaticInst * decode_OP_VOPC__V_CMP_LT_I64(MachInst)
Definition: decoder.cc:10621
GPUStaticInst * decode_OP_VOPC__V_CMPX_O_F64(MachInst)
Definition: decoder.cc:10177
GPUStaticInst * subDecode_OP_VOP1(MachInst)
Definition: decoder.cc:3138
GPUStaticInst * decode_OP_VOP2__V_ASHRREV_I16(MachInst)
Definition: decoder.cc:3498
GPUStaticInst * decode_OP_DS__DS_WRITE_B32(MachInst)
Definition: decoder.cc:6402
GPUStaticInst * decode_OP_SMEM__S_STORE_DWORD(MachInst)
Definition: decoder.cc:8473
GPUStaticInst * decode_OPU_VOP3__V_MSAD_U8(MachInst)
Definition: decoder.cc:6066
GPUStaticInst * decode_OP_DS__DS_MAX_SRC2_F64(MachInst)
Definition: decoder.cc:7158
GPUStaticInst * decode_OP_DS__DS_ORDERED_COUNT(MachInst)
Definition: decoder.cc:7068
GPUStaticInst * decode_OP_VOP1__V_MOV_FED_B32(MachInst)
Definition: decoder.cc:9229
GPUStaticInst * decode_OPU_VOP3__V_FRACT_F32(MachInst)
Definition: decoder.cc:5568
GPUStaticInst * decode_OP_VOP1__V_CVT_I32_F64(MachInst)
Definition: decoder.cc:9193
GPUStaticInst * decode_OPU_VOP3__V_CVT_F64_F32(MachInst)
Definition: decoder.cc:5502
GPUStaticInst * decode_OP_VOP2__V_MAX_F16(MachInst)
Definition: decoder.cc:3504
GPUStaticInst * decode_OPU_VOP3__V_CMPX_TRU_F64(MachInst)
Definition: decoder.cc:4542
GPUStaticInst * decode_OP_SOP1__S_ABS_I32(MachInst)
Definition: decoder.cc:8839
GPUStaticInst * decode_OP_MIMG__IMAGE_STORE_MIP_PCK(MachInst)
Definition: decoder.cc:7482
GPUStaticInst * decode_OPU_VOP3__V_ADDC_U32(MachInst)
Definition: decoder.cc:5280
GPUStaticInst * decode_OPU_VOP3__V_EXP_F16(MachInst)
Definition: decoder.cc:5778
GPUStaticInst * decode_OPU_VOP3__V_FREXP_MANT_F64(MachInst)
Definition: decoder.cc:5700
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_DWORDX4(MachInst)
Definition: decoder.cc:8197
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LT_U64(MachInst)
Definition: decoder.cc:5082
GPUStaticInst * decode_OPU_VOP3__V_CMP_O_F32(MachInst)
Definition: decoder.cc:4206
GPUStaticInst * decode_OP_VOP1__V_RSQ_F16(MachInst)
Definition: decoder.cc:9535
static IsaDecodeMethod tableSubDecode_OP_SOPP[128]
Definition: gpu_decoder.hh:71
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_SMIN(MachInst)
Definition: decoder.cc:8281
GPUStaticInst * decode_OP_VOPC__V_CMP_LE_U16(MachInst)
Definition: decoder.cc:10297
GPUStaticInst * decode_OP_DS__DS_ADD_RTN_U64(MachInst)
Definition: decoder.cc:6780
GPUStaticInst * decode_OP_SOPP__S_TRAP(MachInst)
Definition: decoder.cc:9085
GPUStaticInst * decode_OPU_VOP3__V_CMPX_EQ_F32(MachInst)
Definition: decoder.cc:4272
GPUStaticInst * decode_OP_SOP2__S_BFE_I64(MachInst)
Definition: decoder.cc:3786
GPUStaticInst * decode_OPU_VOP3__V_CMP_EQ_F64(MachInst)
Definition: decoder.cc:4368
GPUStaticInst * decode_OP_VOPC__V_CMPX_NE_I64(MachInst)
Definition: decoder.cc:10741
GPUStaticInst * decode_OP_VOPC__V_CMPX_T_U32(MachInst)
Definition: decoder.cc:10609
GPUStaticInst * decode_OPU_VOP3__V_CVT_PKNORM_I16_F32(MachInst)
Definition: decoder.cc:6294
GPUStaticInst * decode_OPU_VOP3__V_CVT_F32_UBYTE2(MachInst)
Definition: decoder.cc:5520
GPUStaticInst * decode_OPU_VOP3__V_CMP_CLASS_F64(MachInst)
Definition: decoder.cc:3948
GPUStaticInst * decode_OPU_VOP3__V_CMP_GE_I16(MachInst)
Definition: decoder.cc:4584
GPUStaticInst * decode_OPU_VOP3__V_CVT_F32_F16(MachInst)
Definition: decoder.cc:5472
GPUStaticInst * decode_OPU_VOP3__V_ADD_U32(MachInst)
Definition: decoder.cc:5262
GPUStaticInst * decode_OP_SOP1__S_SWAPPC_B64(MachInst)
Definition: decoder.cc:8737
GPUStaticInst * decode_OP_VOPC__V_CMP_F_F16(MachInst)
Definition: decoder.cc:9655
GPUStaticInst * decode_OPU_VOP3__V_CMP_T_I32(MachInst)
Definition: decoder.cc:4782
GPUStaticInst * decode_OPU_VOP3__V_CVT_F32_UBYTE1(MachInst)
Definition: decoder.cc:5514
GPUStaticInst * decode_OP_SOP1__S_SETPC_B64(MachInst)
Definition: decoder.cc:8731
GPUStaticInst * decode_OPU_VOP3__V_MAX_F64(MachInst)
Definition: decoder.cc:6198
GPUStaticInst * decode_OP_SOPK__S_CMPK_GE_I32(MachInst)
Definition: decoder.cc:3840
GPUStaticInst * decode_OPU_VOP3__V_CVT_F32_UBYTE3(MachInst)
Definition: decoder.cc:5526
GPUStaticInst * decode_OP_VOP2__V_CNDMASK_B32(MachInst)
Definition: decoder.cc:3234
GPUStaticInst * decode_OPU_VOP3__V_CMPX_U_F64(MachInst)
Definition: decoder.cc:4500
GPUStaticInst * decode_OP_DS__DS_MIN_SRC2_I64(MachInst)
Definition: decoder.cc:7104
GPUStaticInst * decode_OP_VOPC__V_CMPX_NGT_F32(MachInst)
Definition: decoder.cc:10009
GPUStaticInst * decode_OP_VOPC__V_CMP_NLE_F16(MachInst)
Definition: decoder.cc:9727
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_CL(MachInst)
Definition: decoder.cc:7770
GPUStaticInst * decode_OP_VOPC__V_CMPX_U_F16(MachInst)
Definition: decoder.cc:9799
GPUStaticInst * decode_OP_VOPC__V_CMP_O_F16(MachInst)
Definition: decoder.cc:9697
GPUStaticInst * decode_OP_SOPK__S_CMPK_LT_I32(MachInst)
Definition: decoder.cc:3846
GPUStaticInst * decode_OP_SMEM__S_BUFFER_STORE_DWORDX2(MachInst)
Definition: decoder.cc:8497
GPUStaticInst * decode_OP_FLAT__FLAT_STORE_SHORT(MachInst)
Definition: decoder.cc:7242
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_AND_X2(MachInst)
Definition: decoder.cc:7398
GPUStaticInst * decode_OP_VOP1__V_SQRT_F64(MachInst)
Definition: decoder.cc:9415
GPUStaticInst * decode_OP_VOP2__V_MIN_I16(MachInst)
Definition: decoder.cc:3534
GPUStaticInst * decode_OPU_VOP3__V_DIV_FIXUP_F16(MachInst)
Definition: decoder.cc:6132
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NLT_F16(MachInst)
Definition: decoder.cc:4152
GPUStaticInst * decode_OPU_VOP3__V_DIV_FIXUP_F32(MachInst)
Definition: decoder.cc:6030
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_LZ(MachInst)
Definition: decoder.cc:7614
GPUStaticInst * decode_OP_SOP2__S_NOR_B32(MachInst)
Definition: decoder.cc:3690
GPUStaticInst * decode_OPU_VOP3__V_CMP_NLE_F64(MachInst)
Definition: decoder.cc:4428
GPUStaticInst * decode_OP_SOPK__S_SETREG_IMM32_B32(MachInst)
Definition: decoder.cc:3924
GPUStaticInst * decode_OPU_VOP3__V_MIN3_F32(MachInst)
Definition: decoder.cc:5946
GPUStaticInst * decode_OP_SOPP__S_WAKEUP(MachInst)
Definition: decoder.cc:8995
GPUStaticInst * decode_OP_VOPC__V_CMP_F_I16(MachInst)
Definition: decoder.cc:10231
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_FORMAT_X(MachInst)
Definition: decoder.cc:8083
GPUStaticInst * decode_OP_VOPC__V_CMP_GT_I64(MachInst)
Definition: decoder.cc:10639
GPUStaticInst * decode_OPU_VOP3__V_CMP_NLG_F32(MachInst)
Definition: decoder.cc:4224
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_X(MachInst)
Definition: decoder.cc:8131
GPUStaticInst * decode_OPU_VOP3__V_CMPX_T_U16(MachInst)
Definition: decoder.cc:4734
GPUStaticInst * decode_OP_VOP1__V_CVT_F32_UBYTE0(MachInst)
Definition: decoder.cc:9277
GPUStaticInst * decode_OP_VOP1__V_READFIRSTLANE_B32(MachInst)
Definition: decoder.cc:9187
GPUStaticInst * decode_OP_SOPP__S_INCPERFLEVEL(MachInst)
Definition: decoder.cc:9097
GPUStaticInst * decode_OP_VOPC__V_CMP_NLG_F64(MachInst)
Definition: decoder.cc:10099
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_UMAX_X2(MachInst)
Definition: decoder.cc:8377
GPUStaticInst * decode_OP_DS__DS_GWS_INIT(MachInst)
Definition: decoder.cc:7026
GPUStaticInst * decode_OPU_VOP3__V_CUBESC_F32(MachInst)
Definition: decoder.cc:5880
GPUStaticInst * decode_OP_VOP1__V_CVT_F16_U16(MachInst)
Definition: decoder.cc:9499
GPUStaticInst * decode_OPU_VOP3__V_CMP_O_F16(MachInst)
Definition: decoder.cc:4014
GPUStaticInst * decode_OP_MTBUF__TBUFFER_STORE_FORMAT_D16_XYZ(MachInst)
Definition: decoder.cc:8046
GPUStaticInst * decode_OPU_VOP3__V_MAX_U32(MachInst)
Definition: decoder.cc:5214
GPUStaticInst * decode_OP_DS__DS_OR_B32(MachInst)
Definition: decoder.cc:6384
GPUStaticInst * decode_OP_VOPC__V_CMPX_T_U64(MachInst)
Definition: decoder.cc:10801
GPUStaticInst * decode_OPU_VOP3__V_CMP_LT_U16(MachInst)
Definition: decoder.cc:4602
GPUStaticInst * decode_OPU_VOP3__V_RCP_F32(MachInst)
Definition: decoder.cc:5610
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LE_U64(MachInst)
Definition: decoder.cc:5094
GPUStaticInst * decode_OP_DS__DS_READ_I16(MachInst)
Definition: decoder.cc:6630
GPUStaticInst * decode_OP_VOP1__V_NOP(MachInst)
Definition: decoder.cc:9175
GPUStaticInst * decode_OP_DS__DS_GWS_SEMA_P(MachInst)
Definition: decoder.cc:7044
GPUStaticInst * decode_OPU_VOP3__V_CMP_GT_F64(MachInst)
Definition: decoder.cc:4380
GPUStaticInst * decode_OP_SOPK__S_CMPK_LE_I32(MachInst)
Definition: decoder.cc:3852
GPUStaticInst * decode_OPU_VOP3__V_CMP_NLT_F16(MachInst)
Definition: decoder.cc:4056
GPUStaticInst * decode_OP_VOPC__V_CMP_GE_U64(MachInst)
Definition: decoder.cc:10699
GPUStaticInst * decode_OP_VOPC__V_CMP_EQ_F32(MachInst)
Definition: decoder.cc:9859
GPUStaticInst * decode_OPU_VOP3__V_RSQ_F64(MachInst)
Definition: decoder.cc:5634
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NGT_F32(MachInst)
Definition: decoder.cc:4326
GPUStaticInst * decode_OP_MIMG__IMAGE_GET_RESINFO(MachInst)
Definition: decoder.cc:7488
GPUStaticInst * decode_OP_SOP1__S_MOVRELS_B64(MachInst)
Definition: decoder.cc:8815
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_ADD(MachInst)
Definition: decoder.cc:8269
GPUStaticInst * decode_OPU_VOP3__V_CMP_NLG_F16(MachInst)
Definition: decoder.cc:4032
GPUStaticInst * decode_OP_VOP2__V_MADMK_F32(MachInst)
Definition: decoder.cc:3372
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NEQ_F64(MachInst)
Definition: decoder.cc:4530
GPUStaticInst * decode_OP_SOP1__S_NOT_B32(MachInst)
Definition: decoder.cc:8581
GPUStaticInst * decode_OP_VOPC__V_CMP_NLT_F64(MachInst)
Definition: decoder.cc:10123
GPUStaticInst * decode_OPU_VOP3__V_MAC_F16(MachInst)
Definition: decoder.cc:5322
GPUStaticInst * decode_OPU_VOP3__V_INTERP_MOV_F32(MachInst)
Definition: decoder.cc:6156
GPUStaticInst * decode_OP_VOPC__V_CMPX_F_U16(MachInst)
Definition: decoder.cc:10375
GPUStaticInst * decode_OP_SOP1__S_MOVRELS_B32(MachInst)
Definition: decoder.cc:8809
GPUStaticInst * decode_OPU_VOP3__V_COS_F16(MachInst)
Definition: decoder.cc:5832
GPUStaticInst * decode_OP_SOP1__S_FLBIT_I32_B64(MachInst)
Definition: decoder.cc:8671
GPUStaticInst * decode_OP_VOP1__V_CVT_F32_F64(MachInst)
Definition: decoder.cc:9265
GPUStaticInst * decode_OPU_VOP3__V_CMP_GE_U32(MachInst)
Definition: decoder.cc:4824
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_OR_X2(MachInst)
Definition: decoder.cc:7404
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_XYZW(MachInst)
Definition: decoder.cc:8125
GPUStaticInst * decode_OP_VOPC__V_CMPX_NGE_F64(MachInst)
Definition: decoder.cc:10189
GPUStaticInst * decode_OPU_VOP3__V_MED3_F32(MachInst)
Definition: decoder.cc:5982
GPUStaticInst * decode_OP_VOPC__V_CMP_LG_F32(MachInst)
Definition: decoder.cc:9877
GPUStaticInst * decode_OPU_VOP3__V_CMP_NE_I32(MachInst)
Definition: decoder.cc:4770
GPUStaticInst * decode_OP_DS__DS_MAX_I64(MachInst)
Definition: decoder.cc:6696
GPUStaticInst * decode_OP_VOPC__V_CMP_LG_F64(MachInst)
Definition: decoder.cc:10069
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LE_F32(MachInst)
Definition: decoder.cc:4278
GPUStaticInst * decode_OP_DS__DS_WRITE_B128(MachInst)
Definition: decoder.cc:7170
GPUStaticInst * decode_OP_SOPC__S_CMP_LE_U32(MachInst)
Definition: decoder.cc:8923
GPUStaticInst * decode_OP_VOPC__V_CMPX_GE_I64(MachInst)
Definition: decoder.cc:10747
GPUStaticInst * decode_OPU_VOP3__V_CMP_NGT_F64(MachInst)
Definition: decoder.cc:4422
GPUStaticInst * decode_OP_VOPC__V_CMP_NE_U16(MachInst)
Definition: decoder.cc:10309
GPUStaticInst * decode_OP_VOPC__V_CMPX_NGE_F16(MachInst)
Definition: decoder.cc:9805
GPUStaticInst * decode_OPU_VOP3__V_CMP_NGE_F32(MachInst)
Definition: decoder.cc:4218
GPUStaticInst * decode_OP_VOP2__V_MIN_F16(MachInst)
Definition: decoder.cc:3510
GPUStaticInst * decode_OP_DS__DS_RSUB_RTN_U32(MachInst)
Definition: decoder.cc:6480
GPUStaticInst * decode_OP_VOPC__V_CMP_F_I32(MachInst)
Definition: decoder.cc:10423
GPUStaticInst * decode_OP_VINTRP__V_INTERP_P1_F32(MachInst)
Definition: decoder.cc:9157
GPUStaticInst * decode_OP_VOP2__V_LDEXP_F16(MachInst)
Definition: decoder.cc:3540
GPUStaticInst * decode_OP_SOP2__S_NAND_B32(MachInst)
Definition: decoder.cc:3678
GPUStaticInst * decode_OPU_VOP3__V_CMPX_TRU_F32(MachInst)
Definition: decoder.cc:4350
GPUStaticInst * decode_OPU_VOP3__V_CMP_LT_F64(MachInst)
Definition: decoder.cc:4362
GPUStaticInst * decode_OP_DS__DS_MIN_F32(MachInst)
Definition: decoder.cc:6432
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_C_B(MachInst)
Definition: decoder.cc:7818
GPUStaticInst * decode_OP_DS__DS_MIN_F64(MachInst)
Definition: decoder.cc:6768
GPUStaticInst * decode_OP_SOP1__S_QUADMASK_B32(MachInst)
Definition: decoder.cc:8797
GPUStaticInst * decode_OPU_VOP3__V_CVT_F16_F32(MachInst)
Definition: decoder.cc:5466
GPUStaticInst * decode_OPU_VOP3__V_INTERP_P1_F32(MachInst)
Definition: decoder.cc:6144
GPUStaticInst * decode_OP_SOP2__S_MUL_I32(MachInst)
Definition: decoder.cc:3762
GPUStaticInst * decode_OPU_VOP3__V_CMPX_F_I16(MachInst)
Definition: decoder.cc:4644
GPUStaticInst * decode_OPU_VOP3__V_RCP_IFLAG_F32(MachInst)
Definition: decoder.cc:5616
GPUStaticInst * decode_OP_VOPC__V_CMP_NLT_F16(MachInst)
Definition: decoder.cc:9739
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NE_I64(MachInst)
Definition: decoder.cc:5058
GPUStaticInst * decode_OPU_VOP3__V_RSQ_F32(MachInst)
Definition: decoder.cc:5622
GPUStaticInst * decode_OP_SOPP__S_ICACHE_INV(MachInst)
Definition: decoder.cc:9091
GPUStaticInst * decode_OP_SOPC__S_BITCMP1_B32(MachInst)
Definition: decoder.cc:8935
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_D_CL(MachInst)
Definition: decoder.cc:7590
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NE_I16(MachInst)
Definition: decoder.cc:4674
GPUStaticInst * decode_OPU_VOP3__V_CEIL_F32(MachInst)
Definition: decoder.cc:5580
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_CMPSWAP_X2(MachInst)
Definition: decoder.cc:8341
GPUStaticInst * decode_OPU_VOP3__V_MUL_F32(MachInst)
Definition: decoder.cc:5154
GPUStaticInst * decode_OP_DS__DS_OR_RTN_B64(MachInst)
Definition: decoder.cc:6840
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_B_CL(MachInst)
Definition: decoder.cc:7788
GPUStaticInst * decode_OPU_VOP3__V_LSHRREV_B64(MachInst)
Definition: decoder.cc:6270
GPUStaticInst * decode_OP_SOP1__S_XOR_SAVEEXEC_B64(MachInst)
Definition: decoder.cc:8761
GPUStaticInst * decode_OPU_VOP3__V_CMP_LE_I32(MachInst)
Definition: decoder.cc:4758
GPUStaticInst * decode_OPU_VOP3__V_LSHRREV_B32(MachInst)
Definition: decoder.cc:5220
GPUStaticInst * decode_OP_VOPC__V_CMP_NLE_F64(MachInst)
Definition: decoder.cc:10111
GPUStaticInst * decode_OP_VOP1__V_LOG_LEGACY_F32(MachInst)
Definition: decoder.cc:9613
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LT_I64(MachInst)
Definition: decoder.cc:5034
GPUStaticInst * decode_OP_VOPC__V_CMP_LT_F16(MachInst)
Definition: decoder.cc:9661
GPUStaticInst * decode_OP_VOPC__V_CMP_T_U16(MachInst)
Definition: decoder.cc:10321
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4(MachInst)
Definition: decoder.cc:7764
GPUStaticInst * decode_OPU_VOP3__V_FMA_F32(MachInst)
Definition: decoder.cc:5916
GPUStaticInst * decode_OP_SOP1__S_BREV_B32(MachInst)
Definition: decoder.cc:8605
GPUStaticInst * decode_OPU_VOP3__V_LSHLREV_B16(MachInst)
Definition: decoder.cc:5352
GPUStaticInst * decode_OPU_VOP3__V_CMP_LT_I16(MachInst)
Definition: decoder.cc:4554
GPUStaticInst * decode_OP_VOPC__V_CMP_LT_F64(MachInst)
Definition: decoder.cc:10045
GPUStaticInst * decode_OP_SMEM__S_MEMREALTIME(MachInst)
Definition: decoder.cc:8539
GPUStaticInst * decode_OPU_VOP3__V_CMP_TRU_F32(MachInst)
Definition: decoder.cc:4254
GPUStaticInst * decode_OP_VOP1__V_RCP_F64(MachInst)
Definition: decoder.cc:9397
GPUStaticInst * decode_OPU_VOP3__V_SQRT_F64(MachInst)
Definition: decoder.cc:5646
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_SUB_X2(MachInst)
Definition: decoder.cc:8353
GPUStaticInst * decode_OP_VOP2__V_SUBB_U32(MachInst)
Definition: decoder.cc:3408
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_L(MachInst)
Definition: decoder.cc:7596
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_D_CL_O(MachInst)
Definition: decoder.cc:7734
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_DWORDX4(MachInst)
Definition: decoder.cc:8233
GPUStaticInst * decode_OPU_VOP3__V_CMP_NGE_F16(MachInst)
Definition: decoder.cc:4026
GPUStaticInst * decode_OPU_VOP3__V_FLOOR_F64(MachInst)
Definition: decoder.cc:5562
GPUStaticInst * decode_OP_VOPC__V_CMPX_NE_U32(MachInst)
Definition: decoder.cc:10597
GPUStaticInst * decode_OP_SOPC__S_CMP_LG_I32(MachInst)
Definition: decoder.cc:8863
GPUStaticInst * decode_OP_VOPC__V_CMP_GE_I32(MachInst)
Definition: decoder.cc:10459
GPUStaticInst * decode_OPU_VOP3__V_CMP_GT_U64(MachInst)
Definition: decoder.cc:5004
GPUStaticInst * decode_OPU_VOP3__V_CMP_LT_I64(MachInst)
Definition: decoder.cc:4938
GPUStaticInst * decode_OPU_VOP3__V_CMP_NE_I64(MachInst)
Definition: decoder.cc:4962
GPUStaticInst * decode_OP_VOPC__V_CMP_NGT_F16(MachInst)
Definition: decoder.cc:9721
GPUStaticInst * decode_OP_SOPC__S_SET_GPR_IDX_ON(MachInst)
Definition: decoder.cc:8959
GPUStaticInst * decode_OP_DS__DS_CMPST_B32(MachInst)
Definition: decoder.cc:6420
GPUStaticInst * decode_OP_VOPC__V_CMP_TRU_F64(MachInst)
Definition: decoder.cc:10129
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NE_U32(MachInst)
Definition: decoder.cc:4914
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_CMPSWAP(MachInst)
Definition: decoder.cc:7278
GPUStaticInst * decode_OP_DS__DS_SUB_U32(MachInst)
Definition: decoder.cc:6330
GPUStaticInst * decode_OP_SOPP__S_NOP(MachInst)
Definition: decoder.cc:8977
GPUStaticInst * decode_OPU_VOP3__V_MOV_B32(MachInst)
Definition: decoder.cc:5418
GPUStaticInst * decode_OPU_VOP3__V_CMP_GT_I64(MachInst)
Definition: decoder.cc:4956
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_CD_CL(MachInst)
Definition: decoder.cc:7932
GPUStaticInst * decode_OP_SOP2__S_LSHL_B64(MachInst)
Definition: decoder.cc:3720
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NE_I32(MachInst)
Definition: decoder.cc:4866
GPUStaticInst * decode_OP_DS__DS_XOR_RTN_B64(MachInst)
Definition: decoder.cc:6846
GPUStaticInst * decode_OP_VOPC__V_CMPX_U_F32(MachInst)
Definition: decoder.cc:9991
GPUStaticInst * decode_OP_VOPC__V_CMPX_GT_U64(MachInst)
Definition: decoder.cc:10783
GPUStaticInst * decode_OP_SOP1__S_FF0_I32_B64(MachInst)
Definition: decoder.cc:8647
GPUStaticInst * decode_OPU_VOP3__V_MIN_I32(MachInst)
Definition: decoder.cc:5196
GPUStaticInst * decode_OPU_VOP3__V_CMPX_F_F64(MachInst)
Definition: decoder.cc:4452
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NGT_F16(MachInst)
Definition: decoder.cc:4134
GPUStaticInst * decode_OP_VOP1__V_COS_F32(MachInst)
Definition: decoder.cc:9427
GPUStaticInst * decode_OPU_VOP3__V_CMP_LE_F16(MachInst)
Definition: decoder.cc:3990
GPUStaticInst * decode_OP_VOPC__V_CMP_NE_I64(MachInst)
Definition: decoder.cc:10645
GPUStaticInst * decode_OPU_VOP3__V_LOG_F32(MachInst)
Definition: decoder.cc:5604
GPUStaticInst * decode_OPU_VOP3__V_LDEXP_F16(MachInst)
Definition: decoder.cc:5406
GPUStaticInst * decode_OP_VOPC__V_CMP_U_F16(MachInst)
Definition: decoder.cc:9703
GPUStaticInst * decode_OP_VOPC__V_CMPX_LE_U16(MachInst)
Definition: decoder.cc:10393
GPUStaticInst * decode_OPU_VOP3__V_CMP_F_U32(MachInst)
Definition: decoder.cc:4788
GPUStaticInst * decode_OP_SOP2__S_BFE_I32(MachInst)
Definition: decoder.cc:3774
GPUStaticInst * decode_OP_VOP2__V_SUBREV_F32(MachInst)
Definition: decoder.cc:3252
GPUStaticInst * decode_OP_SOP1__S_AND_SAVEEXEC_B64(MachInst)
Definition: decoder.cc:8749
GPUStaticInst * decode_OP_DS__DS_MIN_RTN_F64(MachInst)
Definition: decoder.cc:6888
GPUStaticInst * decode_OP_VOP1__V_RCP_IFLAG_F32(MachInst)
Definition: decoder.cc:9385
GPUStaticInst * decode_OPU_VOP3__V_RCP_F16(MachInst)
Definition: decoder.cc:5754
GPUStaticInst * decode_OP_SMEM__S_LOAD_DWORDX4(MachInst)
Definition: decoder.cc:8425
GPUStaticInst * decode_OP_VOPC__V_CMP_T_I16(MachInst)
Definition: decoder.cc:10273
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_SMAX_X2(MachInst)
Definition: decoder.cc:7386
GPUStaticInst * decode_OP_DS__DS_WRXCHG2ST64_RTN_B32(MachInst)
Definition: decoder.cc:6558
GPUStaticInst * decode_OPU_VOP3__V_MUL_HI_U32_U24(MachInst)
Definition: decoder.cc:5178
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NEQ_F16(MachInst)
Definition: decoder.cc:4146
GPUStaticInst * decode_OPU_VOP3__V_CMP_GE_U64(MachInst)
Definition: decoder.cc:5016
GPUStaticInst * decode_OP_SMEM__S_BUFFER_LOAD_DWORDX16(MachInst)
Definition: decoder.cc:8467
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_XOR_X2(MachInst)
Definition: decoder.cc:7410
GPUStaticInst * decode_OP_SOP2__S_ASHR_I64(MachInst)
Definition: decoder.cc:3744
GPUStaticInst * decode_OPU_VOP3__V_XOR_B32(MachInst)
Definition: decoder.cc:5250
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LE_F16(MachInst)
Definition: decoder.cc:4086
GPUStaticInst * decode_OPU_VOP3__V_CEIL_F64(MachInst)
Definition: decoder.cc:5550
GPUStaticInst * decode_OPU_VOP3__V_CMPX_U_F32(MachInst)
Definition: decoder.cc:4308
GPUStaticInst * decode_OPU_VOP3__V_CMP_T_U64(MachInst)
Definition: decoder.cc:5022
GPUStaticInst * decode_OP_DS__DS_GWS_SEMA_V(MachInst)
Definition: decoder.cc:7032
GPUStaticInst * decode_OPU_VOP3__V_CVT_U32_F64(MachInst)
Definition: decoder.cc:5532
GPUStaticInst * decode_OP_VOP2__V_SUBBREV_U32(MachInst)
Definition: decoder.cc:3414
GPUStaticInst * decode_OP_VOPC__V_CMPX_T_I64(MachInst)
Definition: decoder.cc:10753
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_CL_O(MachInst)
Definition: decoder.cc:7842
GPUStaticInst * decode_OP_DS__DS_SUB_SRC2_U64(MachInst)
Definition: decoder.cc:7080
GPUStaticInst * decode_OP_VOPC__V_CMP_GE_I64(MachInst)
Definition: decoder.cc:10651
GPUStaticInst * decode_OPU_VOP3__V_MAC_F32(MachInst)
Definition: decoder.cc:5256
GPUStaticInst * decode_OP_EXP(MachInst)
Definition: decoder.cc:3930
GPUStaticInst * decode_OPU_VOP3__V_MUL_LO_U16(MachInst)
Definition: decoder.cc:5346
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GE_F64(MachInst)
Definition: decoder.cc:4488
GPUStaticInst * decode_OP_VOPC__V_CMPX_CLASS_F64(MachInst)
Definition: decoder.cc:9637
GPUStaticInst * decode_OP_DS__DS_MSKOR_RTN_B32(MachInst)
Definition: decoder.cc:6540
GPUStaticInst * decode_OP_SOPK__S_MOVK_I32(MachInst)
Definition: decoder.cc:3810
GPUStaticInst * decode_OP_SOPC__S_CMP_LT_U32(MachInst)
Definition: decoder.cc:8917
GPUStaticInst * decode_OP_VOP2__V_MUL_LEGACY_F32(MachInst)
Definition: decoder.cc:3258
GPUStaticInst * decode_OPU_VOP3__V_CLREXCP(MachInst)
Definition: decoder.cc:5724
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_D_O(MachInst)
Definition: decoder.cc:7680
GPUStaticInst * decode_OP_SOP1__S_BCNT0_I32_B64(MachInst)
Definition: decoder.cc:8623
GPUStaticInst * decode_OP_SMEM__S_ATC_PROBE_BUFFER(MachInst)
Definition: decoder.cc:8551
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_C_L(MachInst)
Definition: decoder.cc:7812
GPUStaticInst * decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_D16_X(MachInst)
Definition: decoder.cc:8010
GPUStaticInst * decode_OP_DS__DS_RSUB_RTN_U64(MachInst)
Definition: decoder.cc:6792
GPUStaticInst * decode_OP_VOP1__V_MOV_B32(MachInst)
Definition: decoder.cc:9181
GPUStaticInst * decode_OP_VOPC__V_CMP_F_F32(MachInst)
Definition: decoder.cc:9847
GPUStaticInst * decode_OP_SOP2__S_MAX_U32(MachInst)
Definition: decoder.cc:3600
GPUStaticInst * decode_OPU_VOP3__V_SUBREV_F32(MachInst)
Definition: decoder.cc:5142
GPUStaticInst * decode_OPU_VOP3__V_CMP_F_F32(MachInst)
Definition: decoder.cc:4164
GPUStaticInst * decode_OP_VOPC__V_CMPX_LT_U16(MachInst)
Definition: decoder.cc:10381
GPUStaticInst * decode_OPU_VOP3__V_NOP(MachInst)
Definition: decoder.cc:5412
GPUStaticInst * decode_OP_SOPC__S_CMP_GE_I32(MachInst)
Definition: decoder.cc:8875
GPUStaticInst * decode_OP_SOPP__S_BRANCH(MachInst)
Definition: decoder.cc:8989
GPUStaticInst * decode_OPU_VOP3__V_CMP_F_I64(MachInst)
Definition: decoder.cc:4932
GPUStaticInst * decode_OP_SOP1__S_ORN2_SAVEEXEC_B64(MachInst)
Definition: decoder.cc:8773
GPUStaticInst * decode_OPU_VOP3__V_CVT_F32_F64(MachInst)
Definition: decoder.cc:5496
GPUStaticInst * decode_OP_VOPC__V_CMPX_F_U32(MachInst)
Definition: decoder.cc:10567
GPUStaticInst * decode_OPU_VOP3__V_CMPX_EQ_I32(MachInst)
Definition: decoder.cc:4848
GPUStaticInst * decode_OP_VOPC__V_CMPX_NE_U64(MachInst)
Definition: decoder.cc:10789
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_XY(MachInst)
Definition: decoder.cc:8113
GPUStaticInst * decode_OP_SOP2__S_LSHR_B32(MachInst)
Definition: decoder.cc:3726
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LG_F16(MachInst)
Definition: decoder.cc:4098
GPUStaticInst * decode_OPU_VOP3__V_DIV_FMAS_F32(MachInst)
Definition: decoder.cc:6054
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_DEC(MachInst)
Definition: decoder.cc:7344
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_LZ_O(MachInst)
Definition: decoder.cc:7758
GPUStaticInst * decode_OP_DS__DS_ADD_U32(MachInst)
Definition: decoder.cc:6324
GPUStaticInst * decode_OPU_VOP3__V_CMP_LG_F16(MachInst)
Definition: decoder.cc:4002
GPUStaticInst * decode_OP_VOP1__V_RSQ_F64(MachInst)
Definition: decoder.cc:9403
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LT_I16(MachInst)
Definition: decoder.cc:4650
GPUStaticInst * decode_OPU_VOP3__V_CUBEMA_F32(MachInst)
Definition: decoder.cc:5892
GPUStaticInst * decode_OP_DS__DS_MAX_RTN_F32(MachInst)
Definition: decoder.cc:6582
GPUStaticInst * decode_OPU_VOP3__V_SUBB_U32(MachInst)
Definition: decoder.cc:5286
GPUStaticInst * decode_OP_VOPC__V_CMP_GT_U32(MachInst)
Definition: decoder.cc:10495
static IsaDecodeMethod tableSubDecode_OP_MTBUF[16]
Definition: gpu_decoder.hh:66
GPUStaticInst * decode_OP_DS__DS_MAX_RTN_I64(MachInst)
Definition: decoder.cc:6816
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE(MachInst)
Definition: decoder.cc:7572
GPUStaticInst * decode_OP_VOPC__V_CMP_EQ_U32(MachInst)
Definition: decoder.cc:10483
GPUStaticInst * decode_OPU_VOP3__V_CMPX_F_F16(MachInst)
Definition: decoder.cc:4068
GPUStaticInst * decode_OPU_VOP3__V_COS_F32(MachInst)
Definition: decoder.cc:5658
GPUStaticInst * decode_OP_SMEM__S_DCACHE_WB(MachInst)
Definition: decoder.cc:8515
GPUStaticInst * decode_OP_VOPC__V_CMP_NGE_F64(MachInst)
Definition: decoder.cc:10093
GPUStaticInst * decode_OP_DS__DS_MIN_I64(MachInst)
Definition: decoder.cc:6690
GPUStaticInst * decode_OPU_VOP3__V_MUL_U32_U24(MachInst)
Definition: decoder.cc:5172
GPUStaticInst * decode_OP_VOPC__V_CMP_EQ_I64(MachInst)
Definition: decoder.cc:10627
GPUStaticInst * decode_OP_MTBUF__TBUFFER_STORE_FORMAT_D16_XY(MachInst)
Definition: decoder.cc:8040
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LT_F32(MachInst)
Definition: decoder.cc:4266
GPUStaticInst * decode_OP_VOP1__V_RNDNE_F64(MachInst)
Definition: decoder.cc:9325
GPUStaticInst * decode_OP_SOP1__S_BCNT1_I32_B64(MachInst)
Definition: decoder.cc:8635
GPUStaticInst * decode_OPU_VOP3__V_CMP_NGT_F32(MachInst)
Definition: decoder.cc:4230
GPUStaticInst * decode_OP_VOP1__V_FREXP_MANT_F32(MachInst)
Definition: decoder.cc:9487
GPUStaticInst * decode_OP_VOPC__V_CMP_GT_F64(MachInst)
Definition: decoder.cc:10063
GPUStaticInst * decode_OP_DS__DS_NOP(MachInst)
Definition: decoder.cc:6444
GPUStaticInst * decode_OP_SOP1__S_OR_SAVEEXEC_B64(MachInst)
Definition: decoder.cc:8755
GPUStaticInst * decode_OP_VOP2__V_MAX_I32(MachInst)
Definition: decoder.cc:3312
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LE_I64(MachInst)
Definition: decoder.cc:5046
GPUStaticInst * decode_OPU_VOP3__V_CMPX_F_U64(MachInst)
Definition: decoder.cc:5076
GPUStaticInst * decode_OP_SOP1__S_BCNT0_I32_B32(MachInst)
Definition: decoder.cc:8617
static IsaDecodeMethod tableSubDecode_OP_VINTRP[4]
Definition: gpu_decoder.hh:72
GPUStaticInst * decode_OP_DS__DS_WRITE2ST64_B64(MachInst)
Definition: decoder.cc:6750
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NLT_F64(MachInst)
Definition: decoder.cc:4536
GPUStaticInst * decode_OPU_VOP3__V_CMP_F_U16(MachInst)
Definition: decoder.cc:4596
GPUStaticInst * decode_OP_VOPC__V_CMPX_U_F64(MachInst)
Definition: decoder.cc:10183
GPUStaticInst * decode_OPU_VOP3__V_RCP_F64(MachInst)
Definition: decoder.cc:5628
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NLG_F16(MachInst)
Definition: decoder.cc:4128
GPUStaticInst * decode_OPU_VOP3__V_MAD_LEGACY_F32(MachInst)
Definition: decoder.cc:5850
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_DWORD(MachInst)
Definition: decoder.cc:8179
GPUStaticInst * decode_OP_VOP2__V_SUBREV_U32(MachInst)
Definition: decoder.cc:3396
GPUStaticInst * decode_OPU_VOP3__V_WRITELANE_B32(MachInst)
Definition: decoder.cc:6240
GPUStaticInst * decode_OP_VOP2__V_LSHLREV_B32(MachInst)
Definition: decoder.cc:3342
GPUStaticInst * decode_OP_VOPC__V_CMP_NGE_F16(MachInst)
Definition: decoder.cc:9709
GPUStaticInst * decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_XY(MachInst)
Definition: decoder.cc:7968
GPUStaticInst * decode_OP_DS__DS_AND_B32(MachInst)
Definition: decoder.cc:6378
GPUStaticInst * decode_OP_VOPC__V_CMP_T_U64(MachInst)
Definition: decoder.cc:10705
GPUStaticInst * decode_OP_VOP1__V_CEIL_F64(MachInst)
Definition: decoder.cc:9319
GPUStaticInst * decode_OPU_VOP3__V_MUL_LO_U32(MachInst)
Definition: decoder.cc:6210
GPUStaticInst * decode_OP_VOP2__V_SUBREV_U16(MachInst)
Definition: decoder.cc:3474
GPUStaticInst * decode_OPU_VOP3__V_SUBREV_U16(MachInst)
Definition: decoder.cc:5340
GPUStaticInst * decode_OPU_VOP3__V_MAX_F16(MachInst)
Definition: decoder.cc:5370
GPUStaticInst * decode_OP_DS__DS_MIN_U64(MachInst)
Definition: decoder.cc:6702
GPUStaticInst * decode_OP_SMEM__S_DCACHE_INV_VOL(MachInst)
Definition: decoder.cc:8521
GPUStaticInst * decode_OP_VOP1__V_CVT_F32_I32(MachInst)
Definition: decoder.cc:9205
GPUStaticInst * decode_OP_VOP1__V_FFBH_U32(MachInst)
Definition: decoder.cc:9445
GPUStaticInst * decode_OP_VOPC__V_CMP_GE_U16(MachInst)
Definition: decoder.cc:10315
GPUStaticInst * decode_OP_VOPC__V_CMPX_NLE_F16(MachInst)
Definition: decoder.cc:9823
GPUStaticInst * decode_OP_SOPP__S_CBRANCH_EXECNZ(MachInst)
Definition: decoder.cc:9031
GPUStaticInst * decode_OP_SOP1__S_BREV_B64(MachInst)
Definition: decoder.cc:8611
GPUStaticInst * decode_OPU_VOP3__V_CMP_TRU_F64(MachInst)
Definition: decoder.cc:4446
GPUStaticInst * decode_OP_DS__DS_CMPST_RTN_F32(MachInst)
Definition: decoder.cc:6570
GPUStaticInst * decode_OP_VOP2__V_MUL_I32_I24(MachInst)
Definition: decoder.cc:3270
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GT_F32(MachInst)
Definition: decoder.cc:4284
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_SMIN(MachInst)
Definition: decoder.cc:7296
GPUStaticInst * decode_OP_DS__DS_OR_B64(MachInst)
Definition: decoder.cc:6720
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_FORMAT_X(MachInst)
Definition: decoder.cc:8059
GPUStaticInst * decode_OP_SOPC__S_BITCMP0_B32(MachInst)
Definition: decoder.cc:8929
GPUStaticInst * decode_OP_DS__DS_OR_SRC2_B64(MachInst)
Definition: decoder.cc:7134
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_CL(MachInst)
Definition: decoder.cc:7626
GPUStaticInst * decode_OP_VOP1__V_SQRT_F16(MachInst)
Definition: decoder.cc:9529
GPUStaticInst * decode_OP_SOP2__S_ADD_U32(MachInst)
Definition: decoder.cc:3546
GPUStaticInst * decode_OP_DS__DS_CONDXCHG32_RTN_B64(MachInst)
Definition: decoder.cc:6918
GPUStaticInst * decode_OP_DS__DS_APPEND(MachInst)
Definition: decoder.cc:7062
GPUStaticInst * decode_OP_DS__DS_INC_SRC2_U32(MachInst)
Definition: decoder.cc:6942
GPUStaticInst * decode_OP_SMEM__S_LOAD_DWORDX16(MachInst)
Definition: decoder.cc:8437
GPUStaticInst * decode_OPU_VOP3__V_EXP_LEGACY_F32(MachInst)
Definition: decoder.cc:5838
GPUStaticInst * decode_OP_DS__DS_MAX_SRC2_F32(MachInst)
Definition: decoder.cc:7008
GPUStaticInst * decode_OPU_VOP3__V_BCNT_U32_B32(MachInst)
Definition: decoder.cc:6246
GPUStaticInst * decode_OP_VOPC__V_CMP_NGT_F32(MachInst)
Definition: decoder.cc:9913
GPUStaticInst * decode_OPU_VOP3__V_SUB_U16(MachInst)
Definition: decoder.cc:5334
GPUStaticInst * decode_OP_MIMG__IMAGE_LOAD(MachInst)
Definition: decoder.cc:7428
GPUStaticInst * decode_OP_SOP2__S_ANDN2_B64(MachInst)
Definition: decoder.cc:3660
GPUStaticInst * decode_OP_VOPC__V_CMPX_TRU_F16(MachInst)
Definition: decoder.cc:9841
GPUStaticInst * decode_OP_DS__DS_WRXCHG_RTN_B64(MachInst)
Definition: decoder.cc:6858
GPUStaticInst * decode_OP_VOP2__V_MAX_U16(MachInst)
Definition: decoder.cc:3516
GPUStaticInst * decode_OPU_VOP3__V_ADD_U16(MachInst)
Definition: decoder.cc:5328
GPUStaticInst * decode_OP_VOPC__V_CMPX_LE_I16(MachInst)
Definition: decoder.cc:10345
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_SMAX(MachInst)
Definition: decoder.cc:7308
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_C_B_CL_O(MachInst)
Definition: decoder.cc:7896
GPUStaticInst * decode_OP_SOP1__S_NAND_SAVEEXEC_B64(MachInst)
Definition: decoder.cc:8779
GPUStaticInst * decode_OP_VOP2__V_MAX_I16(MachInst)
Definition: decoder.cc:3522
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GT_U32(MachInst)
Definition: decoder.cc:4908
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_DWORDX2(MachInst)
Definition: decoder.cc:8185
GPUStaticInst * decode_OP_DS__DS_MIN_RTN_I32(MachInst)
Definition: decoder.cc:6498
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_DWORDX2(MachInst)
Definition: decoder.cc:8221
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_O(MachInst)
Definition: decoder.cc:7836
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_SUB_X2(MachInst)
Definition: decoder.cc:7368
GPUStaticInst * decode_OP_VOPC__V_CMPX_GT_U16(MachInst)
Definition: decoder.cc:10399
GPUStaticInst * decode_OP_DS__DS_XOR_B32(MachInst)
Definition: decoder.cc:6390
GPUStaticInst * decode_OP_VOPC__V_CMP_GT_F16(MachInst)
Definition: decoder.cc:9679
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_D(MachInst)
Definition: decoder.cc:7632
GPUStaticInst * decode_OP_DS__DS_ADD_SRC2_F32(MachInst)
Definition: decoder.cc:7014
GPUStaticInst * decode_OP_MTBUF__TBUFFER_STORE_FORMAT_D16_XYZW(MachInst)
Definition: decoder.cc:8052
GPUStaticInst * decode_OP_DS__DS_XOR_B64(MachInst)
Definition: decoder.cc:6726
GPUStaticInst * decode_OP_VOPC__V_CMPX_F_F16(MachInst)
Definition: decoder.cc:9751
GPUStaticInst * decode_OP_VOPC__V_CMPX_F_I64(MachInst)
Definition: decoder.cc:10711
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_SMIN_X2(MachInst)
Definition: decoder.cc:7374
GPUStaticInst * decode_OPU_VOP3__V_CMP_GE_I64(MachInst)
Definition: decoder.cc:4968
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_CD_CL_O(MachInst)
Definition: decoder.cc:7944
GPUStaticInst * decode_OP_SOP2__S_LSHR_B64(MachInst)
Definition: decoder.cc:3732
GPUStaticInst * decode_OPU_VOP3__V_MUL_LEGACY_F32(MachInst)
Definition: decoder.cc:5148
GPUStaticInst * decode_OP_SOPK__S_GETREG_B32(MachInst)
Definition: decoder.cc:3912
GPUStaticInst * decode_OP_DS__DS_MIN_SRC2_U64(MachInst)
Definition: decoder.cc:7116
GPUStaticInst * decode_OP_DS__DS_SUB_U64(MachInst)
Definition: decoder.cc:6666
GPUStaticInst * decode_OPU_VOP3__V_MAX3_F32(MachInst)
Definition: decoder.cc:5964
GPUStaticInst * decode_OP_SOPP__S_CBRANCH_CDBGSYS(MachInst)
Definition: decoder.cc:9115
GPUStaticInst * decode_OP_MIMG__IMAGE_ATOMIC_SMAX(MachInst)
Definition: decoder.cc:7530
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_FORMAT_D16_XYZW(MachInst)
Definition: decoder.cc:8149
GPUStaticInst * decode_OP_FLAT__FLAT_STORE_BYTE(MachInst)
Definition: decoder.cc:7236
GPUStaticInst * decode_OP_VOPC__V_CMPX_F_U64(MachInst)
Definition: decoder.cc:10759
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_DWORD(MachInst)
Definition: decoder.cc:8215
GPUStaticInst * decode_OP_DS__DS_MAX_U64(MachInst)
Definition: decoder.cc:6708
GPUStaticInst * decode_OP_VOP2__V_AND_B32(MachInst)
Definition: decoder.cc:3348
GPUStaticInst * decode_OP_SMEM__S_DCACHE_INV(MachInst)
Definition: decoder.cc:8509
GPUStaticInst * decode_OPU_VOP3__V_CMP_NE_U32(MachInst)
Definition: decoder.cc:4818
GPUStaticInst * decode_OP_VOPC__V_CMPX_NGE_F32(MachInst)
Definition: decoder.cc:9997
GPUStaticInst * decode_OP_DS__DS_MAX_I32(MachInst)
Definition: decoder.cc:6360
GPUStaticInst * decode_OPU_VOP3__V_SUBREV_F16(MachInst)
Definition: decoder.cc:5310
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GT_I32(MachInst)
Definition: decoder.cc:4860
GPUStaticInst * decode_OP_DS__DS_GWS_BARRIER(MachInst)
Definition: decoder.cc:7050
GPUStaticInst * decode_OPU_VOP3__V_OR_B32(MachInst)
Definition: decoder.cc:5244
GPUStaticInst * decode_OPU_VOP3__V_RNDNE_F64(MachInst)
Definition: decoder.cc:5556
GPUStaticInst * decode_OPU_VOP3__V_CMPX_F_U32(MachInst)
Definition: decoder.cc:4884
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_XOR(MachInst)
Definition: decoder.cc:8317
GPUStaticInst * decode_OP_VOPC__V_CMP_CLASS_F32(MachInst)
Definition: decoder.cc:9619
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GT_F16(MachInst)
Definition: decoder.cc:4092
GPUStaticInst * decode_OP_SOP2__S_BFE_U32(MachInst)
Definition: decoder.cc:3768
GPUStaticInst * decode_OP_DS__DS_MAX_F32(MachInst)
Definition: decoder.cc:6438
GPUStaticInst * decode_OP_SOPK__S_CMPK_EQ_I32(MachInst)
Definition: decoder.cc:3822
GPUStaticInst * decode_OP_VOP1__V_CEIL_F16(MachInst)
Definition: decoder.cc:9571
GPUStaticInst * decode_OP_MIMG__IMAGE_LOAD_MIP(MachInst)
Definition: decoder.cc:7434
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_UMAX(MachInst)
Definition: decoder.cc:7314
GPUStaticInst * decode_OP_SOP2__S_NAND_B64(MachInst)
Definition: decoder.cc:3684
GPUStaticInst * decode_OP_VOP1__V_CVT_F32_UBYTE2(MachInst)
Definition: decoder.cc:9289
GPUStaticInst * decode_OPU_VOP3__V_LSHLREV_B32(MachInst)
Definition: decoder.cc:5232
GPUStaticInst * decode_OPU_VOP3__V_DIV_SCALE_F64(MachInst)
Definition: decoder.cc:6048
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GE_F32(MachInst)
Definition: decoder.cc:4296
GPUStaticInst * decode_OP_DS__DS_GWS_SEMA_RELEASE_ALL(MachInst)
Definition: decoder.cc:7020
GPUStaticInst * decode_OP_MTBUF__TBUFFER_STORE_FORMAT_XYZ(MachInst)
Definition: decoder.cc:7998
GPUStaticInst * decode_OP_VOPC__V_CMPX_NLE_F32(MachInst)
Definition: decoder.cc:10015
GPUStaticInst * decode_OP_DS__DS_AND_SRC2_B64(MachInst)
Definition: decoder.cc:7128
GPUStaticInst * decode_OPU_VOP3__V_CMP_GT_F16(MachInst)
Definition: decoder.cc:3996
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NLG_F32(MachInst)
Definition: decoder.cc:4320
GPUStaticInst * decode_OP_MIMG__IMAGE_ATOMIC_SWAP(MachInst)
Definition: decoder.cc:7494
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_XYZ(MachInst)
Definition: decoder.cc:8119
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NLG_F64(MachInst)
Definition: decoder.cc:4512
GPUStaticInst * decode_OP_VOPC__V_CMP_LT_U64(MachInst)
Definition: decoder.cc:10669
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_FORMAT_XYZW(MachInst)
Definition: decoder.cc:8101
GPUStaticInst * decode_OP_SOP2__S_ADDC_U32(MachInst)
Definition: decoder.cc:3570
GPUStaticInst * decode_OP_SOPP__S_SENDMSG(MachInst)
Definition: decoder.cc:9073
GPUStaticInst * decode_OP_SOP2__S_AND_B32(MachInst)
Definition: decoder.cc:3618
GPUStaticInst * decode_OP_DS__DS_SUB_RTN_U64(MachInst)
Definition: decoder.cc:6786
GPUStaticInst * decode_OP_SOP2__S_OR_B32(MachInst)
Definition: decoder.cc:3630
GPUStaticInst * decode_OP_SOP1__S_FF1_I32_B64(MachInst)
Definition: decoder.cc:8659
GPUStaticInst * decode_OP_DS__DS_CONSUME(MachInst)
Definition: decoder.cc:7056
GPUStaticInst * decode_OPU_VOP3__V_FFBL_B32(MachInst)
Definition: decoder.cc:5682
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_DEC(MachInst)
Definition: decoder.cc:8329
GPUStaticInst * decode_OP_DS__DS_WRITE_B8(MachInst)
Definition: decoder.cc:6456
GPUStaticInst * decode_OP_SOPP__S_TTRACEDATA(MachInst)
Definition: decoder.cc:9109
GPUStaticInst * decode_OPU_VOP3__V_INTERP_P1LV_F16(MachInst)
Definition: decoder.cc:6168
GPUStaticInst * decode_OP_VOP1__V_FLOOR_F64(MachInst)
Definition: decoder.cc:9331
GPUStaticInst * decode_OP_VOPC__V_CMP_LE_I32(MachInst)
Definition: decoder.cc:10441
GPUStaticInst * decode_OP_SMEM__S_ATC_PROBE(MachInst)
Definition: decoder.cc:8545
GPUStaticInst * decode_OP_DS__DS_DEC_SRC2_U64(MachInst)
Definition: decoder.cc:7098
GPUStaticInst * decode_OPU_VOP3__V_ASHRREV_I32(MachInst)
Definition: decoder.cc:5226
GPUStaticInst * decode_OP_VOPC__V_CMP_EQ_I16(MachInst)
Definition: decoder.cc:10243
GPUStaticInst * decode_OPU_VOP3__V_CMPX_O_F32(MachInst)
Definition: decoder.cc:4302
GPUStaticInst * decode_OP_VOPC__V_CMPX_TRU_F64(MachInst)
Definition: decoder.cc:10225
GPUStaticInst * decode_OPU_VOP3__V_READLANE_B32(MachInst)
Definition: decoder.cc:6234
GPUStaticInst * decode_OP_VOP1__V_FRACT_F64(MachInst)
Definition: decoder.cc:9475
GPUStaticInst * decode_OPU_VOP3__V_LOG_F16(MachInst)
Definition: decoder.cc:5772
GPUStaticInst * decode_OP_VOPC__V_CMPX_GT_I64(MachInst)
Definition: decoder.cc:10735
GPUStaticInst * decode_OP_DS__DS_WRITE_B64(MachInst)
Definition: decoder.cc:6738
GPUStaticInst * subDecode_OP_MTBUF(MachInst)
Definition: decoder.cc:3218
GPUStaticInst * decode_OP_DS__DS_AND_RTN_B32(MachInst)
Definition: decoder.cc:6522
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_UBYTE(MachInst)
Definition: decoder.cc:8155
GPUStaticInst * decode_OP_SOPP__S_CBRANCH_VCCNZ(MachInst)
Definition: decoder.cc:9019
GPUStaticInst * decode_OPU_VOP3__V_MIN3_U32(MachInst)
Definition: decoder.cc:5958
GPUStaticInst * decode_OP_DS__DS_WRITE2_B64(MachInst)
Definition: decoder.cc:6744
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_O(MachInst)
Definition: decoder.cc:7668
GPUStaticInst * decode_OP_VOPC__V_CMPX_LT_F64(MachInst)
Definition: decoder.cc:10141
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_LZ_O(MachInst)
Definition: decoder.cc:7866
GPUStaticInst * decode_OP_SOPC__S_CMP_LG_U32(MachInst)
Definition: decoder.cc:8899
GPUStaticInst * decode_OPU_VOP3__V_CMP_F_F16(MachInst)
Definition: decoder.cc:3972
GPUStaticInst * decode_OPU_VOP3__V_CMP_CLASS_F32(MachInst)
Definition: decoder.cc:3936
GPUStaticInst * decode_OPU_VOP3__V_CVT_PKRTZ_F16_F32(MachInst)
Definition: decoder.cc:6306
GPUStaticInst * decode_OPU_VOP3__V_MAX_I16(MachInst)
Definition: decoder.cc:5388
GPUStaticInst * decode_OP_DS__DS_MSKOR_RTN_B64(MachInst)
Definition: decoder.cc:6852
GPUStaticInst * decode_OPU_VOP3__V_CMPX_F_I64(MachInst)
Definition: decoder.cc:5028
GPUStaticInst * decode_OPU_VOP3__V_CVT_U16_F16(MachInst)
Definition: decoder.cc:5742
GPUStaticInst * decode_OPU_VOP3__V_CMPX_CLASS_F16(MachInst)
Definition: decoder.cc:3966
GPUStaticInst * decode_OP_SOP1__S_BITSET1_B64(MachInst)
Definition: decoder.cc:8719
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LE_F64(MachInst)
Definition: decoder.cc:4470
GPUStaticInst * decode_OP_VOP2__V_SUB_F32(MachInst)
Definition: decoder.cc:3246
GPUStaticInst * decode_OP_VOPC__V_CMPX_LE_F32(MachInst)
Definition: decoder.cc:9961
GPUStaticInst * decode_OP_DS__DS_READ_B96(MachInst)
Definition: decoder.cc:7176
GPUStaticInst * decode_OP_SOPK__S_SETREG_B32(MachInst)
Definition: decoder.cc:3918
GPUStaticInst * decode_OP_VOPC__V_CMP_EQ_U16(MachInst)
Definition: decoder.cc:10291
GPUStaticInst * decode_OPU_VOP3__V_CMP_GT_U32(MachInst)
Definition: decoder.cc:4812
GPUStaticInst * decode_OP_VOPC__V_CMP_NLG_F32(MachInst)
Definition: decoder.cc:9907
GPUStaticInst * decode_OPU_VOP3__V_CMP_T_U16(MachInst)
Definition: decoder.cc:4638
GPUStaticInst * decode_OPU_VOP3__V_LSHLREV_B64(MachInst)
Definition: decoder.cc:6264
GPUStaticInst * decode_OPU_VOP3__V_CMP_GT_I16(MachInst)
Definition: decoder.cc:4572
GPUStaticInst * decode_OPU_VOP3__V_FREXP_EXP_I16_F16(MachInst)
Definition: decoder.cc:5790
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_B_CL(MachInst)
Definition: decoder.cc:7608
GPUStaticInst * decode_OP_SOP1__S_BCNT1_I32_B32(MachInst)
Definition: decoder.cc:8629
GPUStaticInst * decode_OPU_VOP3__V_CMP_F_I16(MachInst)
Definition: decoder.cc:4548
GPUStaticInst * decode_OP_MUBUF__BUFFER_WBINVL1_VOL(MachInst)
Definition: decoder.cc:8251
GPUStaticInst * decode_OP_DS__DS_READ2_B64(MachInst)
Definition: decoder.cc:6906
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_B_CL_O(MachInst)
Definition: decoder.cc:7704
GPUStaticInst * decode_OPU_VOP3__V_INTERP_P1LL_F16(MachInst)
Definition: decoder.cc:6162
GPUStaticInst * decode_OP_DS__DS_DEC_U32(MachInst)
Definition: decoder.cc:6348
GPUStaticInst * decode_OPU_VOP3__V_SUB_U32(MachInst)
Definition: decoder.cc:5268
GPUStaticInst * decode_OP_DS__DS_MAX_RTN_I32(MachInst)
Definition: decoder.cc:6504
GPUStaticInst * decode_OP_SOP1__S_SEXT_I32_I8(MachInst)
Definition: decoder.cc:8689
GPUStaticInst * decode_OP_VOP1__V_CVT_F16_F32(MachInst)
Definition: decoder.cc:9235
GPUStaticInst * decode_OP_VOP2__V_MADAK_F32(MachInst)
Definition: decoder.cc:3378
GPUStaticInst * decode_OP_VOP2__V_LSHRREV_B32(MachInst)
Definition: decoder.cc:3330
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_LZ(MachInst)
Definition: decoder.cc:7662
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GE_I16(MachInst)
Definition: decoder.cc:4680
GPUStaticInst * decode_OP_SOPK__S_CMPK_LE_U32(MachInst)
Definition: decoder.cc:3888
GPUStaticInst * decode_OP_SOP1__S_BITSET0_B64(MachInst)
Definition: decoder.cc:8707
GPUStaticInst * subDecode_OP_SOPC(MachInst)
Definition: decoder.cc:3154
GPUStaticInst * decode_OPU_VOP3__V_CMP_NE_U64(MachInst)
Definition: decoder.cc:5010
GPUStaticInst * decode_OP_MIMG__IMAGE_ATOMIC_SUB(MachInst)
Definition: decoder.cc:7512
GPUStaticInst * decode_OPU_VOP3__V_CMP_LE_U32(MachInst)
Definition: decoder.cc:4806
GPUStaticInst * decode_OP_VOP1__V_RNDNE_F16(MachInst)
Definition: decoder.cc:9583
GPUStaticInst * decode_OPU_VOP3__V_MAD_I16(MachInst)
Definition: decoder.cc:6114
GPUStaticInst * decode_OP_VOPC__V_CMP_F_F64(MachInst)
Definition: decoder.cc:10039
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NLE_F16(MachInst)
Definition: decoder.cc:4140
GPUStaticInst * decode_OP_VOPC__V_CMP_NEQ_F64(MachInst)
Definition: decoder.cc:10117
GPUStaticInst * decode_OP_VOP1__V_LOG_F32(MachInst)
Definition: decoder.cc:9373
GPUStaticInst * decode_OP_VOPC__V_CMPX_GE_F64(MachInst)
Definition: decoder.cc:10171
GPUStaticInst * decode_OP_FLAT__FLAT_LOAD_SBYTE(MachInst)
Definition: decoder.cc:7194
GPUStaticInst * decode_OPU_VOP3__V_CVT_PK_U16_U32(MachInst)
Definition: decoder.cc:6312
GPUStaticInst * decode_OP_DS__DS_READ_B128(MachInst)
Definition: decoder.cc:7182
GPUStaticInst * decode_OP_VOPC__V_CMP_CLASS_F64(MachInst)
Definition: decoder.cc:9631
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NE_U64(MachInst)
Definition: decoder.cc:5106
GPUStaticInst * decode_OP_DS__DS_CMPST_F64(MachInst)
Definition: decoder.cc:6762
GPUStaticInst * decode_OP_VOPC__V_CMPX_LT_F32(MachInst)
Definition: decoder.cc:9949
GPUStaticInst * decode_OPU_VOP3__V_CMP_EQ_F32(MachInst)
Definition: decoder.cc:4176
GPUStaticInst * decode_OP_VOP1__V_CVT_I16_F16(MachInst)
Definition: decoder.cc:9517
GPUStaticInst * decode_OP_VOPC__V_CMPX_GT_I32(MachInst)
Definition: decoder.cc:10543
GPUStaticInst * decode_OP_SMEM__S_BUFFER_LOAD_DWORD(MachInst)
Definition: decoder.cc:8443
GPUStaticInst * decode_OP_DS__DS_AND_SRC2_B32(MachInst)
Definition: decoder.cc:6978
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_FORMAT_D16_X(MachInst)
Definition: decoder.cc:8107
static IsaDecodeMethod tableSubDecode_OP_SOP1[256]
Definition: gpu_decoder.hh:69
GPUStaticInst * decode_OPU_VOP3__V_MAD_F16(MachInst)
Definition: decoder.cc:6102
GPUStaticInst * decode_OP_VOPC__V_CMP_NEQ_F16(MachInst)
Definition: decoder.cc:9733
GPUStaticInst * decode_OPU_VOP3__V_RSQ_F16(MachInst)
Definition: decoder.cc:5766
GPUStaticInst * decode_OPU_VOP3__V_CVT_F32_UBYTE0(MachInst)
Definition: decoder.cc:5508
GPUStaticInst * decode_OP_VOP1__V_CVT_F64_I32(MachInst)
Definition: decoder.cc:9199
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NGT_F64(MachInst)
Definition: decoder.cc:4518
GPUStaticInst * decode_OP_VOP1__V_CVT_RPI_I32_F32(MachInst)
Definition: decoder.cc:9247
GPUStaticInst * subDecode_OPU_VOP3(MachInst)
Definition: decoder.cc:3178
GPUStaticInst * decode_OP_DS__DS_READ2_B32(MachInst)
Definition: decoder.cc:6606
GPUStaticInst * decode_OPU_VOP3__V_CVT_F32_I32(MachInst)
Definition: decoder.cc:5436
GPUStaticInst * decode_OPU_VOP3__V_INTERP_P2_F16(MachInst)
Definition: decoder.cc:6174
GPUStaticInst * decode_OP_DS__DS_ADD_F32(MachInst)
Definition: decoder.cc:6450
GPUStaticInst * decode_OP_VOPC__V_CMP_LT_I32(MachInst)
Definition: decoder.cc:10429
GPUStaticInst * decode_OPU_VOP3__V_FMA_F64(MachInst)
Definition: decoder.cc:5922
GPUStaticInst * decode_OP_VOP2__V_MUL_F32(MachInst)
Definition: decoder.cc:3264
GPUStaticInst * decode_OPU_VOP3__V_TRUNC_F64(MachInst)
Definition: decoder.cc:5544
GPUStaticInst * decode_OPU_VOP3__V_CMPX_F_F32(MachInst)
Definition: decoder.cc:4260
GPUStaticInst * decode_OP_VOP1__V_TRUNC_F32(MachInst)
Definition: decoder.cc:9343
GPUStaticInst * decode_OP_SOP2__S_ASHR_I32(MachInst)
Definition: decoder.cc:3738
GPUStaticInst * decode_OPU_VOP3__V_CMP_EQ_I64(MachInst)
Definition: decoder.cc:4944
GPUStaticInst * decode_OP_SOP2__S_BFM_B64(MachInst)
Definition: decoder.cc:3756
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_OR_X2(MachInst)
Definition: decoder.cc:8389
GPUStaticInst * decode_OPU_VOP3__V_INTERP_P2_F32(MachInst)
Definition: decoder.cc:6150
GPUStaticInst * decode_OPU_VOP3__V_CMP_LG_F32(MachInst)
Definition: decoder.cc:4194
GPUStaticInst * decode_OP_FLAT__FLAT_LOAD_USHORT(MachInst)
Definition: decoder.cc:7200
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NGE_F64(MachInst)
Definition: decoder.cc:4506
GPUStaticInst * decode_OP_VOPC__V_CMP_NGE_F32(MachInst)
Definition: decoder.cc:9901
GPUStaticInst * decode_OP_DS__DS_AND_RTN_B64(MachInst)
Definition: decoder.cc:6834
GPUStaticInst * decode_OPU_VOP3__V_LOG_LEGACY_F32(MachInst)
Definition: decoder.cc:5844
GPUStaticInst * decode_OP_VOP2__V_ADD_U16(MachInst)
Definition: decoder.cc:3462
GPUStaticInst * decode_OP_SOP1__S_MOV_B32(MachInst)
Definition: decoder.cc:8557
GPUStaticInst * decode_OP_VOPC__V_CMP_GT_I32(MachInst)
Definition: decoder.cc:10447
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_D_O(MachInst)
Definition: decoder.cc:7728
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NEQ_F32(MachInst)
Definition: decoder.cc:4338
GPUStaticInst * decode_OP_SMEM__S_BUFFER_LOAD_DWORDX8(MachInst)
Definition: decoder.cc:8461
GPUStaticInst * decode_OP_SOP2__S_SUB_U32(MachInst)
Definition: decoder.cc:3552
GPUStaticInst * decode_OP_VOPC__V_CMPX_NGT_F16(MachInst)
Definition: decoder.cc:9817
GPUStaticInst * decode_OP_SOP1__S_NOR_SAVEEXEC_B64(MachInst)
Definition: decoder.cc:8785
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_CMPSWAP_X2(MachInst)
Definition: decoder.cc:7356
GPUStaticInst * decode_OPU_VOP3__V_CVT_F64_I32(MachInst)
Definition: decoder.cc:5430
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_D_CL(MachInst)
Definition: decoder.cc:7638
GPUStaticInst * decode_OP_VOPC__V_CMP_CLASS_F16(MachInst)
Definition: decoder.cc:9643
GPUStaticInst * decode_OP_VOPC__V_CMPX_T_I16(MachInst)
Definition: decoder.cc:10369
GPUStaticInst * decode_OPU_VOP3__V_CMP_GT_U16(MachInst)
Definition: decoder.cc:4620
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GT_U64(MachInst)
Definition: decoder.cc:5100
GPUStaticInst * decode_OP_VOPC__V_CMP_GT_U16(MachInst)
Definition: decoder.cc:10303
GPUStaticInst * decode_OPU_VOP3__V_CUBETC_F32(MachInst)
Definition: decoder.cc:5886
GPUStaticInst * decode_OPU_VOP3__V_CVT_F32_U32(MachInst)
Definition: decoder.cc:5442
GPUStaticInst * decode_OP_VOP2__V_MUL_HI_U32_U24(MachInst)
Definition: decoder.cc:3288
GPUStaticInst * decode_OPU_VOP3__V_FREXP_EXP_I32_F64(MachInst)
Definition: decoder.cc:5694
GPUStaticInst * decode_OPU_VOP3__V_MBCNT_LO_U32_B32(MachInst)
Definition: decoder.cc:6252
static IsaDecodeMethod tableDecodePrimary[512]
Definition: gpu_decoder.hh:61
GPUStaticInst * decode_OPU_VOP3__V_FMA_F16(MachInst)
Definition: decoder.cc:6126
GPUStaticInst * decode_OP_VOP1__V_FFBH_I32(MachInst)
Definition: decoder.cc:9457
GPUStaticInst * decode_OPU_VOP3__V_FREXP_MANT_F32(MachInst)
Definition: decoder.cc:5718
GPUStaticInst * decode_OP_SOP2__S_SUBB_U32(MachInst)
Definition: decoder.cc:3576
GPUStaticInst * decode_OP_DS__DS_CMPST_RTN_B64(MachInst)
Definition: decoder.cc:6876
GPUStaticInst * decode_OP_DS__DS_CMPST_B64(MachInst)
Definition: decoder.cc:6756
GPUStaticInst * decode_OP_FLAT__FLAT_LOAD_DWORD(MachInst)
Definition: decoder.cc:7212
GPUStaticInst * decode_OP_VOPC__V_CMP_LE_U32(MachInst)
Definition: decoder.cc:10489
GPUStaticInst * decode_OP_DS__DS_MSKOR_B32(MachInst)
Definition: decoder.cc:6396
GPUStaticInst * decode_OP_SOP1__S_BITSET0_B32(MachInst)
Definition: decoder.cc:8701
GPUStaticInst * decode_OP_VOPC__V_CMP_NGT_F64(MachInst)
Definition: decoder.cc:10105
GPUStaticInst * decode_OP_SMEM__S_LOAD_DWORDX2(MachInst)
Definition: decoder.cc:8419
GPUStaticInst * decode_OP_SOP1__S_CMOV_B32(MachInst)
Definition: decoder.cc:8569
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LE_U32(MachInst)
Definition: decoder.cc:4902
GPUStaticInst * decode_OP_VOPC__V_CMPX_TRU_F32(MachInst)
Definition: decoder.cc:10033
GPUStaticInst * decode_OP_SOP1__S_QUADMASK_B64(MachInst)
Definition: decoder.cc:8803
GPUStaticInst * decode_OPU_VOP3__V_CMPX_EQ_U64(MachInst)
Definition: decoder.cc:5088
GPUStaticInst * decode_OP_VOPC__V_CMPX_NLE_F64(MachInst)
Definition: decoder.cc:10207
GPUStaticInst * decode_OP_SOP1__S_MOVRELD_B64(MachInst)
Definition: decoder.cc:8827
GPUStaticInst * decode_OP_VOP1__V_RCP_F32(MachInst)
Definition: decoder.cc:9379
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LG_F64(MachInst)
Definition: decoder.cc:4482
GPUStaticInst * decode_OP_VOPC__V_CMPX_EQ_I64(MachInst)
Definition: decoder.cc:10723
GPUStaticInst * decode_OP_VOPC__V_CMP_GE_U32(MachInst)
Definition: decoder.cc:10507
GPUStaticInst * decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_XYZ(MachInst)
Definition: decoder.cc:7974
GPUStaticInst * decode_OP_FLAT__FLAT_STORE_DWORDX3(MachInst)
Definition: decoder.cc:7260
GPUStaticInst * decode_OP_SOP2__S_XOR_B32(MachInst)
Definition: decoder.cc:3642
GPUStaticInst * decode_OPU_VOP3__V_CMP_U_F32(MachInst)
Definition: decoder.cc:4212
GPUStaticInst * decode_OPU_VOP3__V_SQRT_F16(MachInst)
Definition: decoder.cc:5760
GPUStaticInst * decode_OP_DS__DS_MAX_SRC2_I64(MachInst)
Definition: decoder.cc:7110
GPUStaticInst * decode_OPU_VOP3__V_BFM_B32(MachInst)
Definition: decoder.cc:6288
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C(MachInst)
Definition: decoder.cc:7620
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_FORMAT_XYZ(MachInst)
Definition: decoder.cc:8071
GPUStaticInst * decode_OPU_VOP3__V_CVT_I32_F64(MachInst)
Definition: decoder.cc:5424
GPUStaticInst * decode_OPU_VOP3__V_CMPX_EQ_I16(MachInst)
Definition: decoder.cc:4656
GPUStaticInst * decode_OP_DS__DS_WRXCHG2_RTN_B64(MachInst)
Definition: decoder.cc:6864
GPUStaticInst * decode_OP_VOPC__V_CMP_LE_I64(MachInst)
Definition: decoder.cc:10633
GPUStaticInst * decode_OP_VOPC__V_CMPX_EQ_U64(MachInst)
Definition: decoder.cc:10771
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_ADD_X2(MachInst)
Definition: decoder.cc:7362
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_B(MachInst)
Definition: decoder.cc:7602
GPUStaticInst * decode_OPU_VOP3__V_MUL_HI_I32(MachInst)
Definition: decoder.cc:6222
GPUStaticInst * decode_OP_SOPK__S_CMPK_EQ_U32(MachInst)
Definition: decoder.cc:3858
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_UMIN(MachInst)
Definition: decoder.cc:7302
GPUStaticInst * decode_OPU_VOP3__V_SAD_U16(MachInst)
Definition: decoder.cc:6012
GPUStaticInst * decode_OP_DS__DS_READ2ST64_B64(MachInst)
Definition: decoder.cc:6912
GPUStaticInst * decode_OPU_VOP3__V_CMP_U_F64(MachInst)
Definition: decoder.cc:4404
GPUStaticInst * decode_OP_VOP1__V_CEIL_F32(MachInst)
Definition: decoder.cc:9349
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_XOR_X2(MachInst)
Definition: decoder.cc:8395
GPUStaticInst * decode_OPU_VOP3__V_MUL_F16(MachInst)
Definition: decoder.cc:5316
GPUStaticInst * decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_D16_XYZW(MachInst)
Definition: decoder.cc:8028
GPUStaticInst * decode_OP_DS__DS_MIN_SRC2_F32(MachInst)
Definition: decoder.cc:7002
GPUStaticInst * decode_OP_SOP1__S_WQM_B64(MachInst)
Definition: decoder.cc:8599
GPUStaticInst * decode_OP_DS__DS_WRITE2_B32(MachInst)
Definition: decoder.cc:6408
GPUStaticInst * decode_OP_SMEM__S_STORE_DWORDX4(MachInst)
Definition: decoder.cc:8485
GPUStaticInst * decode_OP_DS__DS_XOR_SRC2_B32(MachInst)
Definition: decoder.cc:6990
GPUStaticInst * decode_OP_VOPC__V_CMP_T_I64(MachInst)
Definition: decoder.cc:10657
GPUStaticInst * decode_OPU_VOP3__V_CMP_EQ_I32(MachInst)
Definition: decoder.cc:4752
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_UMIN(MachInst)
Definition: decoder.cc:8287
GPUStaticInst * decode_OP_DS__DS_WRXCHG2ST64_RTN_B64(MachInst)
Definition: decoder.cc:6870
GPUStaticInst * decode_OP_DS__DS_MIN_RTN_I64(MachInst)
Definition: decoder.cc:6810
GPUStaticInst * decode_OP_VOP1__V_EXP_F32(MachInst)
Definition: decoder.cc:9367
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LT_F64(MachInst)
Definition: decoder.cc:4458
GPUStaticInst * decode_OP_SOP2__S_BFE_U64(MachInst)
Definition: decoder.cc:3780
GPUStaticInst * decode_OP_SOPP__S_ENDPGM_SAVED(MachInst)
Definition: decoder.cc:9139
GPUStaticInst * decode_OP_VOPC__V_CMPX_F_F64(MachInst)
Definition: decoder.cc:10135
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GT_I16(MachInst)
Definition: decoder.cc:4668
GPUStaticInst * decode_OP_DS__DS_MIN_RTN_U32(MachInst)
Definition: decoder.cc:6510
GPUStaticInst * decode_OP_VOP2__V_SUB_U32(MachInst)
Definition: decoder.cc:3390
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_SHORT(MachInst)
Definition: decoder.cc:8209
GPUStaticInst * decode_OP_VOP2__V_MUL_LO_U16(MachInst)
Definition: decoder.cc:3480
GPUStaticInst * decode_OP_DS__DS_WRXCHG_RTN_B32(MachInst)
Definition: decoder.cc:6546
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_UMAX_X2(MachInst)
Definition: decoder.cc:7392
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_SMAX_X2(MachInst)
Definition: decoder.cc:8371
GPUStaticInst * decode_OPU_VOP3__V_SUBREV_U32(MachInst)
Definition: decoder.cc:5274
GPUStaticInst * decode_OPU_VOP3__V_CMP_NGE_F64(MachInst)
Definition: decoder.cc:4410
GPUStaticInst * decode_OP_SOPK__S_CMOVK_I32(MachInst)
Definition: decoder.cc:3816
GPUStaticInst * decode_OP_MIMG__IMAGE_STORE(MachInst)
Definition: decoder.cc:7464
GPUStaticInst * decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_D16_XY(MachInst)
Definition: decoder.cc:8016
GPUStaticInst * decode_OP_VOPC__V_CMP_F_U16(MachInst)
Definition: decoder.cc:10279
GPUStaticInst * decode_OPU_VOP3__V_CMP_LT_U32(MachInst)
Definition: decoder.cc:4794
GPUStaticInst * decode_OPU_VOP3__V_SQRT_F32(MachInst)
Definition: decoder.cc:5640
GPUStaticInst * decode_OPU_VOP3__V_SIN_F16(MachInst)
Definition: decoder.cc:5826
GPUStaticInst * decode_OP_VOP2__V_MADAK_F16(MachInst)
Definition: decoder.cc:3456
GPUStaticInst * decode_OPU_VOP3__V_CMP_GT_I32(MachInst)
Definition: decoder.cc:4764
GPUStaticInst * decode_OP_DS__DS_MIN_I32(MachInst)
Definition: decoder.cc:6354
GPUStaticInst * decode_OP_VOPC__V_CMPX_NEQ_F32(MachInst)
Definition: decoder.cc:10021
GPUStaticInst * decode_OP_SOP1__S_WQM_B32(MachInst)
Definition: decoder.cc:8593
GPUStaticInst * decode_OPU_VOP3__V_MIN_F64(MachInst)
Definition: decoder.cc:6192
GPUStaticInst * decode_OPU_VOP3__V_CMP_EQ_U64(MachInst)
Definition: decoder.cc:4992
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_D(MachInst)
Definition: decoder.cc:7584
GPUStaticInst * decode_OPU_VOP3__V_CMPX_EQ_U16(MachInst)
Definition: decoder.cc:4704
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_SSHORT(MachInst)
Definition: decoder.cc:8173
GPUStaticInst * decode_OP_DS__DS_MIN_RTN_U64(MachInst)
Definition: decoder.cc:6822
GPUStaticInst * decode_OPU_VOP3__V_MUL_HI_I32_I24(MachInst)
Definition: decoder.cc:5166
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LG_F32(MachInst)
Definition: decoder.cc:4290
GPUStaticInst * decode_OP_DS__DS_MAX_U32(MachInst)
Definition: decoder.cc:6372
GPUStaticInst * decode_OP_SOPP__S_WAITCNT(MachInst)
Definition: decoder.cc:9049
GPUStaticInst * decode_OP_SOPK__S_CBRANCH_I_FORK(MachInst)
Definition: decoder.cc:3906
GPUStaticInst * decode_OPU_VOP3__V_FFBH_I32(MachInst)
Definition: decoder.cc:5688
GPUStaticInst * decode_OP_DS__DS_MAX_RTN_F64(MachInst)
Definition: decoder.cc:6894
GPUStaticInst * decode_OPU_VOP3__V_NOT_B32(MachInst)
Definition: decoder.cc:5664
GPUStaticInst * decode_OP_DS__DS_RSUB_SRC2_U32(MachInst)
Definition: decoder.cc:6936
static IsaDecodeMethod tableSubDecode_OP_MUBUF[128]
Definition: gpu_decoder.hh:67
GPUStaticInst * decode_OP_VOP1__V_RNDNE_F32(MachInst)
Definition: decoder.cc:9355
GPUStaticInst * decode_OPU_VOP3__V_MAX_F32(MachInst)
Definition: decoder.cc:5190
GPUStaticInst * decode_OPU_VOP3__V_MIN_U16(MachInst)
Definition: decoder.cc:5394
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_UMAX(MachInst)
Definition: decoder.cc:8299
GPUStaticInst * decode_OPU_VOP3__V_CMP_LE_F32(MachInst)
Definition: decoder.cc:4182
GPUStaticInst * decode_OP_VOPC__V_CMPX_LE_I32(MachInst)
Definition: decoder.cc:10537
GPUStaticInst * decode_OP_MUBUF__BUFFER_LOAD_FORMAT_XYZW(MachInst)
Definition: decoder.cc:8077
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_B_O(MachInst)
Definition: decoder.cc:7746
GPUStaticInst * decode_OP_VOP1__V_LOG_F16(MachInst)
Definition: decoder.cc:9541
GPUStaticInst * decode_OP_VOP1__V_FREXP_EXP_I32_F32(MachInst)
Definition: decoder.cc:9481
GPUStaticInst * decode_OP_SOPP__S_CBRANCH_VCCZ(MachInst)
Definition: decoder.cc:9013
GPUStaticInst * decode_OPU_VOP3__V_CMP_NGT_F16(MachInst)
Definition: decoder.cc:4038
GPUStaticInst * decode_OP_VOPC__V_CMPX_GE_U64(MachInst)
Definition: decoder.cc:10795
GPUStaticInst * decode_OPU_VOP3__V_RNDNE_F32(MachInst)
Definition: decoder.cc:5586
GPUStaticInst * decode_OP_VOPC__V_CMP_LT_U32(MachInst)
Definition: decoder.cc:10477
GPUStaticInst * decode_OPU_VOP3__V_MIN_U32(MachInst)
Definition: decoder.cc:5208
GPUStaticInst * decode_OP_VOPC__V_CMPX_LE_U32(MachInst)
Definition: decoder.cc:10585
GPUStaticInst * decode_OP_DS__DS_MAX_SRC2_I32(MachInst)
Definition: decoder.cc:6960
GPUStaticInst * decode_OP_VOPC__V_CMPX_LT_U32(MachInst)
Definition: decoder.cc:10573
GPUStaticInst * decode_OP_SOPC__S_SETVSKIP(MachInst)
Definition: decoder.cc:8953
GPUStaticInst * decode_OP_DS__DS_DEC_RTN_U32(MachInst)
Definition: decoder.cc:6492
GPUStaticInst * decode_OP_VOP2__V_MADMK_F16(MachInst)
Definition: decoder.cc:3450
GPUStaticInst * decode_OPU_VOP3__V_CVT_U32_F32(MachInst)
Definition: decoder.cc:5448
GPUStaticInst * decode_OP_MIMG__IMAGE_ATOMIC_UMIN(MachInst)
Definition: decoder.cc:7524
GPUStaticInst * decode_OP_VOPC__V_CMP_NLE_F32(MachInst)
Definition: decoder.cc:9919
GPUStaticInst * decode_OP_VOPC__V_CMP_EQ_U64(MachInst)
Definition: decoder.cc:10675
GPUStaticInst * decode_OPU_VOP3__V_DIV_FMAS_F64(MachInst)
Definition: decoder.cc:6060
GPUStaticInst * decode_OP_DS__DS_MAX_RTN_U32(MachInst)
Definition: decoder.cc:6516
GPUStaticInst * decode_OP_VOPC__V_CMPX_GE_U16(MachInst)
Definition: decoder.cc:10411
GPUStaticInst * decode_OP_VOPC__V_CMPX_NLG_F64(MachInst)
Definition: decoder.cc:10195
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_B(MachInst)
Definition: decoder.cc:7650
GPUStaticInst * subDecode_OP_SOP1(MachInst)
Definition: decoder.cc:3146
GPUStaticInst * decode_OPU_VOP3__V_CMP_GE_F16(MachInst)
Definition: decoder.cc:4008
GPUStaticInst * decode_OPU_VOP3__V_CMP_TRU_F16(MachInst)
Definition: decoder.cc:4062
GPUStaticInst * decode_OP_DS__DS_MIN_U32(MachInst)
Definition: decoder.cc:6366
GPUStaticInst * decode_OP_DS__DS_READ_U16(MachInst)
Definition: decoder.cc:6636
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_UMIN_X2(MachInst)
Definition: decoder.cc:8365
GPUStaticInst * decode_OP_VOPC__V_CMPX_EQ_F16(MachInst)
Definition: decoder.cc:9763
GPUStaticInst * decode_OP_VOP1__V_SQRT_F32(MachInst)
Definition: decoder.cc:9409
GPUStaticInst * decode_OP_FLAT__FLAT_LOAD_SSHORT(MachInst)
Definition: decoder.cc:7206
GPUStaticInst * decode_OP_MIMG__IMAGE_ATOMIC_CMPSWAP(MachInst)
Definition: decoder.cc:7500
GPUStaticInst * decode_OP_VOPC__V_CMPX_EQ_F32(MachInst)
Definition: decoder.cc:9955
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_DEC_X2(MachInst)
Definition: decoder.cc:7422
GPUStaticInst * subDecode_OP_DS(MachInst)
Definition: decoder.cc:3194
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_ADD(MachInst)
Definition: decoder.cc:7284
GPUStaticInst * decode_OPU_VOP3__V_MAD_U64_U32(MachInst)
Definition: decoder.cc:6090
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_CL_O(MachInst)
Definition: decoder.cc:7722
GPUStaticInst * decode_OP_VOPC__V_CMP_U_F64(MachInst)
Definition: decoder.cc:10087
GPUStaticInst * decode_OP_VOPC__V_CMPX_NEQ_F16(MachInst)
Definition: decoder.cc:9829
GPUStaticInst * subDecode_OP_SOPP(MachInst)
Definition: decoder.cc:3162
GPUStaticInst * decode_OP_SMEM__S_BUFFER_STORE_DWORD(MachInst)
Definition: decoder.cc:8491
GPUStaticInst * decode_OP_DS__DS_CMPST_RTN_B32(MachInst)
Definition: decoder.cc:6564
GPUStaticInst * decode_OPU_VOP3__V_CMPX_NLE_F32(MachInst)
Definition: decoder.cc:4332
GPUStaticInst * decode_OPU_VOP3__V_MAX3_U32(MachInst)
Definition: decoder.cc:5976
GPUStaticInst * decode_OPU_VOP3__V_CMPX_TRU_F16(MachInst)
Definition: decoder.cc:4158
GPUStaticInst * decode_OP_SMEM__S_MEMTIME(MachInst)
Definition: decoder.cc:8533
GPUStaticInst * decode_OPU_VOP3__V_CMPX_GT_U16(MachInst)
Definition: decoder.cc:4716
static IsaDecodeMethod tableSubDecode_OP_SOPC[128]
Definition: gpu_decoder.hh:70
GPUStaticInst * decode_OPU_VOP3__V_MAD_U32_U24(MachInst)
Definition: decoder.cc:5868
GPUStaticInst * decode_OP_DS__DS_WRITE_B96(MachInst)
Definition: decoder.cc:7164
GPUStaticInst * decode_OPU_VOP3__V_CMP_F_U64(MachInst)
Definition: decoder.cc:4980
GPUStaticInst * decode_OP_SOP1__S_NOT_B64(MachInst)
Definition: decoder.cc:8587
GPUStaticInst * decode_OP_SMEM__S_BUFFER_LOAD_DWORDX2(MachInst)
Definition: decoder.cc:8449
GPUStaticInst * decode_OPU_VOP3__V_FLOOR_F32(MachInst)
Definition: decoder.cc:5592
GPUStaticInst * decode_OPU_VOP3__V_BFREV_B32(MachInst)
Definition: decoder.cc:5670
GPUStaticInst * decode_OP_SOP2__S_ADD_I32(MachInst)
Definition: decoder.cc:3558
GPUStaticInst * decode_OPU_VOP3__V_CMP_NLE_F16(MachInst)
Definition: decoder.cc:4044
GPUStaticInst * decode_OP_VOP1__V_FREXP_EXP_I16_F16(MachInst)
Definition: decoder.cc:9559
GPUStaticInst * decode_OP_VOP2__V_MIN_U32(MachInst)
Definition: decoder.cc:3318
GPUStaticInst * decode_OP_MUBUF__BUFFER_STORE_FORMAT_XYZ(MachInst)
Definition: decoder.cc:8095
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_B(MachInst)
Definition: decoder.cc:7782
GPUStaticInst * decode_OP_VOPC__V_CMPX_LE_U64(MachInst)
Definition: decoder.cc:10777
GPUStaticInst * decode_OP_SOPP__S_DECPERFLEVEL(MachInst)
Definition: decoder.cc:9103
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_L(MachInst)
Definition: decoder.cc:7776
GPUStaticInst * decode_OPU_VOP3__V_CMPX_T_U64(MachInst)
Definition: decoder.cc:5118
GPUStaticInst * decode_OPU_VOP3__V_MAD_U16(MachInst)
Definition: decoder.cc:6108
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_SWAP(MachInst)
Definition: decoder.cc:7272
GPUStaticInst * decode_OP_DS__DS_CMPST_F32(MachInst)
Definition: decoder.cc:6426
GPUStaticInst * decode_OP_VOPC__V_CMP_LT_I16(MachInst)
Definition: decoder.cc:10237
GPUStaticInst * decode_OP_SOPC__S_CMP_LE_I32(MachInst)
Definition: decoder.cc:8887
GPUStaticInst * decode_OPU_VOP3__V_MAD_F32(MachInst)
Definition: decoder.cc:5856
static IsaDecodeMethod tableSubDecode_OP_VOP1[256]
Definition: gpu_decoder.hh:73
GPUStaticInst * decode_OP_SMEM__S_LOAD_DWORD(MachInst)
Definition: decoder.cc:8413
GPUStaticInst * decode_OP_VOPC__V_CMPX_EQ_F64(MachInst)
Definition: decoder.cc:10147
static IsaDecodeMethod tableSubDecode_OP_MIMG[128]
Definition: gpu_decoder.hh:65
GPUStaticInst * decode_OP_VOPC__V_CMPX_NEQ_F64(MachInst)
Definition: decoder.cc:10213
GPUStaticInst * decode_OPU_VOP3__V_CVT_PKNORM_U16_F32(MachInst)
Definition: decoder.cc:6300
GPUStaticInst * decode_OP_VOPC__V_CMPX_GT_F64(MachInst)
Definition: decoder.cc:10159
GPUStaticInst * decode_OP_MIMG__IMAGE_LOAD_MIP_PCK_SGN(MachInst)
Definition: decoder.cc:7458
GPUStaticInst * decode_OP_SOPP__S_CBRANCH_CDBGSYS_OR_USER(MachInst)
Definition: decoder.cc:9127
GPUStaticInst * decode(MachInst mach_inst)
Definition: decoder.cc:3122
GPUStaticInst * decode_OPU_VOP3__V_DIV_SCALE_F32(MachInst)
Definition: decoder.cc:6042
GPUStaticInst * decode_OP_VOPC__V_CMP_LE_U64(MachInst)
Definition: decoder.cc:10681
GPUStaticInst * decode_OPU_VOP3__V_SUB_F32(MachInst)
Definition: decoder.cc:5136
GPUStaticInst * decode_OP_SOP1__S_MOVRELD_B32(MachInst)
Definition: decoder.cc:8821
GPUStaticInst * decode_OP_SOP1__S_FLBIT_I32_I64(MachInst)
Definition: decoder.cc:8683
GPUStaticInst * decode_OP_VOPC__V_CMPX_EQ_U32(MachInst)
Definition: decoder.cc:10579
GPUStaticInst * decode_OPU_VOP3__V_CMP_EQ_F16(MachInst)
Definition: decoder.cc:3984
GPUStaticInst * decode_OP_MTBUF__TBUFFER_LOAD_FORMAT_XYZW(MachInst)
Definition: decoder.cc:7980
GPUStaticInst * decode_OP_SOPP__S_SETPRIO(MachInst)
Definition: decoder.cc:9067
GPUStaticInst * decode_OP_VOP2__V_LSHLREV_B16(MachInst)
Definition: decoder.cc:3486
GPUStaticInst * decode_OP_SOP1__S_CBRANCH_JOIN(MachInst)
Definition: decoder.cc:8833
GPUStaticInst * decode_OP_VOP2__V_MUL_F16(MachInst)
Definition: decoder.cc:3438
GPUStaticInst * decode_OPU_VOP3__V_CMPX_EQ_U32(MachInst)
Definition: decoder.cc:4896
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_INC(MachInst)
Definition: decoder.cc:8323
GPUStaticInst * decode_OPU_VOP3__V_MAX_U16(MachInst)
Definition: decoder.cc:5382
GPUStaticInst * decode_OP_SOP1__S_BITSET1_B32(MachInst)
Definition: decoder.cc:8713
GPUStaticInst * decode_OP_DS__DS_MIN_SRC2_U32(MachInst)
Definition: decoder.cc:6966
GPUStaticInst * decode_OP_VOPC__V_CMPX_CLASS_F32(MachInst)
Definition: decoder.cc:9625
GPUStaticInst * decode_OPU_VOP3__V_CEIL_F16(MachInst)
Definition: decoder.cc:5802
GPUStaticInst * decode_OP_SOP2__S_RFE_RESTORE_B64(MachInst)
Definition: decoder.cc:3804
GPUStaticInst * decode_OPU_VOP3__V_LSHRREV_B16(MachInst)
Definition: decoder.cc:5358
GPUStaticInst * decode_OP_VOPC__V_CMPX_NE_I16(MachInst)
Definition: decoder.cc:10357
GPUStaticInst * decode_OPU_VOP3__V_CMP_T_U32(MachInst)
Definition: decoder.cc:4830
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_SMIN_X2(MachInst)
Definition: decoder.cc:8359
GPUStaticInst * decode_OP_VOP2__V_SUBREV_F16(MachInst)
Definition: decoder.cc:3432
GPUStaticInst * decode_OP_VOPC__V_CMP_NE_I16(MachInst)
Definition: decoder.cc:10261
GPUStaticInst * decode_OP_VOP1__V_SIN_F32(MachInst)
Definition: decoder.cc:9421
GPUStaticInst * decode_OP_SOP2__S_NOR_B64(MachInst)
Definition: decoder.cc:3696
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_C_B_O(MachInst)
Definition: decoder.cc:7890
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_INC(MachInst)
Definition: decoder.cc:7338
GPUStaticInst * decode_OP_VOPC__V_CMP_GE_F32(MachInst)
Definition: decoder.cc:9883
GPUStaticInst * decode_OP_VOPC__V_CMPX_LT_F16(MachInst)
Definition: decoder.cc:9757
GPUStaticInst * decode_OP_VINTRP__V_INTERP_P2_F32(MachInst)
Definition: decoder.cc:9163
GPUStaticInst * decode_OP_MIMG__IMAGE_ATOMIC_DEC(MachInst)
Definition: decoder.cc:7566
GPUStaticInst * decode_OP_VOPC__V_CMPX_F_I16(MachInst)
Definition: decoder.cc:10327
GPUStaticInst * decode_OP_VINTRP__V_INTERP_MOV_F32(MachInst)
Definition: decoder.cc:9169
GPUStaticInst * decode_OP_MIMG__IMAGE_ATOMIC_OR(MachInst)
Definition: decoder.cc:7548
GPUStaticInst * decode_OPU_VOP3__V_CMP_NE_U16(MachInst)
Definition: decoder.cc:4626
GPUStaticInst * decode_OP_MIMG__IMAGE_SAMPLE_C_B_CL(MachInst)
Definition: decoder.cc:7656
GPUStaticInst * decode_OP_VOP1__V_CVT_U32_F64(MachInst)
Definition: decoder.cc:9301
GPUStaticInst * decode_OP_VOP1__V_CVT_F32_F16(MachInst)
Definition: decoder.cc:9241
GPUStaticInst * decode_OP_VOP1__V_COS_F16(MachInst)
Definition: decoder.cc:9601
GPUStaticInst * decode_OP_VOP2__V_SUB_U16(MachInst)
Definition: decoder.cc:3468
GPUStaticInst * decode_OP_DS__DS_READ_B64(MachInst)
Definition: decoder.cc:6900
GPUStaticInst * decode_OPU_VOP3__V_PERM_B32(MachInst)
Definition: decoder.cc:6120
GPUStaticInst * decode_OP_DS__DS_MAX_RTN_U64(MachInst)
Definition: decoder.cc:6828
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LT_F16(MachInst)
Definition: decoder.cc:4074
GPUStaticInst * decode_OP_VOPC__V_CMP_NEQ_F32(MachInst)
Definition: decoder.cc:9925
GPUStaticInst * decode_OP_SOPC__S_CMP_GT_I32(MachInst)
Definition: decoder.cc:8869
GPUStaticInst * decode_OPU_VOP3__V_CMP_T_I64(MachInst)
Definition: decoder.cc:4974
GPUStaticInst * decode_OPU_VOP3__V_MOV_FED_B32(MachInst)
Definition: decoder.cc:5460
GPUStaticInst * decode_OPU_VOP3__V_CMP_U_F16(MachInst)
Definition: decoder.cc:4020
GPUStaticInst * decode_OP_SOP1__S_FLBIT_I32_B32(MachInst)
Definition: decoder.cc:8665
GPUStaticInst * decode_OP_SOP2__S_MIN_U32(MachInst)
Definition: decoder.cc:3588
GPUStaticInst * decode_OP_MUBUF__BUFFER_ATOMIC_SMAX(MachInst)
Definition: decoder.cc:8293
GPUStaticInst * decode_OP_VOPC__V_CMP_NLT_F32(MachInst)
Definition: decoder.cc:9931
GPUStaticInst * decode_OP_VOP1__V_EXP_LEGACY_F32(MachInst)
Definition: decoder.cc:9607
static IsaDecodeMethod tableSubDecode_OP_DS[256]
Definition: gpu_decoder.hh:63
GPUStaticInst * decode_OPU_VOP3__V_CVT_PKACCUM_U8_F32(MachInst)
Definition: decoder.cc:6138
GPUStaticInst * decode_OP_VOP1__V_NOT_B32(MachInst)
Definition: decoder.cc:9433
GPUStaticInst * decode_OP_VOP2__V_XOR_B32(MachInst)
Definition: decoder.cc:3360
GPUStaticInst * decode_OP_VOPC__V_CMPX_GE_I32(MachInst)
Definition: decoder.cc:10555
GPUStaticInst * decode_OPU_VOP3__V_CMPX_LE_U16(MachInst)
Definition: decoder.cc:4710
GPUStaticInst * decode_OPU_VOP3__V_CMP_CLASS_F16(MachInst)
Definition: decoder.cc:3960
GPUStaticInst * decode_OP_VOPC__V_CMP_LG_F16(MachInst)
Definition: decoder.cc:9685
GPUStaticInst * decode_OPU_VOP3__V_SAD_HI_U8(MachInst)
Definition: decoder.cc:6006
GPUStaticInst * decode_OP_MIMG__IMAGE_ATOMIC_SMIN(MachInst)
Definition: decoder.cc:7518
GPUStaticInst * decode_OP_VOPC__V_CMPX_LG_F64(MachInst)
Definition: decoder.cc:10165
GPUStaticInst * decode_OP_VOP1__V_BFREV_B32(MachInst)
Definition: decoder.cc:9439
GPUStaticInst * decode_OP_SMEM__S_BUFFER_STORE_DWORDX4(MachInst)
Definition: decoder.cc:8503
GPUStaticInst * decode_OP_SOPP__S_SET_GPR_IDX_OFF(MachInst)
Definition: decoder.cc:9145
GPUStaticInst * decode_OP_VOPC__V_CMP_F_U32(MachInst)
Definition: decoder.cc:10471
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_LZ(MachInst)
Definition: decoder.cc:7794
GPUStaticInst * decode_OP_DS__DS_WRXCHG2_RTN_B32(MachInst)
Definition: decoder.cc:6552
GPUStaticInst * decode_OPU_VOP3__V_CVT_I32_F32(MachInst)
Definition: decoder.cc:5454
GPUStaticInst * decode_OP_VOPC__V_CMP_GT_F32(MachInst)
Definition: decoder.cc:9871
GPUStaticInst * decode_OP_VOP1__V_CVT_I32_F32(MachInst)
Definition: decoder.cc:9223
GPUStaticInst * decode_OP_FLAT__FLAT_ATOMIC_UMIN_X2(MachInst)
Definition: decoder.cc:7380
GPUStaticInst * decode_OPU_VOP3__V_CMPX_EQ_I64(MachInst)
Definition: decoder.cc:5040
GPUStaticInst * decode_OPU_VOP3__V_FREXP_EXP_I32_F32(MachInst)
Definition: decoder.cc:5712
GPUStaticInst * decode_OP_VOPC__V_CMPX_EQ_I32(MachInst)
Definition: decoder.cc:10531
GPUStaticInst * decode_OP_VOP1__V_CLREXCP(MachInst)
Definition: decoder.cc:9493
GPUStaticInst * decode_OP_MIMG__IMAGE_GATHER4_L_O(MachInst)
Definition: decoder.cc:7848
GPUStaticInst * decode_OP_DS__DS_GWS_SEMA_BR(MachInst)
Definition: decoder.cc:7038
GPUStaticInst * decode_OP_DS__DS_INC_U32(MachInst)
Definition: decoder.cc:6342
GPUStaticInst * decode_OP_VOP2__V_MAC_F32(MachInst)
Definition: decoder.cc:3366
GPUStaticInst * decode_OPU_VOP3__V_CMPX_T_I16(MachInst)
Definition: decoder.cc:4686
GPUStaticInst * decode_OPU_VOP3__V_MED3_U32(MachInst)
Definition: decoder.cc:5994
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:190
GPUStaticInst *(Decoder::*)(MachInst) IsaDecodeMethod
Definition: gpu_decoder.hh:50
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
InFmt_VOP3_SDST_ENC iFmt_VOP3_SDST_ENC

Generated on Wed Dec 21 2022 10:22:15 for gem5 by doxygen 1.9.1