gem5  v22.1.0.0
process.cc
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41 
43 
44 #include <sys/syscall.h>
45 
46 #include "arch/arm/linux/linux.hh"
47 #include "arch/arm/page_size.hh"
49 #include "base/trace.hh"
50 #include "cpu/thread_context.hh"
51 #include "kern/linux/linux.hh"
53 #include "sim/process.hh"
54 #include "sim/syscall_desc.hh"
55 #include "sim/syscall_emul.hh"
56 #include "sim/system.hh"
57 
58 namespace gem5
59 {
60 
61 using namespace ArmISA;
62 
63 const Addr ArmLinuxProcess32::commPage = 0xffff0000;
64 
65 void
67 {
69  allocateMem(commPage, PageBytes);
70  ThreadContext *tc = system->threads[contextIds[0]];
71 
72  uint8_t swiNeg1[] = {
73  0xff, 0xff, 0xff, 0xef // swi -1
74  };
75 
76  SETranslatingPortProxy proxy(tc);
77  // Fill this page with swi -1 so we'll no if we land in it somewhere.
78  for (Addr addr = 0; addr < PageBytes; addr += sizeof(swiNeg1)) {
79  proxy.writeBlob(commPage + addr, swiNeg1, sizeof(swiNeg1));
80  }
81 
82  uint8_t memory_barrier[] =
83  {
84  0x5f, 0xf0, 0x7f, 0xf5, // dmb
85  0x0e, 0xf0, 0xa0, 0xe1 // return
86  };
87  proxy.writeBlob(commPage + 0x0fa0, memory_barrier, sizeof(memory_barrier));
88 
89  uint8_t cmpxchg[] =
90  {
91  0x9f, 0x3f, 0x92, 0xe1, // ldrex r3, [r2]
92  0x00, 0x30, 0x53, 0xe0, // subs r3, r3, r0
93  0x91, 0x3f, 0x82, 0x01, // strexeq r3, r1, [r2]
94  0x01, 0x00, 0x33, 0x03, // teqeq r3, #1
95  0xfa, 0xff, 0xff, 0x0a, // beq 1b
96  0x00, 0x00, 0x73, 0xe2, // rsbs r0, r3, #0
97  0x5f, 0xf0, 0x7f, 0xf5, // dmb
98  0x0e, 0xf0, 0xa0, 0xe1 // return
99  };
100  proxy.writeBlob(commPage + 0x0fc0, cmpxchg, sizeof(cmpxchg));
101 
102  uint8_t get_tls[] =
103  {
104  // read user read-only thread id register
105  0x70, 0x0f, 0x1d, 0xee, // mrc p15, 0, r0, c13, c0, 3
106  0x0e, 0xf0, 0xa0, 0xe1 // return
107  };
108  proxy.writeBlob(commPage + 0x0fe0, get_tls, sizeof(get_tls));
109 }
110 
111 void
113 {
115  // The 64 bit equivalent of the comm page would be set up here.
116 }
117 
118 } // namespace gem5
static const Addr commPage
A page to hold "kernel" provided functions. The name might be wrong.
Definition: process.hh:63
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: process.cc:66
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: process.cc:112
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: process.cc:107
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: process.cc:126
void writeBlob(Addr addr, const void *p, int size) const
Same as tryWriteBlob, but insists on success.
Definition: port_proxy.hh:192
ThreadContext is the external interface to all thread state for anything outside of the CPU.
const Addr PageBytes
Definition: page_size.hh:53
Bitfield< 15 > system
Definition: misc.hh:1004
Bitfield< 3 > addr
Definition: types.hh:84
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
This file defines objects used to emulate syscalls from the target application on the host machine.

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