gem5  v21.1.0.2
process.cc
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41 
43 
44 #include <sys/syscall.h>
45 
46 #include "arch/arm/linux/linux.hh"
47 #include "arch/arm/page_size.hh"
49 #include "base/trace.hh"
50 #include "cpu/thread_context.hh"
51 #include "kern/linux/linux.hh"
52 #include "sim/process.hh"
53 #include "sim/syscall_desc.hh"
54 #include "sim/syscall_emul.hh"
55 #include "sim/system.hh"
56 
57 namespace gem5
58 {
59 
60 using namespace ArmISA;
61 
62 const Addr ArmLinuxProcess32::commPage = 0xffff0000;
63 
64 void
66 {
68  allocateMem(commPage, PageBytes);
69  ThreadContext *tc = system->threads[contextIds[0]];
70 
71  uint8_t swiNeg1[] = {
72  0xff, 0xff, 0xff, 0xef // swi -1
73  };
74 
75  // Fill this page with swi -1 so we'll no if we land in it somewhere.
76  for (Addr addr = 0; addr < PageBytes; addr += sizeof(swiNeg1)) {
77  tc->getVirtProxy().writeBlob(commPage + addr,
78  swiNeg1, sizeof(swiNeg1));
79  }
80 
81  uint8_t memory_barrier[] =
82  {
83  0x5f, 0xf0, 0x7f, 0xf5, // dmb
84  0x0e, 0xf0, 0xa0, 0xe1 // return
85  };
86  tc->getVirtProxy().writeBlob(commPage + 0x0fa0, memory_barrier,
87  sizeof(memory_barrier));
88 
89  uint8_t cmpxchg[] =
90  {
91  0x9f, 0x3f, 0x92, 0xe1, // ldrex r3, [r2]
92  0x00, 0x30, 0x53, 0xe0, // subs r3, r3, r0
93  0x91, 0x3f, 0x82, 0x01, // strexeq r3, r1, [r2]
94  0x01, 0x00, 0x33, 0x03, // teqeq r3, #1
95  0xfa, 0xff, 0xff, 0x0a, // beq 1b
96  0x00, 0x00, 0x73, 0xe2, // rsbs r0, r3, #0
97  0x5f, 0xf0, 0x7f, 0xf5, // dmb
98  0x0e, 0xf0, 0xa0, 0xe1 // return
99  };
100  tc->getVirtProxy().writeBlob(commPage + 0x0fc0, cmpxchg, sizeof(cmpxchg));
101 
102  uint8_t get_tls[] =
103  {
104  // read user read-only thread id register
105  0x70, 0x0f, 0x1d, 0xee, // mrc p15, 0, r0, c13, c0, 3
106  0x0e, 0xf0, 0xa0, 0xe1 // return
107  };
108  tc->getVirtProxy().writeBlob(commPage + 0x0fe0, get_tls, sizeof(get_tls));
109 }
110 
111 void
113 {
115  // The 64 bit equivalent of the comm page would be set up here.
116 }
117 
118 } // namespace gem5
linux.hh
gem5::PortProxy::writeBlob
void writeBlob(Addr addr, const void *p, int size) const
Same as tryWriteBlob, but insists on success.
Definition: port_proxy.hh:192
system.hh
gem5::X86ISA::system
Bitfield< 15 > system
Definition: misc.hh:1003
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:93
gem5::ThreadContext::getVirtProxy
virtual PortProxy & getVirtProxy()=0
process.hh
gem5::ArmProcess64::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: process.cc:126
linux.hh
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::ArmLinuxProcess64::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: process.cc:112
syscall_emul.hh
gem5::ArmISA::PageBytes
const Addr PageBytes
Definition: page_size.hh:53
process.hh
trace.hh
page_size.hh
gem5::ArmLinuxProcess32::commPage
static const Addr commPage
A page to hold "kernel" provided functions. The name might be wrong.
Definition: process.hh:63
gem5::ArmProcess32::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: process.cc:107
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
object_file.hh
thread_context.hh
gem5::ArmLinuxProcess32::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: process.cc:65
syscall_desc.hh
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84

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