gem5 v24.0.0.0
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#include "arch/riscv/linux/se_workload.hh"
#include <sys/syscall.h>
#include "arch/riscv/process.hh"
#include "base/loader/object_file.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "sim/syscall_emul.hh"
Go to the source code of this file.
Namespaces | |
namespace | gem5 |
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved. | |
namespace | gem5::RiscvISA |
Functions | |
static SyscallReturn | gem5::RiscvISA::unameFunc64 (SyscallDesc *desc, ThreadContext *tc, VPtr< Linux::utsname > name) |
Target uname() handler. | |
static SyscallReturn | gem5::RiscvISA::unameFunc32 (SyscallDesc *desc, ThreadContext *tc, VPtr< Linux::utsname > name) |
Target uname() handler. | |