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gem5 v24.0.0.0
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This is the complete list of members for gem5::ExecContext, including all inherited members.
| amoMem(Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op) | gem5::ExecContext | inlinevirtual |
| armMonitor(Addr address)=0 | gem5::ExecContext | pure virtual |
| demapPage(Addr vaddr, uint64_t asn)=0 | gem5::ExecContext | pure virtual |
| getAddrMonitor()=0 | gem5::ExecContext | pure virtual |
| getHtmTransactionalDepth() const =0 | gem5::ExecContext | pure virtual |
| getHtmTransactionUid() const =0 | gem5::ExecContext | pure virtual |
| getRegOperand(const StaticInst *si, int idx)=0 | gem5::ExecContext | pure virtual |
| getRegOperand(const StaticInst *si, int idx, void *val)=0 | gem5::ExecContext | pure virtual |
| getWritableRegOperand(const StaticInst *si, int idx)=0 | gem5::ExecContext | pure virtual |
| inHtmTransactionalState() const =0 | gem5::ExecContext | pure virtual |
| initiateMemAMO(Addr addr, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op) | gem5::ExecContext | inlinevirtual |
| initiateMemMgmtCmd(Request::Flags flags)=0 | gem5::ExecContext | pure virtual |
| initiateMemRead(Addr addr, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable) | gem5::ExecContext | inlinevirtual |
| mwait(PacketPtr pkt)=0 | gem5::ExecContext | pure virtual |
| mwaitAtomic(ThreadContext *tc)=0 | gem5::ExecContext | pure virtual |
| newHtmTransactionUid() const =0 | gem5::ExecContext | pure virtual |
| pcState() const =0 | gem5::ExecContext | pure virtual |
| pcState(const PCStateBase &val)=0 | gem5::ExecContext | pure virtual |
| readMem(Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable) | gem5::ExecContext | inlinevirtual |
| readMemAccPredicate() const =0 | gem5::ExecContext | pure virtual |
| readMiscReg(int misc_reg)=0 | gem5::ExecContext | pure virtual |
| readMiscRegOperand(const StaticInst *si, int idx)=0 | gem5::ExecContext | pure virtual |
| readPredicate() const =0 | gem5::ExecContext | pure virtual |
| readStCondFailures() const =0 | gem5::ExecContext | pure virtual |
| setMemAccPredicate(bool val)=0 | gem5::ExecContext | pure virtual |
| setMiscReg(int misc_reg, RegVal val)=0 | gem5::ExecContext | pure virtual |
| setMiscRegOperand(const StaticInst *si, int idx, RegVal val)=0 | gem5::ExecContext | pure virtual |
| setPredicate(bool val)=0 | gem5::ExecContext | pure virtual |
| setRegOperand(const StaticInst *si, int idx, RegVal val)=0 | gem5::ExecContext | pure virtual |
| setRegOperand(const StaticInst *si, int idx, const void *val)=0 | gem5::ExecContext | pure virtual |
| setStCondFailures(unsigned int sc_failures)=0 | gem5::ExecContext | pure virtual |
| tcBase() const =0 | gem5::ExecContext | pure virtual |
| writeMem(uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable)=0 | gem5::ExecContext | pure virtual |