Inheritance diagram for gem5::trace::IntelTraceRecord:

Public Member Functions
	IntelTraceRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, const StaticInstPtr _macroStaticInst=NULL)

void	dump ()

Public Member Functions inherited from gem5::trace::InstRecord
	InstRecord (Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, const StaticInstPtr _macroStaticInst=nullptr)

virtual	~InstRecord ()

void	setWhen (Tick new_when)

void	setMem (Addr a, Addr s, unsigned f)

template<typename T , size_t N>
void	setData (std::array< T, N > d)

void	setData (uint64_t d)

void	setData (uint32_t d)

void	setData (uint16_t d)

void	setData (uint8_t d)

void	setData (int64_t d)

void	setData (int32_t d)

void	setData (int16_t d)

void	setData (int8_t d)

void	setData (double d)

void	setData (const RegClass &reg_class, RegVal val)

void	setData (const RegClass &reg_class, const void *val)

void	setFetchSeq (InstSeqNum seq)

void	setCPSeq (InstSeqNum seq)

void	setPredicate (bool val)

void	setFaulting (bool val)

Tick	getWhen () const

ThreadContext *	getThread () const

StaticInstPtr	getStaticInst () const

const PCStateBase &	getPCState () const

StaticInstPtr	getMacroStaticInst () const

Addr	getAddr () const

Addr	getSize () const

unsigned	getFlags () const

bool	getMemValid () const

uint64_t	getIntData () const

double	getFloatData () const

int	getDataStatus () const

InstSeqNum	getFetchSeq () const

bool	getFetchSeqValid () const

InstSeqNum	getCpSeq () const

bool	getCpSeqValid () const

bool	getFaulting () const

Additional Inherited Members
Protected Types inherited from gem5::trace::InstRecord
enum	DataStatus { DataInvalid = 0 , DataInt8 = 1 , DataInt16 = 2 , DataInt32 = 4 , DataInt64 = 8 , DataDouble = 3 , DataReg = 5 }
	What size of data was written? More...

Protected Attributes inherited from gem5::trace::InstRecord
Tick	when

ThreadContext *	thread

StaticInstPtr	staticInst

std::unique_ptr< PCStateBase >	pc

StaticInstPtr	macroStaticInst

Addr	addr = 0
	The address that was accessed.

Addr	size = 0
	The size of the memory request.

unsigned	flags = 0
	The flags that were assigned to the request.

union gem5::trace::InstRecord::Data	data

InstSeqNum	fetch_seq = 0

InstSeqNum	cp_seq = 0

enum gem5::trace::InstRecord::DataStatus	dataStatus = DataInvalid

bool	mem_valid = false
	Are the memory fields in the record valid?

bool	fetch_seq_valid = false
	Are the fetch sequence number fields valid?

bool	cp_seq_valid = false
	Are the commit sequence number fields valid?

bool	predicate = true
	is the predicate for execution this inst true or false (not execed)?

bool	faulting = false
	Did the execution of this instruction fault? (requires ExecFaulting to be enabled)

Detailed Description

Definition at line 45 of file inteltrace.hh.

Constructor & Destructor Documentation

gem5::trace::IntelTraceRecord::IntelTraceRecord	(	Tick	_when,
		ThreadContext *	_thread,
		const StaticInstPtr	_staticInst,
		const PCStateBase &	_pc,
		const StaticInstPtr	_macroStaticInst = NULL )

inline

Definition at line 48 of file inteltrace.hh.

void gem5::trace::IntelTraceRecord::dump ( )

virtual

Definition at line 42 of file inteltrace.cc.

The documentation for this class was generated from the following files: