gem5  v22.1.0.0
insttracer.hh
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40 
41 #ifndef __INSTRECORD_HH__
42 #define __INSTRECORD_HH__
43 
44 #include <memory>
45 
46 #include "arch/generic/pcstate.hh"
47 #include "base/types.hh"
48 #include "cpu/inst_res.hh"
49 #include "cpu/inst_seq.hh"
50 #include "cpu/static_inst.hh"
51 #include "sim/sim_object.hh"
52 
53 namespace gem5
54 {
55 
56 class ThreadContext;
57 
58 namespace trace {
59 
61 {
62  protected:
64 
65  // The following fields are initialized by the constructor and
66  // thus guaranteed to be valid.
68  // need to make this ref-counted so it doesn't go away before we
69  // dump the record
71  std::unique_ptr<PCStateBase> pc;
73 
74  // The remaining fields are only valid for particular instruction
75  // types (e.g, addresses for memory ops) or when particular
76  // options are enabled (e.g., tracing full register contents).
77  // Each data field has an associated valid flag to indicate
78  // whether the data field is valid.
79 
80  /*** @defgroup mem
81  * @{
82  * Memory request information in the instruction accessed memory.
83  * @see mem_valid
84  */
85  Addr addr = 0;
86  Addr size = 0;
87  unsigned flags = 0;
88 
99  union Data
100  {
101  ~Data() {}
102  Data() {}
103  uint64_t asInt = 0;
104  double asDouble;
106  } data;
107 
113 
119 
124  {
126  DataInt8 = 1, // set to equal number of bytes
131  DataReg = 5
133 
137  bool mem_valid = false;
138 
142  bool fetch_seq_valid = false;
146  bool cp_seq_valid = false;
147 
150  bool predicate = true;
151 
156  bool faulting = false;
157 
158  public:
159  InstRecord(Tick _when, ThreadContext *_thread,
160  const StaticInstPtr _staticInst, const PCStateBase &_pc,
161  const StaticInstPtr _macroStaticInst=nullptr)
162  : when(_when), thread(_thread), staticInst(_staticInst),
163  pc(_pc.clone()), macroStaticInst(_macroStaticInst)
164  {}
165 
166  virtual ~InstRecord()
167  {
168  if (dataStatus == DataReg)
169  data.asReg.~InstResult();
170  }
171 
172  void setWhen(Tick new_when) { when = new_when; }
173  void
174  setMem(Addr a, Addr s, unsigned f)
175  {
176  addr = a;
177  size = s;
178  flags = f;
179  mem_valid = true;
180  }
181 
182  template <typename T, size_t N>
183  void
184  setData(std::array<T, N> d)
185  {
186  data.asInt = d[0];
187  dataStatus = (DataStatus)sizeof(T);
188  static_assert(sizeof(T) == DataInt8 || sizeof(T) == DataInt16 ||
189  sizeof(T) == DataInt32 || sizeof(T) == DataInt64,
190  "Type T has an unrecognized size.");
191  }
192 
193  void
194  setData(uint64_t d)
195  {
196  data.asInt = d;
198  }
199  void
200  setData(uint32_t d)
201  {
202  data.asInt = d;
204  }
205  void
206  setData(uint16_t d)
207  {
208  data.asInt = d;
210  }
211  void
212  setData(uint8_t d)
213  {
214  data.asInt = d;
216  }
217 
218  void setData(int64_t d) { setData((uint64_t)d); }
219  void setData(int32_t d) { setData((uint32_t)d); }
220  void setData(int16_t d) { setData((uint16_t)d); }
221  void setData(int8_t d) { setData((uint8_t)d); }
222 
223  void
224  setData(double d)
225  {
226  data.asDouble = d;
228  }
229 
230  void
231  setData(const RegClass &reg_class, RegVal val)
232  {
233  new(&data.asReg) InstResult(reg_class, val);
235  }
236 
237  void
238  setData(const RegClass &reg_class, const void *val)
239  {
240  new(&data.asReg) InstResult(reg_class, val);
242  }
243 
244  void
246  {
247  fetch_seq = seq;
248  fetch_seq_valid = true;
249  }
250 
251  void
253  {
254  cp_seq = seq;
255  cp_seq_valid = true;
256  }
257 
258  void setPredicate(bool val) { predicate = val; }
259 
260  void setFaulting(bool val) { faulting = val; }
261 
262  virtual void dump() = 0;
263 
264  public:
265  Tick getWhen() const { return when; }
266  ThreadContext *getThread() const { return thread; }
268  const PCStateBase &getPCState() const { return *pc; }
270 
271  Addr getAddr() const { return addr; }
272  Addr getSize() const { return size; }
273  unsigned getFlags() const { return flags; }
274  bool getMemValid() const { return mem_valid; }
275 
276  uint64_t getIntData() const { return data.asInt; }
277  double getFloatData() const { return data.asDouble; }
278  int getDataStatus() const { return dataStatus; }
279 
280  InstSeqNum getFetchSeq() const { return fetch_seq; }
281  bool getFetchSeqValid() const { return fetch_seq_valid; }
282 
283  InstSeqNum getCpSeq() const { return cp_seq; }
284  bool getCpSeqValid() const { return cp_seq_valid; }
285 
286  bool getFaulting() const { return faulting; }
287 };
288 
289 class InstTracer : public SimObject
290 {
291  public:
292  InstTracer(const Params &p) : SimObject(p) {}
293 
294  virtual ~InstTracer() {}
295 
296  virtual InstRecord *
298  const StaticInstPtr staticInst, const PCStateBase &pc,
299  const StaticInstPtr macroStaticInst=nullptr) = 0;
300 };
301 
302 } // namespace trace
303 } // namespace gem5
304 
305 #endif // __INSTRECORD_HH__
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
Abstract superclass for simulation objects.
Definition: sim_object.hh:148
SimObjectParams Params
Definition: sim_object.hh:170
ThreadContext is the external interface to all thread state for anything outside of the CPU.
void setData(const RegClass &reg_class, RegVal val)
Definition: insttracer.hh:231
unsigned getFlags() const
Definition: insttracer.hh:273
void setData(int64_t d)
Definition: insttracer.hh:218
void setFaulting(bool val)
Definition: insttracer.hh:260
bool getFaulting() const
Definition: insttracer.hh:286
void setData(double d)
Definition: insttracer.hh:224
bool getCpSeqValid() const
Definition: insttracer.hh:284
Addr addr
The address that was accessed.
Definition: insttracer.hh:85
void setData(uint32_t d)
Definition: insttracer.hh:200
InstSeqNum getFetchSeq() const
Definition: insttracer.hh:280
bool faulting
Did the execution of this instruction fault? (requires ExecFaulting to be enabled)
Definition: insttracer.hh:156
ThreadContext * getThread() const
Definition: insttracer.hh:266
StaticInstPtr staticInst
Definition: insttracer.hh:70
InstSeqNum getCpSeq() const
Definition: insttracer.hh:283
void setData(uint64_t d)
Definition: insttracer.hh:194
void setCPSeq(InstSeqNum seq)
Definition: insttracer.hh:252
InstRecord(Tick _when, ThreadContext *_thread, const StaticInstPtr _staticInst, const PCStateBase &_pc, const StaticInstPtr _macroStaticInst=nullptr)
Definition: insttracer.hh:159
void setMem(Addr a, Addr s, unsigned f)
Definition: insttracer.hh:174
StaticInstPtr getMacroStaticInst() const
Definition: insttracer.hh:269
StaticInstPtr macroStaticInst
Definition: insttracer.hh:72
void setData(int32_t d)
Definition: insttracer.hh:219
bool getMemValid() const
Definition: insttracer.hh:274
int getDataStatus() const
Definition: insttracer.hh:278
void setFetchSeq(InstSeqNum seq)
Definition: insttracer.hh:245
void setData(int16_t d)
Definition: insttracer.hh:220
ThreadContext * thread
Definition: insttracer.hh:67
unsigned flags
The flags that were assigned to the request.
Definition: insttracer.hh:87
std::unique_ptr< PCStateBase > pc
Definition: insttracer.hh:71
bool getFetchSeqValid() const
Definition: insttracer.hh:281
uint64_t getIntData() const
Definition: insttracer.hh:276
virtual void dump()=0
const PCStateBase & getPCState() const
Definition: insttracer.hh:268
bool predicate
is the predicate for execution this inst true or false (not execed)?
Definition: insttracer.hh:150
void setPredicate(bool val)
Definition: insttracer.hh:258
union gem5::trace::InstRecord::Data data
void setData(uint8_t d)
Definition: insttracer.hh:212
double getFloatData() const
Definition: insttracer.hh:277
void setData(std::array< T, N > d)
Definition: insttracer.hh:184
void setData(uint16_t d)
Definition: insttracer.hh:206
StaticInstPtr getStaticInst() const
Definition: insttracer.hh:267
void setData(int8_t d)
Definition: insttracer.hh:221
Addr size
The size of the memory request.
Definition: insttracer.hh:86
void setData(const RegClass &reg_class, const void *val)
Definition: insttracer.hh:238
void setWhen(Tick new_when)
Definition: insttracer.hh:172
InstTracer(const Params &p)
Definition: insttracer.hh:292
virtual InstRecord * getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst, const PCStateBase &pc, const StaticInstPtr macroStaticInst=nullptr)=0
bool cp_seq_valid
Are the commit sequence number fields valid?
Definition: insttracer.hh:146
DataStatus
What size of data was written?
Definition: insttracer.hh:124
enum gem5::trace::InstRecord::DataStatus dataStatus
bool fetch_seq_valid
Are the fetch sequence number fields valid?
Definition: insttracer.hh:142
bool mem_valid
Are the memory fields in the record valid?
Definition: insttracer.hh:137
Bitfield< 8 > a
Definition: misc_types.hh:66
Bitfield< 9 > d
Definition: misc_types.hh:64
Bitfield< 4 > pc
Bitfield< 1 > s
Definition: pagetable.hh:64
Bitfield< 56 > f
Definition: pagetable.hh:53
Bitfield< 54 > p
Definition: pagetable.hh:70
Bitfield< 63 > val
Definition: misc.hh:776
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
uint64_t Tick
Tick count type.
Definition: types.hh:58
uint64_t RegVal
Definition: types.hh:173
uint64_t InstSeqNum
Definition: inst_seq.hh:40

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