gem5  v22.1.0.0
indirect.hh
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28 
29 #ifndef __CPU_PRED_INDIRECT_BASE_HH__
30 #define __CPU_PRED_INDIRECT_BASE_HH__
31 
32 #include "arch/generic/pcstate.hh"
33 #include "cpu/inst_seq.hh"
34 #include "params/IndirectPredictor.hh"
35 #include "sim/sim_object.hh"
36 
37 namespace gem5
38 {
39 
40 namespace branch_prediction
41 {
42 
44 {
45  public:
46 
47  typedef IndirectPredictorParams Params;
48 
50  : SimObject(params)
51  {
52  }
53 
54  virtual bool lookup(Addr br_addr, PCStateBase& br_target,
55  ThreadID tid) = 0;
56  virtual void recordIndirect(Addr br_addr, Addr tgt_addr,
57  InstSeqNum seq_num, ThreadID tid) = 0;
58  virtual void commit(InstSeqNum seq_num, ThreadID tid,
59  void * indirect_history) = 0;
60  virtual void squash(InstSeqNum seq_num, ThreadID tid) = 0;
61  virtual void recordTarget(InstSeqNum seq_num, void * indirect_history,
62  const PCStateBase& target, ThreadID tid) = 0;
63  virtual void genIndirectInfo(ThreadID tid, void* & indirect_history) = 0;
64  virtual void updateDirectionInfo(ThreadID tid, bool actually_taken) = 0;
65  virtual void deleteIndirectInfo(ThreadID tid, void * indirect_history) = 0;
67  void * indirect_history,
68  bool actually_taken) = 0;
69 };
70 
71 } // namespace branch_prediction
72 } // namespace gem5
73 
74 #endif // __CPU_PRED_INDIRECT_BASE_HH__
Abstract superclass for simulation objects.
Definition: sim_object.hh:148
IndirectPredictor(const Params &params)
Definition: indirect.hh:49
virtual void commit(InstSeqNum seq_num, ThreadID tid, void *indirect_history)=0
virtual void squash(InstSeqNum seq_num, ThreadID tid)=0
virtual void deleteIndirectInfo(ThreadID tid, void *indirect_history)=0
virtual void updateDirectionInfo(ThreadID tid, bool actually_taken)=0
virtual void changeDirectionPrediction(ThreadID tid, void *indirect_history, bool actually_taken)=0
virtual bool lookup(Addr br_addr, PCStateBase &br_target, ThreadID tid)=0
virtual void recordIndirect(Addr br_addr, Addr tgt_addr, InstSeqNum seq_num, ThreadID tid)=0
virtual void recordTarget(InstSeqNum seq_num, void *indirect_history, const PCStateBase &target, ThreadID tid)=0
virtual void genIndirectInfo(ThreadID tid, void *&indirect_history)=0
const Params & params() const
Definition: sim_object.hh:176
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
int16_t ThreadID
Thread index/ID type.
Definition: types.hh:235
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
uint64_t InstSeqNum
Definition: inst_seq.hh:40

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