46#ifndef __DEV_ARM_PL050_HH__
47#define __DEV_ARM_PL050_HH__
53#include "params/Pl050.hh"
72 Bitfield<0> force_clock_low;
110 InterruptReg rawInterrupts;
134 Pl050(
const Pl050Params &
p);
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls.
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Bitfield< 3 > txint_enable
void setControl(ControlReg ctrl)
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
static const int kmiClkDiv
Bitfield< 4 > rxint_enable
EndBitUnion(InterruptReg) InterruptReg rawInterrupts
raw interrupt register (unmasked)
EndBitUnion(StatusReg) StatusReg status
BitUnion8(ControlReg) Bitfield< 0 > force_clock_low
BitUnion8(InterruptReg) Bitfield< 0 > rx
uint8_t clkdiv
clock divisor register This register is just kept around to satisfy reads after driver does writes.
Pl050(const Pl050Params &p)
void updateRxInt()
Update the RX interrupt using PS/2 device state.
void setInterrupts(InterruptReg ints)
InterruptReg getInterrupt() const
Get current interrupt value.
EndBitUnion(ControlReg) ControlReg control
control register
void setTxInt(bool value)
Set or clear the TX interrupt.
ps2::Device * ps2Device
PS2 device connected to this KMI interface.
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
void serialize(CheckpointOut &cp) const override
Serialize an object.
BitUnion8(StatusReg) Bitfield< 0 > data_in
KMI status register.
Bitfield< 1 > force_data_low
void updateIntCtrl(InterruptReg ints, ControlReg ctrl)
Update the status of the interrupt and control registers and deliver an interrupt if required.
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
std::ostream CheckpointOut
uint64_t Tick
Tick count type.