gem5  v22.1.0.0
kmi.hh
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40 
41 
46 #ifndef __DEV_ARM_PL050_HH__
47 #define __DEV_ARM_PL050_HH__
48 
49 #include <list>
50 
51 #include "base/vnc/vncinput.hh"
52 #include "dev/arm/amba_device.hh"
53 #include "params/Pl050.hh"
54 
55 namespace gem5
56 {
57 
58 namespace ps2 {
59 class Device;
60 } // namespace ps2
61 
62 class Pl050 : public AmbaIntDevice
63 {
64  protected:
65  static const int kmiCr = 0x000;
66  static const int kmiStat = 0x004;
67  static const int kmiData = 0x008;
68  static const int kmiClkDiv = 0x00C;
69  static const int kmiISR = 0x010;
70 
71  BitUnion8(ControlReg)
72  Bitfield<0> force_clock_low;
73  Bitfield<1> force_data_low;
74  Bitfield<2> enable;
75  Bitfield<3> txint_enable;
76  Bitfield<4> rxint_enable;
77  Bitfield<5> type;
78  EndBitUnion(ControlReg)
79 
80 
82  ControlReg control;
83 
85  BitUnion8(StatusReg)
86  Bitfield<0> data_in;
87  Bitfield<1> clk_in;
88  Bitfield<2> rxparity;
89  Bitfield<3> rxbusy;
90  Bitfield<4> rxfull;
91  Bitfield<5> txbusy;
92  Bitfield<6> txempty;
93  EndBitUnion(StatusReg)
94 
95  StatusReg status;
96 
102  uint8_t clkdiv;
103 
104  BitUnion8(InterruptReg)
105  Bitfield<0> rx;
106  Bitfield<1> tx;
107  EndBitUnion(InterruptReg)
108 
109 
110  InterruptReg rawInterrupts;
111 
113  void setTxInt(bool value);
114 
116  void updateRxInt();
117 
122  void updateIntCtrl(InterruptReg ints, ControlReg ctrl);
123 
124  void setInterrupts(InterruptReg ints) { updateIntCtrl(ints, control); }
125  void setControl(ControlReg ctrl) { updateIntCtrl(rawInterrupts, ctrl); }
126 
128  InterruptReg getInterrupt() const;
129 
132 
133  public:
134  Pl050(const Pl050Params &p);
135 
136  Tick read(PacketPtr pkt) override;
137  Tick write(PacketPtr pkt) override;
138 
139  void serialize(CheckpointOut &cp) const override;
140  void unserialize(CheckpointIn &cp) override;
141 };
142 
143 } // namespace gem5
144 
145 #endif // __DEV_ARM_PL050_HH__
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls.
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:294
Bitfield< 3 > txint_enable
Definition: kmi.hh:75
Bitfield< 5 > txbusy
Definition: kmi.hh:91
void setControl(ControlReg ctrl)
Definition: kmi.hh:125
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: kmi.cc:115
static const int kmiClkDiv
Definition: kmi.hh:68
static const int kmiISR
Definition: kmi.hh:69
Bitfield< 4 > rxint_enable
Definition: kmi.hh:76
EndBitUnion(InterruptReg) InterruptReg rawInterrupts
raw interrupt register (unmasked)
static const int kmiStat
Definition: kmi.hh:66
static const int kmiCr
Definition: kmi.hh:65
EndBitUnion(StatusReg) StatusReg status
BitUnion8(ControlReg) Bitfield< 0 > force_clock_low
BitUnion8(InterruptReg) Bitfield< 0 > rx
Bitfield< 1 > clk_in
Definition: kmi.hh:87
uint8_t clkdiv
clock divisor register This register is just kept around to satisfy reads after driver does writes.
Definition: kmi.hh:102
Bitfield< 3 > rxbusy
Definition: kmi.hh:89
Pl050(const Pl050Params &p)
Definition: kmi.cc:54
Bitfield< 2 > rxparity
Definition: kmi.hh:88
Bitfield< 6 > txempty
Definition: kmi.hh:92
Bitfield< 5 > type
Definition: kmi.hh:77
Bitfield< 1 > tx
Definition: kmi.hh:106
void updateRxInt()
Update the RX interrupt using PS/2 device state.
Definition: kmi.cc:169
void setInterrupts(InterruptReg ints)
Definition: kmi.hh:124
static const int kmiData
Definition: kmi.hh:67
InterruptReg getInterrupt() const
Get current interrupt value.
Definition: kmi.cc:198
EndBitUnion(ControlReg) ControlReg control
control register
void setTxInt(bool value)
Set or clear the TX interrupt.
Definition: kmi.cc:159
Bitfield< 2 > enable
Definition: kmi.hh:74
ps2::Device * ps2Device
PS2 device connected to this KMI interface.
Definition: kmi.hh:131
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: kmi.cc:63
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: kmi.cc:218
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: kmi.cc:209
BitUnion8(StatusReg) Bitfield< 0 > data_in
KMI status register.
Bitfield< 1 > force_data_low
Definition: kmi.hh:73
void updateIntCtrl(InterruptReg ints, ControlReg ctrl)
Update the status of the interrupt and control registers and deliver an interrupt if required.
Definition: kmi.cc:179
Bitfield< 4 > rxfull
Definition: kmi.hh:90
Bitfield< 5, 0 > status
Definition: misc_types.hh:429
Bitfield< 54 > p
Definition: pagetable.hh:70
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
std::ostream CheckpointOut
Definition: serialize.hh:66
uint64_t Tick
Tick count type.
Definition: types.hh:58
Declaration of a VNC input.

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