gem5  v21.1.0.2
kmi.cc
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40 
41 #include "dev/arm/kmi.hh"
42 
43 #include "base/trace.hh"
44 #include "base/vnc/vncinput.hh"
45 #include "debug/Pl050.hh"
46 #include "dev/arm/amba_device.hh"
47 #include "dev/ps2/device.hh"
48 #include "mem/packet.hh"
49 #include "mem/packet_access.hh"
50 
51 namespace gem5
52 {
53 
54 Pl050::Pl050(const Pl050Params &p)
55  : AmbaIntDevice(p, 0x1000), control(0), status(0x43), clkdiv(0),
56  rawInterrupts(0),
57  ps2Device(p.ps2)
58 {
59  ps2Device->hostRegDataAvailable([this]() { this->updateRxInt(); });
60 }
61 
62 Tick
64 {
65  assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
66 
67  Addr daddr = pkt->getAddr() - pioAddr;
68 
69  uint32_t data = 0;
70 
71  switch (daddr) {
72  case kmiCr:
73  DPRINTF(Pl050, "Read Commmand: %#x\n", (uint32_t)control);
74  data = control;
75  break;
76 
77  case kmiStat:
78  status.rxfull = ps2Device->hostDataAvailable() ? 1 : 0;
79  DPRINTF(Pl050, "Read Status: %#x\n", (uint32_t)status);
80  data = status;
81  break;
82 
83  case kmiData:
85  updateRxInt();
86  DPRINTF(Pl050, "Read Data: %#x\n", (uint32_t)data);
87  break;
88 
89  case kmiClkDiv:
90  data = clkdiv;
91  break;
92 
93  case kmiISR:
94  data = getInterrupt();
95  DPRINTF(Pl050, "Read Interrupts: %#x\n", getInterrupt());
96  break;
97 
98  default:
99  if (readId(pkt, ambaId, pioAddr)) {
100  // Hack for variable size accesses
101  data = pkt->getUintX(ByteOrder::little);
102  break;
103  }
104 
105  warn("Tried to read PL050 at offset %#x that doesn't exist\n", daddr);
106  break;
107  }
108 
109  pkt->setUintX(data, ByteOrder::little);
110  pkt->makeAtomicResponse();
111  return pioDelay;
112 }
113 
114 Tick
116 {
117 
118  assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
119 
120  Addr daddr = pkt->getAddr() - pioAddr;
121  const uint32_t data = pkt->getUintX(ByteOrder::little);
122 
123  panic_if(pkt->getSize() != 1,
124  "PL050: Unexpected write size "
125  "(offset: %#x, data: %#x, size: %u)\n",
126  daddr, data, pkt->getSize());
127 
128  switch (daddr) {
129  case kmiCr:
130  DPRINTF(Pl050, "Write Commmand: %#x\n", data);
131  // Use the update interrupts helper to make sure any interrupt
132  // mask changes are handled correctly.
133  setControl((uint8_t)data);
134  break;
135 
136  case kmiData:
137  DPRINTF(Pl050, "Write Data: %#x\n", data);
138  // Clear the TX interrupt before writing new data.
139  setTxInt(false);
140  ps2Device->hostWrite((uint8_t)data);
141  // Data is written in 0 time, so raise the TX interrupt again.
142  setTxInt(true);
143  break;
144 
145  case kmiClkDiv:
146  clkdiv = (uint8_t)data;
147  break;
148 
149  default:
150  warn("PL050: Unhandled write of %#x to offset %#x\n", data, daddr);
151  break;
152  }
153 
154  pkt->makeAtomicResponse();
155  return pioDelay;
156 }
157 
158 void
159 Pl050::setTxInt(bool value)
160 {
161  InterruptReg ints = rawInterrupts;
162 
163  ints.tx = value ? 1 : 0;
164 
165  setInterrupts(ints);
166 }
167 
168 void
170 {
171  InterruptReg ints = rawInterrupts;
172 
173  ints.rx = ps2Device->hostDataAvailable() ? 1 : 0;
174 
175  setInterrupts(ints);
176 }
177 
178 void
179 Pl050::updateIntCtrl(InterruptReg ints, ControlReg ctrl)
180 {
181  const bool old_pending(getInterrupt());
182  control = ctrl;
183  rawInterrupts = ints;
184  const bool new_pending(getInterrupt());
185 
186  if (!old_pending && new_pending) {
187  DPRINTF(Pl050, "Generate interrupt: rawInt=%#x ctrl=%#x int=%#x\n",
188  rawInterrupts, control, getInterrupt());
189  interrupt->raise();
190  } else if (old_pending && !new_pending) {
191  DPRINTF(Pl050, "Clear interrupt: rawInt=%#x ctrl=%#x int=%#x\n",
192  rawInterrupts, control, getInterrupt());
193  interrupt->clear();
194  }
195 }
196 
197 Pl050::InterruptReg
199 {
200  InterruptReg tmp_interrupt(0);
201 
202  tmp_interrupt.tx = rawInterrupts.tx & control.txint_enable;
203  tmp_interrupt.rx = rawInterrupts.rx & control.rxint_enable;
204 
205  return tmp_interrupt;
206 }
207 
208 void
210 {
211  paramOut(cp, "ctrlreg", control);
212  paramOut(cp, "stsreg", status);
214  paramOut(cp, "raw_ints", rawInterrupts);
215 }
216 
217 void
219 {
220  paramIn(cp, "ctrlreg", control);
221  paramIn(cp, "stsreg", status);
223  paramIn(cp, "raw_ints", rawInterrupts);
224 }
225 
226 } // namespace gem5
gem5::AmbaPioDevice::ambaId
uint64_t ambaId
Definition: amba_device.hh:81
gem5::BasicPioDevice::pioAddr
Addr pioAddr
Address that the device listens to.
Definition: io_device.hh:151
gem5::Pl050::getInterrupt
InterruptReg getInterrupt() const
Get current interrupt value.
Definition: kmi.cc:198
warn
#define warn(...)
Definition: logging.hh:245
gem5::Packet::getUintX
uint64_t getUintX(ByteOrder endian) const
Get the data in the packet byte swapped from the specified endianness and zero-extended to 64 bits.
Definition: packet.cc:334
data
const char data[]
Definition: circlebuf.test.cc:48
UNSERIALIZE_SCALAR
#define UNSERIALIZE_SCALAR(scalar)
Definition: serialize.hh:575
amba_device.hh
gem5::CheckpointIn
Definition: serialize.hh:68
vncinput.hh
gem5::Pl050::kmiCr
static const int kmiCr
Definition: kmi.hh:65
gem5::Packet::makeAtomicResponse
void makeAtomicResponse()
Definition: packet.hh:1043
gem5::Pl050::setControl
void setControl(ControlReg ctrl)
Definition: kmi.hh:125
gem5::Pl050
Definition: kmi.hh:62
gem5::Pl050::updateIntCtrl
void updateIntCtrl(InterruptReg ints, ControlReg ctrl)
Update the status of the interrupt and control registers and deliver an interrupt if required.
Definition: kmi.cc:179
packet.hh
gem5::Pl050::setInterrupts
void setInterrupts(InterruptReg ints)
Definition: kmi.hh:124
gem5::ps2::Device::hostWrite
void hostWrite(uint8_t c)
Transmit a character from the host interface to the device.
Definition: device.cc:104
kmi.hh
gem5::Pl050::kmiISR
static const int kmiISR
Definition: kmi.hh:69
gem5::Pl050::updateRxInt
void updateRxInt()
Update the RX interrupt using PS/2 device state.
Definition: kmi.cc:169
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::ps2::Device::hostDataAvailable
bool hostDataAvailable() const
Check if there is pending data from the PS/2 device.
Definition: device.hh:82
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::ArmInterruptPin::clear
virtual void clear()=0
Clear a signalled interrupt.
gem5::Pl050::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: kmi.cc:209
gem5::Pl050::setTxInt
void setTxInt(bool value)
Set or clear the TX interrupt.
Definition: kmi.cc:159
gem5::Pl050::read
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: kmi.cc:63
gem5::BasicPioDevice::pioDelay
Tick pioDelay
Delay that the device experinces on an access.
Definition: io_device.hh:157
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
device.hh
SERIALIZE_SCALAR
#define SERIALIZE_SCALAR(scalar)
Definition: serialize.hh:568
packet_access.hh
gem5::AmbaIntDevice
Definition: amba_device.hh:88
gem5::AmbaIntDevice::interrupt
ArmInterruptPin *const interrupt
Definition: amba_device.hh:91
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:203
gem5::Pl050::kmiClkDiv
static const int kmiClkDiv
Definition: kmi.hh:68
gem5::paramOut
void paramOut(CheckpointOut &cp, const std::string &name, ExtMachInst const &machInst)
Definition: types.cc:40
gem5::Pl050::kmiStat
static const int kmiStat
Definition: kmi.hh:66
gem5::paramIn
void paramIn(CheckpointIn &cp, const std::string &name, ExtMachInst &machInst)
Definition: types.cc:72
gem5::BasicPioDevice::pioSize
Addr pioSize
Size that the device's address range.
Definition: io_device.hh:154
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::Pl050::kmiData
static const int kmiData
Definition: kmi.hh:67
gem5::ArmInterruptPin::raise
virtual void raise()=0
Signal an interrupt.
gem5::AmbaDevice::readId
bool readId(PacketPtr pkt, uint64_t amba_id, Addr pio_addr)
Definition: amba_device.cc:75
trace.hh
gem5::Packet::getAddr
Addr getAddr() const
Definition: packet.hh:781
gem5::Pl050::ps2Device
ps2::Device * ps2Device
PS2 device connected to this KMI interface.
Definition: kmi.hh:131
gem5::Pl050::Pl050
Pl050(const Pl050Params &p)
Definition: kmi.cc:54
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::ps2::Device::hostRead
uint8_t hostRead()
Read a character from the device.
Definition: device.cc:96
gem5::Packet::setUintX
void setUintX(uint64_t w, ByteOrder endian)
Set the value in the word w after truncating it to the length of the packet and then byteswapping it ...
Definition: packet.cc:351
gem5::Pl050::clkdiv
uint8_t clkdiv
clock divisor register This register is just kept around to satisfy reads after driver does writes.
Definition: kmi.hh:102
gem5::Pl050::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: kmi.cc:115
gem5::ps2::Device::hostRegDataAvailable
void hostRegDataAvailable(const std::function< void()> &c)
Register a data available callback into the PS/2 interface.
Definition: device.cc:86
gem5::Packet::getSize
unsigned getSize() const
Definition: packet.hh:791
gem5::Pl050::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: kmi.cc:218
gem5::ArmISA::status
Bitfield< 5, 0 > status
Definition: misc_types.hh:422

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