gem5 v24.1.0.1
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microldstop.hh File Reference
#include <tuple>
#include "arch/x86/insts/microop.hh"
#include "arch/x86/insts/microop_args.hh"
#include "arch/x86/ldstflags.hh"
#include "mem/packet.hh"
#include "mem/request.hh"
#include "sim/faults.hh"

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Classes

class  gem5::X86ISA::MemOp
 Base class for memory ops. More...
 
class  gem5::X86ISA::LdStOp
 Base class for load ops using one integer register. More...
 
class  gem5::X86ISA::LdStFpOp
 Base class for load ops using one FP register. More...
 
class  gem5::X86ISA::MemNoDataOp
 Base class for the tia microop which has no destination register. More...
 
class  gem5::X86ISA::LdStSplitOp
 Base class for load and store ops using two registers, we will call them split ops for this reason. More...
 

Namespaces

namespace  gem5
 Copyright (c) 2024 Arm Limited All rights reserved.
 
namespace  gem5::X86ISA
 This is exposed globally, independent of the ISA.
 

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