28 #ifndef __ARCH_X86_INSTS_MICROOP_ARGS_HH__
29 #define __ARCH_X86_INSTS_MICROOP_ARGS_HH__
35 #include <type_traits>
62 template <
class InstType>
64 size(inst->getDestSize())
75 template <
class InstType>
77 size(inst->getSrcSize())
88 template <
class InstType>
90 size(inst->getSrcSize())
122 template <
class T,
class Enabled=
void>
126 struct HasDataSize<T, decltype((void)&T::dataSize)> :
public std::true_type {};
131 template <
class Base>
136 template <
class Inst>
141 template <
class Inst>
142 IntOp(Inst *inst, std::enable_if_t<!HasDataSizeV<Inst>,
ArgType> idx) :
153 template <
class Base>
158 template <
class InstType>
170 template <
class Base>
175 template <
class InstType>
185 template <
class Base>
190 template <
class InstType>
201 template <
class Base>
206 template <
class InstType>
216 template <
class Base>
221 template <
class InstType>
231 template <
class Base>
236 template <
class Inst>
241 template <
class Inst>
285 template <
class InstType>
301 template <
class InstType>
317 template <
class InstType>
333 template <
class InstType>
361 template <
class InstType>
366 size(inst->addressSize)
379 template <
typename Base,
typename ...Operands>
383 using ArgTuple = std::tuple<
typename Operands::ArgType...>;
385 template <std::size_t ...I,
typename ...CTorArgs>
387 const char *mnem,
const char *inst_mnem, uint64_t set_flags,
388 OpClass op_class, [[maybe_unused]]
ArgTuple args,
389 CTorArgs... ctor_args) :
390 Base(mach_inst, mnem, inst_mnem, set_flags, op_class, ctor_args...),
391 Operands(this,
std::get<I>(args))...
395 template <
typename ...CTorArgs>
397 const char *inst_mnem, uint64_t set_flags, OpClass op_class,
398 ArgTuple args, CTorArgs... ctor_args) :
400 mach_inst, mnem, inst_mnem, set_flags, op_class,
401 std::move(args), ctor_args...)
408 std::stringstream response;
409 Base::printMnemonic(response, this->instMnem, this->mnemonic);
411 GEM5_FOR_EACH_IN_PACK(
ccprintf(response,
count++ ?
", " :
""),
412 Operands::print(response));
413 return response.str();
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
InstOperands(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, OpClass op_class, ArgTuple args, CTorArgs... ctor_args)
InstOperands(std::index_sequence< I... >, ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, OpClass op_class, [[maybe_unused]] ArgTuple args, CTorArgs... ctor_args)
std::tuple< typename Operands::ArgType... > ArgTuple
static void printMem(std::ostream &os, uint8_t segment, uint8_t scale, RegIndex index, RegIndex base, uint64_t disp, uint8_t addressSize, bool rip)
static void printSegment(std::ostream &os, int segment)
static void printReg(std::ostream &os, RegId reg, int size)
constexpr RegClass miscRegClass(MiscRegClass, MiscRegClassName, misc_reg::NumRegs, debug::MiscRegs)
constexpr RegClass intRegClass
constexpr bool HasDataSizeV
static constexpr RegId intRegFolded(RegIndex index, RegIndex foldBit)
constexpr RegClass floatRegClass
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
std::shared_ptr< FaultBase > Fault
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
void ccprintf(cp::Print &print)
Overload hash function for BasicBlockRange type.
void print(std::ostream &os) const
AddrOp(InstType *inst, const ArgType &args)
CrOp(InstType *inst, ArgType idx)
void print(std::ostream &os) const
DataHiOp(RegIndex data_hi, size_t _size)
DataLowOp(RegIndex data_low, size_t _size)
DataOp(RegIndex _data, size_t _size)
void print(std::ostream &os) const
DbgOp(InstType *inst, ArgType idx)
DestOp(RegIndex _dest, InstType *inst)
DestOp(RegIndex _dest, size_t _size)
void print(std::ostream &os) const
FaultOp(InstType *inst, ArgType _fault)
FloatOp(Inst *inst, std::enable_if_t< HasDataSizeV< Inst >, ArgType > idx)
FloatOp(Inst *inst, std::enable_if_t<!HasDataSizeV< Inst >, ArgType > idx)
void print(std::ostream &os) const
void print(std::ostream &os) const
FoldedOp(InstType *inst, ArgType idx)
Classes for register indices passed to instruction constructors.
void print(std::ostream &os) const
Imm64Op(InstType *inst, ArgType _imm64)
Imm8Op(InstType *inst, ArgType _imm8)
void print(std::ostream &os) const
IntOp(Inst *inst, std::enable_if_t<!HasDataSizeV< Inst >, ArgType > idx)
void print(std::ostream &os) const
IntOp(Inst *inst, std::enable_if_t< HasDataSizeV< Inst >, ArgType > idx)
MiscOp(InstType *inst, ArgType idx)
void print(std::ostream &os) const
SegOp(InstType *inst, ArgType idx)
void print(std::ostream &os) const
Src1Op(RegIndex _src1, size_t _size)
Src1Op(RegIndex _src1, InstType *inst)
Src2Op(RegIndex _src2, InstType *inst)
Src2Op(RegIndex _src2, size_t _size)
UpcOp(InstType *inst, ArgType _target)
void print(std::ostream &os) const