39#ifndef __ARCH_X86_INSTS_MICROLDSTOP_HH__
40#define __ARCH_X86_INSTS_MICROLDSTOP_HH__
67 uint64_t set_flags, OpClass op_class,
68 uint8_t data_size, uint8_t address_size,
93 uint8_t data_size, uint8_t address_size,
96 mach_inst, mnem, inst_mnem, set_flags, op_class,
97 { _data, { _scale, _index, _base, _disp, _segment } },
98 data_size, address_size, mem_flags | _segment.
index)
112 uint8_t data_size, uint8_t address_size,
115 mach_inst, mnem, inst_mnem, set_flags, op_class,
116 { _data, { _scale, _index, _base, _disp, _segment } },
117 data_size, address_size, mem_flags | _segment.
index)
128 uint64_t set_flags, uint8_t _scale,
GpRegIndex _index,
130 uint8_t data_size, uint8_t address_size,
133 mach_inst, mnem, inst_mnem, set_flags, op_class,
134 { { _scale, _index, _base, _disp, _segment } },
135 data_size, address_size, mem_flags | _segment.
index)
145 public InstOperands<MemOp, FoldedDataLowOp, FoldedDataHiOp, AddrOp>
152 uint8_t data_size, uint8_t address_size,
155 mach_inst, mnem, inst_mnem, set_flags, op_class,
156 { data_low, data_hi, { _scale, _index, _base, _disp, _segment } },
157 data_size, address_size, mem_flags | _segment.
index)
Base class for load ops using one FP register.
LdStFpOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, FpRegIndex _data, uint8_t _scale, GpRegIndex _index, GpRegIndex _base, uint64_t _disp, SegRegIndex _segment, uint8_t data_size, uint8_t address_size, Request::FlagsType mem_flags, OpClass op_class)
Base class for load ops using one integer register.
LdStOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, GpRegIndex _data, uint8_t _scale, GpRegIndex _index, GpRegIndex _base, uint64_t _disp, SegRegIndex _segment, uint8_t data_size, uint8_t address_size, Request::FlagsType mem_flags, OpClass op_class)
Base class for load and store ops using two registers, we will call them split ops for this reason.
LdStSplitOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, GpRegIndex data_low, GpRegIndex data_hi, uint8_t _scale, GpRegIndex _index, GpRegIndex _base, uint64_t _disp, SegRegIndex _segment, uint8_t data_size, uint8_t address_size, Request::FlagsType mem_flags, OpClass op_class)
Base class for the tia microop which has no destination register.
MemNoDataOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, uint8_t _scale, GpRegIndex _index, GpRegIndex _base, uint64_t _disp, SegRegIndex _segment, uint8_t data_size, uint8_t address_size, Request::FlagsType mem_flags, OpClass op_class)
Base class for memory ops.
MemOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, OpClass op_class, uint8_t data_size, uint8_t address_size, Request::FlagsType mem_flags)
const Request::FlagsType memFlags
const uint8_t addressSize
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Declaration of the Packet class.
Declaration of a request, the overall memory request consisting of the parts of the request that are ...
Classes for register indices passed to instruction constructors.