gem5  v22.0.0.1
microldstop.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2007 The Hewlett-Packard Development Company
3  * Copyright (c) 2015 Advanced Micro Devices, Inc.
4  * All rights reserved.
5  *
6  * The license below extends only to copyright in the software and shall
7  * not be construed as granting a license to any other intellectual
8  * property including but not limited to intellectual property relating
9  * to a hardware implementation of the functionality of the software
10  * licensed hereunder. You may use the software subject to the license
11  * terms below provided that you ensure that this notice is replicated
12  * unmodified and in its entirety in all distributions of the software,
13  * modified or unmodified, in source code or in binary form.
14  *
15  * Redistribution and use in source and binary forms, with or without
16  * modification, are permitted provided that the following conditions are
17  * met: redistributions of source code must retain the above copyright
18  * notice, this list of conditions and the following disclaimer;
19  * redistributions in binary form must reproduce the above copyright
20  * notice, this list of conditions and the following disclaimer in the
21  * documentation and/or other materials provided with the distribution;
22  * neither the name of the copyright holders nor the names of its
23  * contributors may be used to endorse or promote products derived from
24  * this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #ifndef __ARCH_X86_INSTS_MICROLDSTOP_HH__
40 #define __ARCH_X86_INSTS_MICROLDSTOP_HH__
41 
42 #include <tuple>
43 
46 #include "arch/x86/ldstflags.hh"
47 #include "mem/packet.hh"
48 #include "mem/request.hh"
49 #include "sim/faults.hh"
50 
51 namespace gem5
52 {
53 
54 namespace X86ISA
55 {
56 
60 class MemOp : public X86MicroopBase
61 {
62  protected:
64 
65  //Constructor
66  MemOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem,
67  uint64_t set_flags, OpClass op_class,
68  uint8_t data_size, uint8_t address_size,
69  Request::FlagsType mem_flags) :
70  X86MicroopBase(mach_inst, mnem, inst_mnem, set_flags, op_class),
71  memFlags(mem_flags),
72  dataSize(data_size), addressSize(address_size),
73  foldOBit((dataSize == 1 && !mach_inst.rex.present) ? 1 << 6 : 0),
74  foldABit((addressSize == 1 && !mach_inst.rex.present) ? 1 << 6 : 0)
75  {}
76 
77  public:
78  const uint8_t dataSize;
79  const uint8_t addressSize;
81 };
82 
86 class LdStOp : public InstOperands<MemOp, FoldedDataOp, AddrOp>
87 {
88  protected:
89  LdStOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem,
90  uint64_t set_flags, GpRegIndex _data,
91  uint8_t _scale, GpRegIndex _index, GpRegIndex _base,
92  uint64_t _disp, SegRegIndex _segment,
93  uint8_t data_size, uint8_t address_size,
94  Request::FlagsType mem_flags, OpClass op_class) :
96  mach_inst, mnem, inst_mnem, set_flags, op_class,
97  { _data, { _scale, _index, _base, _disp, _segment } },
98  data_size, address_size, mem_flags | _segment.index)
99  {}
100 };
101 
105 class LdStFpOp : public InstOperands<MemOp, FloatDataOp, AddrOp>
106 {
107  protected:
108  LdStFpOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem,
109  uint64_t set_flags, FpRegIndex _data,
110  uint8_t _scale, GpRegIndex _index, GpRegIndex _base,
111  uint64_t _disp, SegRegIndex _segment,
112  uint8_t data_size, uint8_t address_size,
113  Request::FlagsType mem_flags, OpClass op_class) :
115  mach_inst, mnem, inst_mnem, set_flags, op_class,
116  { _data, { _scale, _index, _base, _disp, _segment } },
117  data_size, address_size, mem_flags | _segment.index)
118  {}
119 };
120 
124 class MemNoDataOp : public InstOperands<MemOp, AddrOp>
125 {
126  protected:
127  MemNoDataOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem,
128  uint64_t set_flags, uint8_t _scale, GpRegIndex _index,
129  GpRegIndex _base, uint64_t _disp, SegRegIndex _segment,
130  uint8_t data_size, uint8_t address_size,
131  Request::FlagsType mem_flags, OpClass op_class) :
133  mach_inst, mnem, inst_mnem, set_flags, op_class,
134  { { _scale, _index, _base, _disp, _segment } },
135  data_size, address_size, mem_flags | _segment.index)
136  {}
137 };
138 
144 class LdStSplitOp :
145  public InstOperands<MemOp, FoldedDataLowOp, FoldedDataHiOp, AddrOp>
146 {
147  protected:
148  LdStSplitOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem,
149  uint64_t set_flags, GpRegIndex data_low, GpRegIndex data_hi,
150  uint8_t _scale, GpRegIndex _index, GpRegIndex _base,
151  uint64_t _disp, SegRegIndex _segment,
152  uint8_t data_size, uint8_t address_size,
153  Request::FlagsType mem_flags, OpClass op_class) :
155  mach_inst, mnem, inst_mnem, set_flags, op_class,
156  { data_low, data_hi, { _scale, _index, _base, _disp, _segment } },
157  data_size, address_size, mem_flags | _segment.index)
158  {}
159 };
160 
161 } // namespace X86ISA
162 } // namespace gem5
163 
164 #endif //__ARCH_X86_INSTS_MICROLDSTOP_HH__
gem5::X86ISA::FpRegIndex
Definition: static_inst.hh:66
gem5::X86ISA::GpRegIndex
Classes for register indices passed to instruction constructors.
Definition: static_inst.hh:60
gem5::X86ISA::MemNoDataOp::MemNoDataOp
MemNoDataOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, uint8_t _scale, GpRegIndex _index, GpRegIndex _base, uint64_t _disp, SegRegIndex _segment, uint8_t data_size, uint8_t address_size, Request::FlagsType mem_flags, OpClass op_class)
Definition: microldstop.hh:127
gem5::X86ISA::MemOp::foldOBit
const RegIndex foldOBit
Definition: microldstop.hh:80
gem5::X86ISA::MemOp::addressSize
const uint8_t addressSize
Definition: microldstop.hh:79
gem5::X86ISA::LdStFpOp::LdStFpOp
LdStFpOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, FpRegIndex _data, uint8_t _scale, GpRegIndex _index, GpRegIndex _base, uint64_t _disp, SegRegIndex _segment, uint8_t data_size, uint8_t address_size, Request::FlagsType mem_flags, OpClass op_class)
Definition: microldstop.hh:108
gem5::X86ISA::LdStSplitOp::LdStSplitOp
LdStSplitOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, GpRegIndex data_low, GpRegIndex data_hi, uint8_t _scale, GpRegIndex _index, GpRegIndex _base, uint64_t _disp, SegRegIndex _segment, uint8_t data_size, uint8_t address_size, Request::FlagsType mem_flags, OpClass op_class)
Definition: microldstop.hh:148
microop.hh
ldstflags.hh
microop_args.hh
gem5::X86ISA::LdStFpOp
Base class for load ops using one FP register.
Definition: microldstop.hh:105
faults.hh
gem5::X86ISA::SegRegIndex::index
RegIndex index
Definition: static_inst.hh:92
gem5::X86ISA::AddrOp
Definition: microop_args.hh:344
gem5::Request::FlagsType
uint64_t FlagsType
Definition: request.hh:100
request.hh
gem5::X86ISA::MemOp::MemOp
MemOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, OpClass op_class, uint8_t data_size, uint8_t address_size, Request::FlagsType mem_flags)
Definition: microldstop.hh:66
gem5::X86ISA::LdStOp
Base class for load ops using one integer register.
Definition: microldstop.hh:86
packet.hh
gem5::X86ISA::LdStSplitOp
Base class for load and store ops using two registers, we will call them split ops for this reason.
Definition: microldstop.hh:144
gem5::X86ISA::present
Bitfield< 7 > present
Definition: misc.hh:992
gem5::X86ISA::FoldedOp
Definition: microop_args.hh:153
gem5::X86ISA::MemOp::dataSize
const uint8_t dataSize
Definition: microldstop.hh:78
gem5::X86ISA::ExtMachInst
Definition: types.hh:212
gem5::X86ISA::LdStOp::LdStOp
LdStOp(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, GpRegIndex _data, uint8_t _scale, GpRegIndex _index, GpRegIndex _base, uint64_t _disp, SegRegIndex _segment, uint8_t data_size, uint8_t address_size, Request::FlagsType mem_flags, OpClass op_class)
Definition: microldstop.hh:89
gem5::X86ISA::FloatOp
Definition: microop_args.hh:233
gem5::X86ISA::MemOp
Base class for memory ops.
Definition: microldstop.hh:60
gem5::X86ISA::MemOp::memFlags
const Request::FlagsType memFlags
Definition: microldstop.hh:63
gem5::X86ISA::InstOperands
Definition: microop_args.hh:381
gem5::X86ISA::MemOp::foldABit
const RegIndex foldABit
Definition: microldstop.hh:80
gem5::RegIndex
uint16_t RegIndex
Definition: types.hh:176
gem5::X86ISA::MemNoDataOp
Base class for the tia microop which has no destination register.
Definition: microldstop.hh:124
gem5::X86ISA::X86MicroopBase
Definition: microop.hh:98
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::X86ISA::SegRegIndex
Definition: static_inst.hh:90

Generated on Sat Jun 18 2022 08:12:17 for gem5 by doxygen 1.8.17