gem5  v22.0.0.2
microop.hh
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37 
38 #ifndef __ARCH_X86_INSTS_MICROOP_HH__
39 #define __ARCH_X86_INSTS_MICROOP_HH__
40 
42 #include "arch/x86/pcstate.hh"
43 #include "base/compiler.hh"
44 
45 namespace gem5
46 {
47 
48 namespace X86ISA
49 {
50 
51 GEM5_DEPRECATED_NAMESPACE(ConditionTests, condition_tests);
52 namespace condition_tests
53 {
54 
56 {
59  ECF,
60  EZF,
66  OF,
67  CF,
68  ZF,
70  SF,
71  PF,
74 
92 };
93 
94 }
95 
96 //A class which is the base of all x86 micro ops. It provides a function to
97 //set necessary flags appropriately.
99 {
100  protected:
101  const char * instMnem;
102  uint8_t opSize;
103  uint8_t addrSize;
104 
106  const char *mnem, const char *_instMnem,
107  uint64_t setFlags, OpClass __opClass) :
108  X86ISA::X86StaticInst(mnem, _machInst, __opClass),
109  instMnem(_instMnem)
110  {
111  const int ChunkSize = sizeof(unsigned long);
112  const int Chunks = sizeof(setFlags) / ChunkSize;
113 
114  // Since the bitset constructor can only handle unsigned long
115  // sized chunks, feed it those one at a time while oring them in.
116  for (int i = 0; i < Chunks; i++) {
117  unsigned shift = i * ChunkSize * 8;
118  flags |= (std::bitset<Num_Flags>(setFlags >> shift) << shift);
119  }
120  }
121 
122  std::string
124  const loader::SymbolTable *symtab) const override
125  {
126  std::stringstream ss;
127 
128  ccprintf(ss, "\t%s.%s", instMnem, mnemonic);
129 
130  return ss.str();
131  }
132 
133  bool checkCondition(uint64_t flags, int condition) const;
134 
135  void
136  advancePC(PCStateBase &pcState) const override
137  {
138  auto &xpc = pcState.as<PCState>();
139  if (flags[IsLastMicroop])
140  xpc.uEnd();
141  else
142  xpc.uAdvance();
143  }
144 
145  void
146  advancePC(ThreadContext *tc) const override
147  {
148  PCState pc = tc->pcState().as<PCState>();
149  if (flags[IsLastMicroop])
150  pc.uEnd();
151  else
152  pc.uAdvance();
153  tc->pcState(pc);
154  }
155 
156  std::unique_ptr<PCStateBase> branchTarget(
157  const PCStateBase &branch_pc) const override;
158 
159  // Explicitly import the otherwise hidden branchTarget.
161 };
162 
164 {
165  protected:
166  uint8_t cc;
167 
168  public:
169  MicroCondBase(ExtMachInst mach_inst, const char *mnem,
170  const char *inst_mnem, uint64_t set_flags, OpClass op_class,
171  uint8_t _cc) :
172  X86MicroopBase(mach_inst, mnem, inst_mnem, set_flags, op_class),
173  cc(_cc)
174  {}
175 };
176 
177 } // namespace X86ISA
178 } // namespace gem5
179 
180 #endif //__ARCH_X86_INSTS_MICROOP_HH__
gem5::X86ISA::pc
Bitfield< 19 > pc
Definition: misc.hh:805
pcstate.hh
gem5::X86ISA::condition_tests::ECF
@ ECF
Definition: microop.hh:59
gem5::X86ISA::X86MicroopBase::advancePC
void advancePC(PCStateBase &pcState) const override
Definition: microop.hh:136
gem5::X86ISA::condition_tests::NotEZF
@ NotEZF
Definition: microop.hh:78
static_inst.hh
gem5::X86ISA::condition_tests::PF
@ PF
Definition: microop.hh:71
gem5::X86ISA::condition_tests::MSTRC
@ MSTRC
Definition: microop.hh:64
gem5::X86ISA::condition_tests::NotECF
@ NotECF
Definition: microop.hh:77
gem5::X86ISA::condition_tests::STRnZnEZF
@ STRnZnEZF
Definition: microop.hh:83
gem5::PCStateBase::as
Target & as()
Definition: pcstate.hh:72
gem5::X86ISA::condition_tests::NotFalse
@ NotFalse
Definition: microop.hh:58
gem5::ThreadContext::pcState
virtual const PCStateBase & pcState() const =0
gem5::X86ISA::X86MicroopBase::advancePC
void advancePC(ThreadContext *tc) const override
Definition: microop.hh:146
gem5::X86ISA::GEM5_DEPRECATED_NAMESPACE
GEM5_DEPRECATED_NAMESPACE(IntelMP, intelmp)
gem5::X86ISA::condition_tests::MSTRZ
@ MSTRZ
Definition: microop.hh:62
gem5::loader::SymbolTable
Definition: symtab.hh:65
gem5::X86ISA::X86MicroopBase::addrSize
uint8_t addrSize
Definition: microop.hh:103
gem5::X86ISA::X86MicroopBase::opSize
uint8_t opSize
Definition: microop.hh:102
gem5::X86ISA::PCState::uEnd
void uEnd()
Definition: pcstate.hh:105
gem5::X86ISA::X86MicroopBase::generateDisassembly
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: microop.hh:123
gem5::X86ISA::condition_tests::OF
@ OF
Definition: microop.hh:66
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:67
gem5::X86ISA::condition_tests::NotPF
@ NotPF
Definition: microop.hh:89
gem5::ccprintf
void ccprintf(cp::Print &print)
Definition: cprintf.hh:130
gem5::X86ISA::condition_tests::CvZF
@ CvZF
Definition: microop.hh:69
gem5::X86ISA::condition_tests::NotZF
@ NotZF
Definition: microop.hh:86
gem5::ArmISA::shift
Bitfield< 6, 5 > shift
Definition: types.hh:117
gem5::X86ISA::X86MicroopBase::checkCondition
bool checkCondition(uint64_t flags, int condition) const
Definition: microop.cc:49
gem5::X86ISA::condition_tests::NotSxOF
@ NotSxOF
Definition: microop.hh:90
gem5::X86ISA::condition_tests::NotMSTRC
@ NotMSTRC
Definition: microop.hh:82
gem5::X86ISA::MicroCondBase
Definition: microop.hh:163
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:94
gem5::X86ISA::condition_tests::NotOF
@ NotOF
Definition: microop.hh:84
gem5::X86ISA::condition_tests::SF
@ SF
Definition: microop.hh:70
gem5::X86ISA::condition_tests::STRZ
@ STRZ
Definition: microop.hh:63
gem5::X86ISA::condition_tests::NotSTRZ
@ NotSTRZ
Definition: microop.hh:81
gem5::X86ISA::condition_tests::CondTest
CondTest
Definition: microop.hh:55
gem5::X86ISA::condition_tests::NotCF
@ NotCF
Definition: microop.hh:85
gem5::StaticInst::flags
std::bitset< Num_Flags > flags
Flag values for this instruction.
Definition: static_inst.hh:103
ss
std::stringstream ss
Definition: trace.test.cc:45
compiler.hh
gem5::X86ISA::condition_tests::STRZnEZF
@ STRZnEZF
Definition: microop.hh:65
gem5::X86ISA::condition_tests::False
@ False
Definition: microop.hh:75
gem5::X86ISA::condition_tests::NotMSTRZ
@ NotMSTRZ
Definition: microop.hh:80
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::X86ISA::MicroCondBase::cc
uint8_t cc
Definition: microop.hh:166
gem5::X86ISA::condition_tests::SZnZF
@ SZnZF
Definition: microop.hh:61
gem5::X86ISA::condition_tests::SxOF
@ SxOF
Definition: microop.hh:72
gem5::X86ISA::ExtMachInst
Definition: types.hh:212
gem5::X86ISA::condition_tests::NotTrue
@ NotTrue
Definition: microop.hh:76
gem5::X86ISA::X86StaticInst
Base class for all X86 static instructions.
Definition: static_inst.hh:100
gem5::X86ISA::PCState
Definition: pcstate.hh:50
gem5::StaticInst::branchTarget
virtual std::unique_ptr< PCStateBase > branchTarget(const PCStateBase &pc) const
Return the target address for a PC-relative branch.
Definition: static_inst.cc:46
gem5::X86ISA::condition_tests::NotSZnZF
@ NotSZnZF
Definition: microop.hh:79
gem5::PCStateBase
Definition: pcstate.hh:57
gem5::X86ISA::MicroCondBase::MicroCondBase
MicroCondBase(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, OpClass op_class, uint8_t _cc)
Definition: microop.hh:169
gem5::X86ISA::condition_tests::NotSF
@ NotSF
Definition: microop.hh:88
gem5::X86ISA::X86MicroopBase
Definition: microop.hh:98
gem5::X86ISA::X86MicroopBase::instMnem
const char * instMnem
Definition: microop.hh:101
gem5::X86ISA::X86MicroopBase::X86MicroopBase
X86MicroopBase(ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, OpClass __opClass)
Definition: microop.hh:105
gem5::StaticInst::mnemonic
const char * mnemonic
Base mnemonic (e.g., "add").
Definition: static_inst.hh:259
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::X86ISA::X86MicroopBase::branchTarget
std::unique_ptr< PCStateBase > branchTarget(const PCStateBase &branch_pc) const override
Return the target address for a PC-relative branch.
Definition: microop.cc:126
gem5::X86ISA::condition_tests::NotCvZF
@ NotCvZF
Definition: microop.hh:87
gem5::X86ISA::condition_tests::EZF
@ EZF
Definition: microop.hh:60
gem5::X86ISA::condition_tests::ZF
@ ZF
Definition: microop.hh:68
gem5::X86ISA::condition_tests::CF
@ CF
Definition: microop.hh:67
gem5::X86ISA::condition_tests::NotSxOvZF
@ NotSxOvZF
Definition: microop.hh:91
gem5::X86ISA::condition_tests::SxOvZF
@ SxOvZF
Definition: microop.hh:73
gem5::X86ISA::condition_tests::True
@ True
Definition: microop.hh:57

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