gem5 v24.0.0.0
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queue_entry.hh
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1/*
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40
46#ifndef __MEM_CACHE_QUEUE_ENTRY_HH__
47#define __MEM_CACHE_QUEUE_ENTRY_HH__
48
49#include "base/named.hh"
50#include "base/types.hh"
51#include "mem/packet.hh"
52
53namespace gem5
54{
55
56class BaseCache;
57
62class QueueEntry : public Packet::SenderState, public Named
63{
64
68 template <class Entry>
69 friend class Queue;
70
71 protected:
72
75
78
79 public:
87 class Target
88 {
89 public:
90 const Tick recvTime;
92 const Counter order;
94
103 Target(PacketPtr _pkt, Tick ready_time, Counter _order)
104 : recvTime(curTick()), readyTime(ready_time), order(_order),
105 pkt(_pkt)
106 {}
107 };
108
111
114
117
119 unsigned blkSize;
120
123
124 QueueEntry(const std::string &name)
125 : Named(name),
126 readyTime(0), _isUncacheable(false),
127 inService(false), order(0), blkAddr(0), blkSize(0), isSecure(false)
128 {}
129
130 bool isUncacheable() const { return _isUncacheable; }
131
139 virtual bool matchBlockAddr(const Addr addr, const bool is_secure)
140 const = 0;
141
149 virtual bool matchBlockAddr(const PacketPtr pkt) const = 0;
150
157 virtual bool conflictAddr(const QueueEntry* entry) const = 0;
158
163 virtual bool sendPacket(BaseCache &cache) = 0;
164
170 virtual Target* getTarget() = 0;
171};
172
173} // namespace gem5
174
175#endif // __MEM_CACHE_QUEUE_ENTRY_HH__
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
A basic cache interface.
Definition base.hh:100
Interface for things with names.
Definition named.hh:39
virtual std::string name() const
Definition named.hh:47
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
A queue entry is holding packets that will be serviced as soon as resources are available.
Target(PacketPtr _pkt, Tick ready_time, Counter _order)
Default constructor.
const Tick readyTime
Time when request is ready to be serviced.
const Tick recvTime
Time when request was received (for stats)
PacketPtr pkt
Pending request packet.
const Counter order
Global order (for memory consistency mgmt)
A queue entry base class, to be used by both the MSHRs and write-queue entries.
bool _isUncacheable
True if the entry is uncacheable.
bool isUncacheable() const
virtual bool sendPacket(BaseCache &cache)=0
Send this queue entry as a downstream packet, with the exact behaviour depending on the specific entr...
virtual bool matchBlockAddr(const PacketPtr pkt) const =0
Check if entry contains a packet that corresponds to the one being looked for.
unsigned blkSize
Block size of the cache.
virtual bool matchBlockAddr(const Addr addr, const bool is_secure) const =0
Check if entry corresponds to the one being looked for.
virtual bool conflictAddr(const QueueEntry *entry) const =0
Check if given entry's packets conflict with this' entries packets.
virtual Target * getTarget()=0
Returns a pointer to the first target.
Addr blkAddr
Block aligned address.
Counter order
Order number assigned to disambiguate writes and misses.
bool inService
True if the entry has been sent downstream.
QueueEntry(const std::string &name)
bool isSecure
True if the entry targets the secure memory space.
Tick readyTime
Tick when ready to issue.
A high-level queue interface, to be used by both the MSHR queue and the write buffer.
Definition queue.hh:71
Bitfield< 3 > addr
Definition types.hh:84
double Counter
All counters are of 64-bit values.
Definition types.hh:46
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
Tick curTick()
The universal simulation clock.
Definition cur_tick.hh:46
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
uint64_t Tick
Tick count type.
Definition types.hh:58
Declaration of the Packet class.
A virtual base opaque structure used to hold state associated with the packet (e.g....
Definition packet.hh:469

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