gem5  v22.0.0.2
sc_lv.hh
Go to the documentation of this file.
1 /*****************************************************************************
2 
3  Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
4  more contributor license agreements. See the NOTICE file distributed
5  with this work for additional information regarding copyright ownership.
6  Accellera licenses this file to you under the Apache License, Version 2.0
7  (the "License"); you may not use this file except in compliance with the
8  License. You may obtain a copy of the License at
9 
10  http://www.apache.org/licenses/LICENSE-2.0
11 
12  Unless required by applicable law or agreed to in writing, software
13  distributed under the License is distributed on an "AS IS" BASIS,
14  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
15  implied. See the License for the specific language governing
16  permissions and limitations under the License.
17 
18  *****************************************************************************/
19 
20 /*****************************************************************************
21 
22  sc_lv.h -- Arbitrary size logic vector class.
23 
24  Original Author: Gene Bushuyev, Synopsys, Inc.
25 
26  *****************************************************************************/
27 
28 /*****************************************************************************
29 
30  MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31  changes you are making here.
32 
33  Name, Affiliation, Date:
34  Description of Modification:
35 
36  *****************************************************************************/
37 
38 // $Log: sc_lv.h,v $
39 // Revision 1.1.1.1 2006/12/15 20:20:04 acg
40 // SystemC 2.3
41 //
42 // Revision 1.3 2006/01/13 18:53:53 acg
43 // Andy Goodrich: added $Log command so that CVS comments are reproduced in
44 // the source.
45 //
46 
47 #ifndef __SYSTEMC_EXT_DT_BIT_SC_LV_HH__
48 #define __SYSTEMC_EXT_DT_BIT_SC_LV_HH__
49 
50 #include "sc_lv_base.hh"
51 
52 namespace sc_dt
53 {
54 
55 // classes defined in this module
56 template <int W>
57 class sc_lv;
58 
59 
60 // ----------------------------------------------------------------------------
61 // CLASS TEMPLATE : sc_lv<W>
62 //
63 // Arbitrary size logic vector class.
64 // ----------------------------------------------------------------------------
65 
66 template <int W>
67 class sc_lv : public sc_lv_base
68 {
69  public:
70  // constructors
71  sc_lv() : sc_lv_base(W) {}
72  explicit sc_lv(const sc_logic &init_value) : sc_lv_base(init_value, W) {}
73  explicit sc_lv(bool init_value) : sc_lv_base(sc_logic(init_value), W) {}
74  explicit sc_lv(char init_value) : sc_lv_base(sc_logic(init_value), W) {}
75  sc_lv(const char *a) : sc_lv_base(W) { sc_lv_base::operator = (a); }
76  sc_lv(const bool *a) : sc_lv_base(W) { sc_lv_base::operator = (a); }
77  sc_lv(const sc_logic *a) : sc_lv_base(W) { sc_lv_base::operator = (a); }
78  sc_lv(const sc_unsigned &a) : sc_lv_base(W) { sc_lv_base::operator = (a); }
79  sc_lv(const sc_signed &a) : sc_lv_base(W) { sc_lv_base::operator = (a); }
80  sc_lv(const sc_uint_base &a) : sc_lv_base(W)
81  {
83  }
84  sc_lv(const sc_int_base &a) : sc_lv_base(W) { sc_lv_base::operator = (a); }
85  sc_lv(unsigned long a) : sc_lv_base(W) { sc_lv_base::operator = (a); }
86  sc_lv(long a) : sc_lv_base(W) { sc_lv_base::operator = (a); }
87  sc_lv(unsigned int a) : sc_lv_base(W) { sc_lv_base::operator = (a); }
88  sc_lv(int a) : sc_lv_base(W) { sc_lv_base::operator = (a); }
89  sc_lv(uint64 a) : sc_lv_base(W) { sc_lv_base::operator = (a); }
90  sc_lv(int64 a) : sc_lv_base(W) { sc_lv_base::operator = (a); }
91  template <class X>
92  sc_lv(const sc_proxy<X> &a) : sc_lv_base(W) { sc_lv_base::operator = (a); }
93  sc_lv(const sc_lv<W> &a) : sc_lv_base(a) {}
94 
95  // assignment operators
96  template <class X>
97  sc_lv<W> &
98  operator = (const sc_proxy<X> &a)
99  {
101  return *this;
102  }
103 
106  {
108  return *this;
109  }
110 
112  operator = (const char *a)
113  {
115  return *this;
116  }
117 
119  operator = (const bool *a)
120  {
122  return *this;
123  }
124 
125  sc_lv<W> &
126  operator = (const sc_logic *a)
127  {
129  return *this;
130  }
131 
132  sc_lv<W> &
133  operator = (const sc_unsigned &a)
134  {
136  return *this;
137  }
138 
139  sc_lv<W> &
140  operator = (const sc_signed &a)
141  {
143  return *this;
144  }
145 
146  sc_lv<W> &
147  operator = (const sc_uint_base &a)
148  {
150  return *this;
151  }
152 
153  sc_lv<W> &
154  operator = (const sc_int_base &a)
155  {
157  return *this;
158  }
159 
160  sc_lv<W> &
161  operator = (unsigned long a)
162  {
164  return *this;
165  }
166 
167  sc_lv<W> &
168  operator = (long a)
169  {
171  return *this;
172  }
173 
174  sc_lv<W> &
175  operator = (unsigned int a)
176  {
178  return *this;
179  }
180 
181  sc_lv<W> &
182  operator = (int a)
183  {
185  return *this;
186  }
187 
188  sc_lv<W> &
190  {
192  return *this;
193  }
194 
195  sc_lv<W> &
197  {
199  return *this;
200  }
201 };
202 
203 } // namespace sc_dt
204 
205 #endif // __SYSTEMC_EXT_DT_BIT_SC_LV_HH__
sc_dt::sc_lv::operator=
sc_lv< W > & operator=(const sc_proxy< X > &a)
Definition: sc_lv.hh:129
sc_dt
Definition: sc_bit.cc:67
sc_dt::sc_lv_base::operator=
sc_lv_base & operator=(const sc_proxy< X > &a)
Definition: sc_lv_base.hh:163
sc_dt::sc_int_base
Definition: sc_int_base.hh:494
gem5::ArmISA::a
Bitfield< 8 > a
Definition: misc_types.hh:66
sc_dt::sc_signed
Definition: sc_signed.hh:984
sc_dt::sc_logic
Definition: sc_logic.hh:130
sc_dt::sc_lv
Definition: sc_in_rv.hh:41
sc_dt::sc_lv::sc_lv
sc_lv()
Definition: sc_lv.hh:102
sc_dt::uint64
uint64_t uint64
Definition: sc_nbdefs.hh:206
sc_dt::int64
int64_t int64
Definition: sc_nbdefs.hh:205
sc_dt::sc_uint_base
Definition: sc_uint_base.hh:465
sc_dt::sc_unsigned
Definition: sc_unsigned.hh:890
sc_lv_base.hh

Generated on Thu Jul 28 2022 13:32:38 for gem5 by doxygen 1.8.17