gem5  v21.1.0.2
simple_mem.hh
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40 
46 #ifndef __MEM_SIMPLE_MEMORY_HH__
47 #define __MEM_SIMPLE_MEMORY_HH__
48 
49 #include <list>
50 
51 #include "mem/abstract_mem.hh"
52 #include "mem/port.hh"
53 #include "params/SimpleMemory.hh"
54 
55 namespace gem5
56 {
57 
58 namespace memory
59 {
60 
68 {
69 
70  private:
71 
77  {
78 
79  public:
80 
81  const Tick tick;
82  const PacketPtr pkt;
83 
84  DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt)
85  { }
86  };
87 
88  class MemoryPort : public ResponsePort
89  {
90  private:
92 
93  public:
94  MemoryPort(const std::string& _name, SimpleMemory& _memory);
95 
96  protected:
97  Tick recvAtomic(PacketPtr pkt) override;
99  PacketPtr pkt, MemBackdoorPtr &_backdoor) override;
100  void recvFunctional(PacketPtr pkt) override;
101  bool recvTimingReq(PacketPtr pkt) override;
102  void recvRespRetry() override;
103  AddrRangeList getAddrRanges() const override;
104  };
105 
107 
112  const Tick latency;
113 
118 
125 
131  const double bandwidth;
132 
137  bool isBusy;
138 
143  bool retryReq;
144 
149  bool retryResp;
150 
155  void release();
156 
158 
163  void dequeue();
164 
166 
172  Tick getLatency() const;
173 
178  std::unique_ptr<Packet> pendingDelete;
179 
180  public:
181 
182  SimpleMemory(const SimpleMemoryParams &p);
183 
184  DrainState drain() override;
185 
186  Port &getPort(const std::string &if_name,
187  PortID idx=InvalidPortID) override;
188  void init() override;
189 
190  protected:
193  void recvFunctional(PacketPtr pkt);
194  bool recvTimingReq(PacketPtr pkt);
195  void recvRespRetry();
196 };
197 
198 } // namespace memory
199 } // namespace gem5
200 
201 #endif //__MEM_SIMPLE_MEMORY_HH__
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:252
gem5::memory::SimpleMemory::DeferredPacket::pkt
const PacketPtr pkt
Definition: simple_mem.hh:82
gem5::memory::SimpleMemory::isBusy
bool isBusy
Track the state of the memory as either idle or busy, no need for an enum with only two states.
Definition: simple_mem.hh:137
gem5::memory::SimpleMemory::port
MemoryPort port
Definition: simple_mem.hh:106
gem5::memory::SimpleMemory::latency_var
const Tick latency_var
Fudge factor added to the latency.
Definition: simple_mem.hh:117
gem5::memory::SimpleMemory::pendingDelete
std::unique_ptr< Packet > pendingDelete
Upstream caches need this packet until true is returned, so hold it for deletion until a subsequent c...
Definition: simple_mem.hh:178
memory
Definition: mem.h:38
gem5::memory::SimpleMemory::DeferredPacket
A deferred packet stores a packet along with its scheduled transmission time.
Definition: simple_mem.hh:76
abstract_mem.hh
gem5::memory::SimpleMemory::latency
const Tick latency
Latency from that a request is accepted until the response is ready to be sent.
Definition: simple_mem.hh:112
gem5::memory::SimpleMemory::MemoryPort::MemoryPort
MemoryPort(const std::string &_name, SimpleMemory &_memory)
Definition: simple_mem.cc:265
gem5::memory::SimpleMemory::releaseEvent
EventFunctionWrapper releaseEvent
Definition: simple_mem.hh:157
gem5::memory::SimpleMemory::MemoryPort::recvAtomicBackdoor
Tick recvAtomicBackdoor(PacketPtr pkt, MemBackdoorPtr &_backdoor) override
Default implementations.
Definition: simple_mem.cc:285
gem5::memory::SimpleMemory::init
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: simple_mem.cc:64
gem5::memory::SimpleMemory::retryReq
bool retryReq
Remember if we have to retry an outstanding request that arrived while we were busy.
Definition: simple_mem.hh:143
gem5::memory::SimpleMemory
The simple memory is a basic single-ported memory controller with a configurable throughput and laten...
Definition: simple_mem.hh:67
gem5::memory::SimpleMemory::retryResp
bool retryResp
Remember if we failed to send a response and are awaiting a retry.
Definition: simple_mem.hh:149
gem5::memory::SimpleMemory::recvAtomic
Tick recvAtomic(PacketPtr pkt)
Definition: simple_mem.cc:76
gem5::InvalidPortID
const PortID InvalidPortID
Definition: types.hh:253
gem5::memory::SimpleMemory::recvAtomicBackdoor
Tick recvAtomicBackdoor(PacketPtr pkt, MemBackdoorPtr &_backdoor)
Definition: simple_mem.cc:86
gem5::memory::SimpleMemory::MemoryPort::getAddrRanges
AddrRangeList getAddrRanges() const override
Get a list of the non-overlapping address ranges the owner is responsible for.
Definition: simple_mem.cc:271
gem5::DrainState
DrainState
Object drain/handover states.
Definition: drain.hh:74
gem5::memory::SimpleMemory::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: simple_mem.cc:245
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::memory::SimpleMemory::bandwidth
const double bandwidth
Bandwidth in ticks per byte.
Definition: simple_mem.hh:131
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::memory::SimpleMemory::MemoryPort::recvTimingReq
bool recvTimingReq(PacketPtr pkt) override
Receive a timing request from the peer.
Definition: simple_mem.cc:298
gem5::memory::AbstractMemory
An abstract memory represents a contiguous block of physical memory, with an associated address range...
Definition: abstract_mem.hh:110
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::memory::SimpleMemory::DeferredPacket::DeferredPacket
DeferredPacket(PacketPtr _pkt, Tick _tick)
Definition: simple_mem.hh:84
port.hh
gem5::memory::SimpleMemory::recvTimingReq
bool recvTimingReq(PacketPtr pkt)
Definition: simple_mem.cc:112
gem5::memory::SimpleMemory::MemoryPort::recvRespRetry
void recvRespRetry() override
Called by the peer if sendTimingResp was called on this protocol (causing recvTimingResp to be called...
Definition: simple_mem.cc:304
gem5::memory::SimpleMemory::dequeueEvent
EventFunctionWrapper dequeueEvent
Definition: simple_mem.hh:165
gem5::MemBackdoor
Definition: backdoor.hh:41
gem5::memory::SimpleMemory::MemoryPort::mem
SimpleMemory & mem
Definition: simple_mem.hh:91
gem5::memory::SimpleMemory::MemoryPort::recvAtomic
Tick recvAtomic(PacketPtr pkt) override
Receive an atomic request packet from the peer.
Definition: simple_mem.cc:279
gem5::memory::SimpleMemory::drain
DrainState drain() override
Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are pa...
Definition: simple_mem.cc:255
gem5::memory::SimpleMemory::MemoryPort
Definition: simple_mem.hh:88
gem5::memory::SimpleMemory::recvRespRetry
void recvRespRetry()
Definition: simple_mem.cc:237
gem5::EventFunctionWrapper
Definition: eventq.hh:1115
gem5::ResponsePort
A ResponsePort is a specialization of a port.
Definition: port.hh:268
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
gem5::memory::SimpleMemory::packetQueue
std::list< DeferredPacket > packetQueue
Internal (unbounded) storage to mimic the delay caused by the actual memory access.
Definition: simple_mem.hh:124
gem5::memory::SimpleMemory::SimpleMemory
SimpleMemory(const SimpleMemoryParams &p)
Definition: simple_mem.cc:53
gem5::memory::SimpleMemory::release
void release()
Release the memory after being busy and send a retry if a request was rejected in the meanwhile.
Definition: simple_mem.cc:194
gem5::memory::SimpleMemory::recvFunctional
void recvFunctional(PacketPtr pkt)
Definition: simple_mem.cc:94
gem5::memory::SimpleMemory::DeferredPacket::tick
const Tick tick
Definition: simple_mem.hh:81
gem5::memory::SimpleMemory::dequeue
void dequeue()
Dequeue a packet from our internal packet queue and move it to the port where it will be sent as soon...
Definition: simple_mem.cc:205
std::list< AddrRange >
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::memory::SimpleMemory::getLatency
Tick getLatency() const
Detemine the latency.
Definition: simple_mem.cc:230
gem5::Named::_name
const std::string _name
Definition: named.hh:41
gem5::memory::SimpleMemory::MemoryPort::recvFunctional
void recvFunctional(PacketPtr pkt) override
Receive a functional request packet from the peer.
Definition: simple_mem.cc:292

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