gem5  v21.1.0.2
Classes | Public Member Functions | Protected Member Functions | Private Member Functions | Private Attributes | List of all members
gem5::memory::SimpleMemory Class Reference

The simple memory is a basic single-ported memory controller with a configurable throughput and latency. More...

#include <simple_mem.hh>

Inheritance diagram for gem5::memory::SimpleMemory:
gem5::memory::AbstractMemory gem5::ClockedObject gem5::SimObject gem5::Clocked gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Classes

class  DeferredPacket
 A deferred packet stores a packet along with its scheduled transmission time. More...
 
class  MemoryPort
 

Public Member Functions

 SimpleMemory (const SimpleMemoryParams &p)
 
DrainState drain () override
 Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are partially executed or are partially in flight. More...
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port with a given name and index. More...
 
void init () override
 init() is called after all C++ SimObjects have been created and all ports are connected. More...
 
- Public Member Functions inherited from gem5::memory::AbstractMemory
 PARAMS (AbstractMemory)
 
 AbstractMemory (const Params &p)
 
virtual ~AbstractMemory ()
 
void initState () override
 initState() is called on each SimObject when not restoring from a checkpoint. More...
 
bool isNull () const
 See if this is a null memory that should never store data and always return zero. More...
 
void setBackingStore (uint8_t *pmem_addr)
 Set the host memory backing store to be used by this memory controller. More...
 
void getBackdoor (MemBackdoorPtr &bd_ptr)
 
const std::list< LockedAddr > & getLockedAddrList () const
 Get the list of locked addresses to allow checkpointing. More...
 
void addLockedAddr (LockedAddr addr)
 Add a locked address to allow for checkpointing. More...
 
Systemsystem () const
 read the system pointer Implemented for completeness with the setter More...
 
void system (System *sys)
 Set the system pointer on this memory This can't be done via a python parameter because the system needs pointers to all the memories and the reverse would create a cycle in the object graph. More...
 
AddrRange getAddrRange () const
 Get the address range. More...
 
uint8_t * toHostAddr (Addr addr) const
 Transform a gem5 address space address into its physical counterpart in the host address space. More...
 
uint64_t size () const
 Get the memory size. More...
 
Addr start () const
 Get the start address. More...
 
bool isConfReported () const
 Should this memory be passed to the kernel and part of the OS physical memory layout. More...
 
bool isInAddrMap () const
 Some memories are used as shadow memories or should for other reasons not be part of the global address map. More...
 
bool isKvmMap () const
 When shadow memories are in use, KVM may want to make one or the other, but cannot map both into the guest address space. More...
 
void access (PacketPtr pkt)
 Perform an untimed memory access and update all the state (e.g. More...
 
void functionalAccess (PacketPtr pkt)
 Perform an untimed memory read or write without changing anything but the memory itself. More...
 
- Public Member Functions inherited from gem5::ClockedObject
 ClockedObject (const ClockedObjectParams &p)
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint. More...
 
virtual void regProbePoints ()
 Register probe points for this object. More...
 
virtual void regProbeListeners ()
 Register probe listeners for this object. More...
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object. More...
 
virtual void startup ()
 startup() is the final initialization call before simulation. More...
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining. More...
 
virtual void memWriteback ()
 Write back dirty buffers to memory using functional writes. More...
 
virtual void memInvalidate ()
 Invalidate the contents of memory buffers. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue. More...
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object. More...
 
virtual void notifyFork ()
 Notify a child process of a fork. More...
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group. More...
 
virtual ~Group ()
 
virtual void regStats ()
 Callback to set stat parameters. More...
 
virtual void resetStats ()
 Callback to reset stats. More...
 
virtual void preDumpStats ()
 Callback before stats are dumped. More...
 
void addStat (statistics::Info *info)
 Register a stat with this group. More...
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object. More...
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object. More...
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block. More...
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group. More...
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block. More...
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 
- Public Member Functions inherited from gem5::Clocked
void updateClockPeriod ()
 Update the tick to the current tick. More...
 
Tick clockEdge (Cycles cycles=Cycles(0)) const
 Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...
 
Cycles curCycle () const
 Determine the current cycle, corresponding to a tick aligned to a clock edge. More...
 
Tick nextCycle () const
 Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...
 
uint64_t frequency () const
 
Tick clockPeriod () const
 
double voltage () const
 
Cycles ticksToCycles (Tick t) const
 
Tick cyclesToTicks (Cycles c) const
 

Protected Member Functions

Tick recvAtomic (PacketPtr pkt)
 
Tick recvAtomicBackdoor (PacketPtr pkt, MemBackdoorPtr &_backdoor)
 
void recvFunctional (PacketPtr pkt)
 
bool recvTimingReq (PacketPtr pkt)
 
void recvRespRetry ()
 
- Protected Member Functions inherited from gem5::memory::AbstractMemory
bool checkLockedAddrList (PacketPtr pkt)
 
void trackLoadLocked (PacketPtr pkt)
 
bool writeOK (PacketPtr pkt)
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
virtual void drainResume ()
 Resume execution after a successful drain. More...
 
void signalDrainDone () const
 Signal that an object is drained. More...
 
- Protected Member Functions inherited from gem5::Clocked
 Clocked (ClockDomain &clk_domain)
 Create a clocked object and set the clock domain based on the parameters. More...
 
 Clocked (Clocked &)=delete
 
Clockedoperator= (Clocked &)=delete
 
virtual ~Clocked ()
 Virtual destructor due to inheritance. More...
 
void resetClock () const
 Reset the object's clock using the current global tick value. More...
 
virtual void clockPeriodUpdated ()
 A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More...
 

Private Member Functions

void release ()
 Release the memory after being busy and send a retry if a request was rejected in the meanwhile. More...
 
void dequeue ()
 Dequeue a packet from our internal packet queue and move it to the port where it will be sent as soon as possible. More...
 
Tick getLatency () const
 Detemine the latency. More...
 

Private Attributes

MemoryPort port
 
const Tick latency
 Latency from that a request is accepted until the response is ready to be sent. More...
 
const Tick latency_var
 Fudge factor added to the latency. More...
 
std::list< DeferredPacketpacketQueue
 Internal (unbounded) storage to mimic the delay caused by the actual memory access. More...
 
const double bandwidth
 Bandwidth in ticks per byte. More...
 
bool isBusy
 Track the state of the memory as either idle or busy, no need for an enum with only two states. More...
 
bool retryReq
 Remember if we have to retry an outstanding request that arrived while we were busy. More...
 
bool retryResp
 Remember if we failed to send a response and are awaiting a retry. More...
 
EventFunctionWrapper releaseEvent
 
EventFunctionWrapper dequeueEvent
 
std::unique_ptr< PacketpendingDelete
 Upstream caches need this packet until true is returned, so hold it for deletion until a subsequent call. More...
 

Additional Inherited Members

- Public Types inherited from gem5::ClockedObject
using Params = ClockedObjectParams
 Parameters of ClockedObject. More...
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 
- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system. More...
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it. More...
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 
- Public Attributes inherited from gem5::ClockedObject
PowerStatepowerState
 
- Protected Attributes inherited from gem5::memory::AbstractMemory
AddrRange range
 
uint8_t * pmemAddr
 
MemBackdoor backdoor
 
const bool confTableReported
 
const bool inAddrMap
 
const bool kvmMap
 
std::list< LockedAddrlockedAddrList
 
System_system
 Pointer to the System object. More...
 
gem5::memory::AbstractMemory::MemStats stats
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters. More...
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Detailed Description

The simple memory is a basic single-ported memory controller with a configurable throughput and latency.

See also
gem5 Memory System

Definition at line 67 of file simple_mem.hh.

Constructor & Destructor Documentation

◆ SimpleMemory()

gem5::memory::SimpleMemory::SimpleMemory ( const SimpleMemoryParams &  p)

Definition at line 53 of file simple_mem.cc.

References release().

Member Function Documentation

◆ dequeue()

void gem5::memory::SimpleMemory::dequeue ( )
private

Dequeue a packet from our internal packet queue and move it to the port where it will be sent as soon as possible.

Definition at line 205 of file simple_mem.cc.

References gem5::curTick(), dequeueEvent, DPRINTF, gem5::Draining, gem5::Drainable::drainState(), packetQueue, gem5::memory::SimpleMemory::DeferredPacket::pkt, port, gem5::EventManager::reschedule(), retryResp, gem5::ResponsePort::sendTimingResp(), and gem5::Drainable::signalDrainDone().

Referenced by recvRespRetry().

◆ drain()

DrainState gem5::memory::SimpleMemory::drain ( )
overridevirtual

Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are partially executed or are partially in flight.

Draining is mostly used before forking and creating a check point.

This function notifies an object that it needs to drain its state.

If the object does not need further simulation to drain internal buffers, it returns DrainState::Drained and automatically switches to the Drained state. If the object needs more simulation, it returns DrainState::Draining and automatically enters the Draining state. Other return values are invalid.

Note
An object that has entered the Drained state can be disturbed by other objects in the system and consequently stop being drained. These perturbations are not visible in the drain state. The simulator therefore repeats the draining process until all objects return DrainState::Drained on the first call to drain().
Returns
DrainState::Drained if the object is drained at this point in time, DrainState::Draining if it needs further simulation.

Implements gem5::Drainable.

Definition at line 255 of file simple_mem.cc.

References DPRINTF, gem5::Drained, gem5::Draining, and packetQueue.

◆ getLatency()

Tick gem5::memory::SimpleMemory::getLatency ( ) const
private

Detemine the latency.

Returns
the latency seen by the current packet

Definition at line 230 of file simple_mem.cc.

References latency, latency_var, gem5::Random::random(), and gem5::random_mt.

Referenced by recvAtomic(), and recvTimingReq().

◆ getPort()

Port & gem5::memory::SimpleMemory::getPort ( const std::string &  if_name,
PortID  idx = InvalidPortID 
)
overridevirtual

Get a port with a given name and index.

This is used at binding time and returns a reference to a protocol-agnostic port.

gem5 has a request and response port interface. All memory objects are connected together via ports. These ports provide a rigid interface between these memory objects. These ports implement three different memory system modes: timing, atomic, and functional. The most important mode is the timing mode and here timing mode is used for conducting cycle-level timing experiments. The other modes are only used in special circumstances and should not be used to conduct cycle-level timing experiments. The other modes are only used in special circumstances. These ports allow SimObjects to communicate with each other.

Parameters
if_namePort name
idxIndex in the case of a VectorPort
Returns
A reference to the given port

Reimplemented from gem5::SimObject.

Definition at line 245 of file simple_mem.cc.

References gem5::SimObject::getPort(), and port.

◆ init()

void gem5::memory::SimpleMemory::init ( )
overridevirtual

init() is called after all C++ SimObjects have been created and all ports are connected.

Initializations that are independent of unserialization but rely on a fully instantiated and connected SimObject graph should be done here.

Reimplemented from gem5::SimObject.

Definition at line 64 of file simple_mem.cc.

References gem5::SimObject::init(), gem5::Port::isConnected(), port, and gem5::ResponsePort::sendRangeChange().

◆ recvAtomic()

Tick gem5::memory::SimpleMemory::recvAtomic ( PacketPtr  pkt)
protected

◆ recvAtomicBackdoor()

Tick gem5::memory::SimpleMemory::recvAtomicBackdoor ( PacketPtr  pkt,
MemBackdoorPtr _backdoor 
)
protected

Definition at line 86 of file simple_mem.cc.

References gem5::memory::AbstractMemory::getBackdoor(), latency, and recvAtomic().

◆ recvFunctional()

void gem5::memory::SimpleMemory::recvFunctional ( PacketPtr  pkt)
protected

◆ recvRespRetry()

void gem5::memory::SimpleMemory::recvRespRetry ( )
protected

Definition at line 237 of file simple_mem.cc.

References dequeue(), and retryResp.

◆ recvTimingReq()

bool gem5::memory::SimpleMemory::recvTimingReq ( PacketPtr  pkt)
protected

◆ release()

void gem5::memory::SimpleMemory::release ( )
private

Release the memory after being busy and send a retry if a request was rejected in the meanwhile.

Definition at line 194 of file simple_mem.cc.

References isBusy, port, retryReq, and gem5::ResponsePort::sendRetryReq().

Referenced by SimpleMemory().

Member Data Documentation

◆ bandwidth

const double gem5::memory::SimpleMemory::bandwidth
private

Bandwidth in ticks per byte.

The regulation affects the acceptance rate of requests and the queueing takes place after the regulation.

Definition at line 131 of file simple_mem.hh.

Referenced by recvTimingReq().

◆ dequeueEvent

EventFunctionWrapper gem5::memory::SimpleMemory::dequeueEvent
private

Definition at line 165 of file simple_mem.hh.

Referenced by dequeue(), and recvTimingReq().

◆ isBusy

bool gem5::memory::SimpleMemory::isBusy
private

Track the state of the memory as either idle or busy, no need for an enum with only two states.

Definition at line 137 of file simple_mem.hh.

Referenced by recvTimingReq(), and release().

◆ latency

const Tick gem5::memory::SimpleMemory::latency
private

Latency from that a request is accepted until the response is ready to be sent.

Definition at line 112 of file simple_mem.hh.

Referenced by getLatency(), and recvAtomicBackdoor().

◆ latency_var

const Tick gem5::memory::SimpleMemory::latency_var
private

Fudge factor added to the latency.

Definition at line 117 of file simple_mem.hh.

Referenced by getLatency().

◆ packetQueue

std::list<DeferredPacket> gem5::memory::SimpleMemory::packetQueue
private

Internal (unbounded) storage to mimic the delay caused by the actual memory access.

Note that this is where the packet spends the memory latency.

Definition at line 124 of file simple_mem.hh.

Referenced by dequeue(), drain(), recvFunctional(), and recvTimingReq().

◆ pendingDelete

std::unique_ptr<Packet> gem5::memory::SimpleMemory::pendingDelete
private

Upstream caches need this packet until true is returned, so hold it for deletion until a subsequent call.

Definition at line 178 of file simple_mem.hh.

Referenced by recvTimingReq().

◆ port

MemoryPort gem5::memory::SimpleMemory::port
private

Definition at line 106 of file simple_mem.hh.

Referenced by dequeue(), getPort(), init(), and release().

◆ releaseEvent

EventFunctionWrapper gem5::memory::SimpleMemory::releaseEvent
private

Definition at line 157 of file simple_mem.hh.

Referenced by recvTimingReq().

◆ retryReq

bool gem5::memory::SimpleMemory::retryReq
private

Remember if we have to retry an outstanding request that arrived while we were busy.

Definition at line 143 of file simple_mem.hh.

Referenced by recvTimingReq(), and release().

◆ retryResp

bool gem5::memory::SimpleMemory::retryResp
private

Remember if we failed to send a response and are awaiting a retry.

This is only used as a check.

Definition at line 149 of file simple_mem.hh.

Referenced by dequeue(), recvRespRetry(), and recvTimingReq().


The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:31:29 for gem5 by doxygen 1.8.17