#include <pagetable.hh>

Inheritance diagram for gem5::X86ISA::TlbEntry:

Public Member Functions
	TlbEntry (Addr asn, Addr _vaddr, Addr _paddr, bool uncacheable, bool read_only)

	TlbEntry ()

void	updateVaddr (Addr new_vaddr)

Addr	pageStart ()

int	size ()

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

Public Member Functions inherited from gem5::Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section. More...

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object. More...

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Attributes
Addr	paddr

Addr	vaddr

unsigned	logBytes

bool	writable

bool	user

bool	uncacheable

bool	global

bool	patBit

bool	noExec

uint64_t	lruSeq

TlbEntryTrie::Handle	trieHandle

Additional Inherited Members
Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section. More...

static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it. More...

Detailed Description

Definition at line 65 of file pagetable.hh.

Constructor & Destructor Documentation

◆ TlbEntry() [1/2]

gem5::X86ISA::TlbEntry::TlbEntry	(	Addr	asn,
		Addr	_vaddr,
		Addr	_paddr,
		bool	uncacheable,
		bool	read_only
	)

Definition at line 58 of file pagetable.cc.

◆ TlbEntry() [2/2]

gem5::X86ISA::TlbEntry::TlbEntry ( )

Definition at line 51 of file pagetable.cc.

Member Function Documentation

◆ pageStart()

Addr gem5::X86ISA::TlbEntry::pageStart ( )

inline

Definition at line 106 of file pagetable.hh.

References paddr.

◆ serialize()

void gem5::X86ISA::TlbEntry::serialize ( CheckpointOut & cp ) const

overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters

cp	Checkpoint state

Implements gem5::Serializable.

Definition at line 66 of file pagetable.cc.

References global, logBytes, lruSeq, noExec, paddr, patBit, SERIALIZE_SCALAR, uncacheable, user, vaddr, and writable.

◆ size()

int gem5::X86ISA::TlbEntry::size ( )

inline

Definition at line 112 of file pagetable.hh.

References logBytes.

Referenced by gem5::X86ISA::GpuTLB::handleFuncTranslationReturn(), gem5::X86ISA::GpuTLB::handleTranslationReturn(), gem5::X86ISA::GpuTLB::translate(), and gem5::TLBCoalescer::updatePhysAddresses().

◆ unserialize()

void gem5::X86ISA::TlbEntry::unserialize ( CheckpointIn & cp )

overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters

cp	Checkpoint state

Implements gem5::Serializable.

Definition at line 81 of file pagetable.cc.

References global, logBytes, lruSeq, noExec, paddr, patBit, uncacheable, UNSERIALIZE_SCALAR, user, vaddr, and writable.

◆ updateVaddr()

void gem5::X86ISA::TlbEntry::updateVaddr ( Addr new_vaddr )

inline

Definition at line 101 of file pagetable.hh.

References vaddr.

Member Data Documentation

◆ global

bool gem5::X86ISA::TlbEntry::global

Definition at line 86 of file pagetable.hh.

Referenced by serialize(), and unserialize().

◆ logBytes

unsigned gem5::X86ISA::TlbEntry::logBytes

Definition at line 73 of file pagetable.hh.

Referenced by gem5::X86ISA::TLB::insert(), serialize(), size(), gem5::X86ISA::TLB::translate(), unserialize(), and gem5::X86ISA::TLB::unserialize().

◆ lruSeq

uint64_t gem5::X86ISA::TlbEntry::lruSeq

Definition at line 92 of file pagetable.hh.

Referenced by gem5::X86ISA::TLB::insert(), gem5::X86ISA::TLB::lookup(), serialize(), and unserialize().

◆ noExec

bool gem5::X86ISA::TlbEntry::noExec

Definition at line 90 of file pagetable.hh.

Referenced by serialize(), and unserialize().

◆ paddr

Addr gem5::X86ISA::TlbEntry::paddr

Definition at line 68 of file pagetable.hh.

Referenced by gem5::X86ISA::GpuTLB::handleFuncTranslationReturn(), gem5::X86ISA::GpuTLB::handleTranslationReturn(), gem5::X86ISA::GpuTLB::issueTLBLookup(), pageStart(), gem5::X86ISA::GpuTLB::CpuSidePort::recvFunctional(), serialize(), gem5::X86ISA::TLB::translate(), gem5::X86ISA::GpuTLB::translate(), unserialize(), and gem5::TLBCoalescer::updatePhysAddresses().

◆ patBit

bool gem5::X86ISA::TlbEntry::patBit

Definition at line 88 of file pagetable.hh.

Referenced by serialize(), and unserialize().

◆ trieHandle

TlbEntryTrie::Handle gem5::X86ISA::TlbEntry::trieHandle

Definition at line 94 of file pagetable.hh.

Referenced by gem5::X86ISA::TLB::demapPage(), gem5::X86ISA::TLB::insert(), and gem5::X86ISA::TLB::unserialize().

◆ uncacheable

bool gem5::X86ISA::TlbEntry::uncacheable

Definition at line 84 of file pagetable.hh.

Referenced by gem5::X86ISA::GpuTLB::handleFuncTranslationReturn(), gem5::X86ISA::GpuTLB::handleTranslationReturn(), serialize(), gem5::X86ISA::TLB::translate(), gem5::X86ISA::GpuTLB::translate(), unserialize(), and gem5::TLBCoalescer::updatePhysAddresses().

◆ user

bool gem5::X86ISA::TlbEntry::user

Definition at line 79 of file pagetable.hh.

Referenced by gem5::X86ISA::GpuTLB::pagingProtectionChecks(), serialize(), gem5::X86ISA::TLB::translate(), gem5::X86ISA::GpuTLB::translate(), and unserialize().

◆ vaddr

Addr gem5::X86ISA::TlbEntry::vaddr

Definition at line 71 of file pagetable.hh.

Referenced by gem5::X86ISA::GpuTLB::handleFuncTranslationReturn(), gem5::X86ISA::GpuTLB::handleTranslationReturn(), gem5::X86ISA::TLB::insert(), gem5::X86ISA::GpuTLB::insert(), gem5::X86ISA::GpuTLB::issueTLBLookup(), gem5::X86ISA::GpuTLB::CpuSidePort::recvFunctional(), serialize(), unserialize(), gem5::X86ISA::TLB::unserialize(), gem5::TLBCoalescer::updatePhysAddresses(), and updateVaddr().

◆ writable

bool gem5::X86ISA::TlbEntry::writable

Definition at line 77 of file pagetable.hh.

Referenced by gem5::X86ISA::GpuTLB::pagingProtectionChecks(), serialize(), gem5::X86ISA::TLB::translate(), gem5::X86ISA::GpuTLB::translate(), and unserialize().

The documentation for this struct was generated from the following files:

arch/x86/pagetable.hh
arch/x86/pagetable.cc

Public Member Functions

Public Attributes

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

◆ TlbEntry() [1/2]

◆ TlbEntry() [2/2]

Member Function Documentation

◆ pageStart()

◆ serialize()

◆ size()

◆ unserialize()

◆ updateVaddr()

Member Data Documentation

◆ global

◆ logBytes

◆ lruSeq

◆ noExec

◆ paddr

◆ patBit

◆ trieHandle

◆ uncacheable

◆ user

◆ vaddr

◆ writable