#include <pagetable.hh>
Definition at line 155 of file pagetable.hh.
◆ paddr() [1/2]
Addr gem5::X86ISA::LongModePTE::paddr |
( |
| ) |
|
|
inline |
◆ paddr() [2/2]
void gem5::X86ISA::LongModePTE::paddr |
( |
Addr | addr | ) |
|
|
inline |
◆ present() [1/2]
bool gem5::X86ISA::LongModePTE::present |
( |
| ) |
|
|
inline |
◆ present() [2/2]
void gem5::X86ISA::LongModePTE::present |
( |
bool | p | ) |
|
|
inline |
◆ read()
◆ readonly() [1/2]
bool gem5::X86ISA::LongModePTE::readonly |
( |
| ) |
|
|
inline |
◆ readonly() [2/2]
void gem5::X86ISA::LongModePTE::readonly |
( |
bool | r | ) |
|
|
inline |
◆ reset()
void gem5::X86ISA::LongModePTE::reset |
( |
Addr | _paddr, |
|
|
bool | _present = true, |
|
|
bool | _uncacheable = false, |
|
|
bool | _readonly = false ) |
|
inline |
◆ tableSize()
static int gem5::X86ISA::LongModePTE::tableSize |
( |
| ) |
|
|
inlinestatic |
◆ uncacheable() [1/2]
bool gem5::X86ISA::LongModePTE::uncacheable |
( |
| ) |
|
|
inline |
◆ uncacheable() [2/2]
void gem5::X86ISA::LongModePTE::uncacheable |
( |
bool | u | ) |
|
|
inline |
◆ write()
void gem5::X86ISA::LongModePTE::write |
( |
PortProxy & | p | ) |
|
|
inline |
◆ entryAddr
Addr gem5::X86ISA::LongModePTE::entryAddr |
|
protected |
◆ pte
The documentation for this class was generated from the following file: