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base_cpu.cc
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1 /*
2  * Copyright (c) 2012, 2015, 2017 ARM Limited
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36  */
37 
38 #include "arch/arm/kvm/base_cpu.hh"
39 
40 #include <linux/kvm.h>
41 
42 #include "arch/arm/interrupts.hh"
43 #include "debug/KvmInt.hh"
44 #include "params/BaseArmKvmCPU.hh"
45 
46 #define INTERRUPT_ID(type, vcpu, irq) ( \
47  ((type) << KVM_ARM_IRQ_TYPE_SHIFT) | \
48  ((vcpu) << KVM_ARM_IRQ_VCPU_SHIFT) | \
49  ((irq) << KVM_ARM_IRQ_NUM_SHIFT))
50 
51 #define INTERRUPT_VCPU_IRQ(vcpu) \
52  INTERRUPT_ID(KVM_ARM_IRQ_TYPE_CPU, vcpu, KVM_ARM_IRQ_CPU_IRQ)
53 
54 #define INTERRUPT_VCPU_FIQ(vcpu) \
55  INTERRUPT_ID(KVM_ARM_IRQ_TYPE_CPU, vcpu, KVM_ARM_IRQ_CPU_FIQ)
56 
57 
58 BaseArmKvmCPU::BaseArmKvmCPU(BaseArmKvmCPUParams *params)
59  : BaseKvmCPU(params),
60  irqAsserted(false), fiqAsserted(false)
61 {
62 }
63 
65 {
66 }
67 
68 void
70 {
72 
73  /* TODO: This needs to be moved when we start to support VMs with
74  * multiple threads since kvmArmVCpuInit requires that all CPUs in
75  * the VM have been created.
76  */
77  struct kvm_vcpu_init target_config;
78  memset(&target_config, 0, sizeof(target_config));
79 
80  vm.kvmArmPreferredTarget(target_config);
81  if (!((ArmSystem *)system)->highestELIs64()) {
82  target_config.features[0] |= (1 << KVM_ARM_VCPU_EL1_32BIT);
83  }
84  kvmArmVCpuInit(target_config);
85 }
86 
87 Tick
89 {
90  auto interrupt = static_cast<ArmISA::Interrupts *>(interrupts[0]);
91  const bool simFIQ(interrupt->checkRaw(INT_FIQ));
92  const bool simIRQ(interrupt->checkRaw(INT_IRQ));
93 
94  if (!vm.hasKernelIRQChip()) {
95  if (fiqAsserted != simFIQ) {
96  DPRINTF(KvmInt, "KVM: Update FIQ state: %i\n", simFIQ);
98  }
99  if (irqAsserted != simIRQ) {
100  DPRINTF(KvmInt, "KVM: Update IRQ state: %i\n", simIRQ);
102  }
103  } else {
104  warn_if(simFIQ && !fiqAsserted,
105  "FIQ raised by the simulated interrupt controller " \
106  "despite in-kernel GIC emulation. This is probably a bug.");
107 
108  warn_if(simIRQ && !irqAsserted,
109  "IRQ raised by the simulated interrupt controller " \
110  "despite in-kernel GIC emulation. This is probably a bug.");
111  }
112 
113  irqAsserted = simIRQ;
114  fiqAsserted = simFIQ;
115 
116  return BaseKvmCPU::kvmRun(ticks);
117 }
118 
121 {
122  // Do we need to request a list of registers from the kernel?
123  if (_regIndexList.size() == 0) {
124  // Start by probing for the size of the list. We do this
125  // calling the ioctl with a struct size of 0. The kernel will
126  // return the number of elements required to hold the list.
127  kvm_reg_list regs_probe;
128  regs_probe.n = 0;
129  getRegList(regs_probe);
130 
131  // Request the actual register list now that we know how many
132  // register we need to allocate space for.
133  std::unique_ptr<struct kvm_reg_list> regs;
134  const size_t size(sizeof(struct kvm_reg_list) +
135  regs_probe.n * sizeof(uint64_t));
136  regs.reset((struct kvm_reg_list *)operator new(size));
137  regs->n = regs_probe.n;
138  if (!getRegList(*regs))
139  panic("Failed to determine register list size.\n");
140 
141  _regIndexList.assign(regs->reg, regs->reg + regs->n);
142  }
143 
144  return _regIndexList;
145 }
146 
147 void
148 BaseArmKvmCPU::kvmArmVCpuInit(const struct kvm_vcpu_init &init)
149 {
150  if (ioctl(KVM_ARM_VCPU_INIT, (void *)&init) == -1)
151  panic("KVM: Failed to initialize vCPU\n");
152 }
153 
154 bool
155 BaseArmKvmCPU::getRegList(struct kvm_reg_list &regs) const
156 {
157  if (ioctl(KVM_GET_REG_LIST, (void *)&regs) == -1) {
158  if (errno == E2BIG) {
159  return false;
160  } else {
161  panic("KVM: Failed to get vCPU register list (errno: %i)\n",
162  errno);
163  }
164  } else {
165  return true;
166  }
167 }
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:163
#define DPRINTF(x,...)
Definition: trace.hh:225
void kvmArmVCpuInit(const struct kvm_vcpu_init &init)
Tell the kernel to initialize this CPU.
Definition: base_cpu.cc:148
BaseArmKvmCPU(BaseArmKvmCPUParams *params)
Definition: base_cpu.cc:58
std::vector< BaseInterrupts * > interrupts
Definition: base.hh:218
virtual Tick kvmRun(Tick ticks)
Request KVM to run the guest for a given number of ticks.
Definition: base.cc:721
bool hasKernelIRQChip() const
Is in-kernel IRQ chip emulation enabled?
Definition: vm.hh:351
System * system
Definition: base.hh:382
Base class for KVM based CPU models.
Definition: base.hh:77
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: base.cc:106
void setIRQLine(uint32_t irq, bool high)
Set the status of an IRQ line using KVM_IRQ_LINE.
Definition: vm.cc:500
const long vcpuID
KVM internal ID of the vCPU.
Definition: base.hh:636
void startup() override
startup() is the final initialization call before simulation.
Definition: base_cpu.cc:69
#define INTERRUPT_VCPU_IRQ(vcpu)
Definition: base_cpu.cc:51
const RegIndexVector & getRegList() const
Get a list of registers supported by getOneReg() and setOneReg().
Definition: base_cpu.cc:120
KvmVM & vm
Definition: base.hh:151
RegIndexVector _regIndexList
Cached copy of the list of registers supported by KVM.
Definition: base_cpu.hh:106
uint64_t Tick
Tick count type.
Definition: types.hh:61
#define warn_if(cond,...)
Conditional warning macro that checks the supplied condition and only prints a warning if the conditi...
Definition: logging.hh:224
Tick kvmRun(Tick ticks) override
Request KVM to run the guest for a given number of ticks.
Definition: base_cpu.cc:88
#define INTERRUPT_VCPU_FIQ(vcpu)
Definition: base_cpu.cc:54
bool irqAsserted
Cached state of the IRQ line.
Definition: base_cpu.hh:60
int ioctl(int request, long p1) const
vCPU ioctl interface.
Definition: base.cc:1169
void startup() override
startup() is the final initialization call before simulation.
Definition: base.cc:117
bool fiqAsserted
Cached state of the FIQ line.
Definition: base_cpu.hh:62
virtual ~BaseArmKvmCPU()
Definition: base_cpu.cc:64

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