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smmu_v3_slaveifc.hh
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37 
38 #ifndef __DEV_ARM_SMMU_V3_SLAVEIFC_HH__
39 #define __DEV_ARM_SMMU_V3_SLAVEIFC_HH__
40 
41 #include <list>
42 
44 #include "dev/arm/smmu_v3_defs.hh"
46 #include "dev/arm/smmu_v3_ports.hh"
47 #include "dev/arm/smmu_v3_proc.hh"
48 #include "params/SMMUv3SlaveInterface.hh"
49 #include "sim/clocked_object.hh"
50 
52 class SMMUv3;
53 class SMMUSlavePort;
54 
56 {
57  protected:
58  friend class SMMUTranslationProcess;
59 
60  public:
64 
65  const bool microTLBEnable;
66  const bool mainTLBEnable;
67 
71 
74 
78 
79  // in bytes
80  const unsigned portWidth;
81 
85 
86  const bool prefetchEnable;
88 
91 
95 
96  // Receiving translation requests from the master device
98  bool recvTimingReq(PacketPtr pkt);
99  void schedTimingResp(PacketPtr pkt);
100 
104  void schedAtsTimingResp(PacketPtr pkt);
105 
106  void scheduleDeviceRetry();
107  void sendDeviceRetry();
108  void atsSendDeviceRetry();
109 
112 
114  EventWrapper<
117 
118  Port& getPort(const std::string &name, PortID id) override;
119 
120  public:
121  SMMUv3SlaveInterface(const SMMUv3SlaveInterfaceParams *p);
122 
124  {
125  delete microTLB;
126  delete mainTLB;
127  }
128 
129  const SMMUv3SlaveInterfaceParams *
130  params() const
131  {
132  return static_cast<const SMMUv3SlaveInterfaceParams *>(_params);
133  }
134 
135  DrainState drain() override;
136 
137  void setSMMU(SMMUv3 *_smmu) { smmu = _smmu; }
138  void sendRange();
139 };
140 
141 #endif /* __DEV_ARM_SMMU_V3_SLAVEIFC_HH__ */
Ports are used to interface objects to each other.
Definition: port.hh:56
Tick recvAtomic(PacketPtr pkt)
Cycles is a wrapper class for representing cycle counts, i.e.
Definition: types.hh:81
SMMUDeviceRetryEvent sendDeviceRetryEvent
void schedAtsTimingResp(PacketPtr pkt)
SMMUSignal dependentReqRemoved
SMMUATSSlavePort atsSlavePort
bool atsSlaveRecvTimingReq(PacketPtr pkt)
std::list< SMMUTranslationProcess * > dependentReads[SMMU_MAX_TRANS_ID]
std::list< SMMUTranslationProcess * > dependentWrites[SMMU_MAX_TRANS_ID]
DrainState
Object drain/handover states.
Definition: drain.hh:71
SMMUSemaphore microTLBSem
bool recvTimingReq(PacketPtr pkt)
const bool prefetchReserveLastWay
const SMMUv3SlaveInterfaceParams * params() const
bool atsMasterRecvTimingResp(PacketPtr pkt)
void setSMMU(SMMUv3 *_smmu)
uint64_t Tick
Tick count type.
Definition: types.hh:61
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
SMMUv3SlaveInterface(const SMMUv3SlaveInterfaceParams *p)
ClockedObject declaration and implementation.
SMMUATSMasterPort atsMasterPort
Tick atsSlaveRecvAtomic(PacketPtr pkt)
STL list class.
Definition: stl.hh:51
void schedTimingResp(PacketPtr pkt)
SMMUSignal duplicateReqRemoved
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:249
virtual const std::string name() const
Definition: sim_object.hh:129
DrainState drain() override
Notify an object that it needs to drain its state.
const SimObjectParams * _params
Cached copy of the object parameters.
Definition: sim_object.hh:111
const unsigned portWidth
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:235
SMMUSemaphore mainTLBSem
EventWrapper< SMMUv3SlaveInterface, &SMMUv3SlaveInterface::atsSendDeviceRetry > atsSendDeviceRetryEvent
Bitfield< 0 > p
Port & getPort(const std::string &name, PortID id) override
Get a port with a given name and index.
std::list< SMMUTranslationProcess * > duplicateReqs
SMMUSemaphore slavePortSem
SMMUSlavePort * slavePort

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