38 #ifndef __ARCH_ARM_STAGE2_LOOKUP_HH__ 39 #define __ARCH_ARM_STAGE2_LOOKUP_HH__ 75 TLB::Translation *_transState,
BaseTLB::Mode _mode,
bool _timing,
77 stage1Tlb(s1Tlb), stage2Tlb(s2Tlb), stage1Te(s1Te), s1Req(_req),
78 transState(_transState), mode(_mode), timing(_timing),
79 functional(_functional), tranType(_tranType), stage2Te(nullptr),
80 fault(
NoFault), complete(false), selfDelete(false)
82 req = std::make_shared<Request>();
83 req->setVirt(s1Te.
pAddr(s1Req->getVaddr()), s1Req->getSize(),
84 s1Req->getFlags(), s1Req->masterId(), 0);
104 #endif //__ARCH_ARM_STAGE2_LOOKUP_HH__
decltype(nullptr) constexpr NoFault
Declaration of a request, the overall memory request consisting of the parts of the request that are ...
std::shared_ptr< Request > RequestPtr
ThreadContext is the external interface to all thread state for anything outside of the CPU...
Fault getTe(ThreadContext *tc, TlbEntry *destTe)
void markDelayed()
Signal that the translation has been delayed due to a hw page table walk.
Addr pAddr(Addr va) const
TLB::ArmTranslationType tranType
Stage2LookUp(TLB *s1Tlb, TLB *s2Tlb, TlbEntry s1Te, const RequestPtr &_req, TLB::Translation *_transState, BaseTLB::Mode _mode, bool _timing, bool _functional, TLB::ArmTranslationType _tranType)
void finish(const Fault &fault, const RequestPtr &req, ThreadContext *tc, BaseTLB::Mode mode)
void mergeTe(const RequestPtr &req, BaseTLB::Mode mode)
TLB::Translation * transState
std::shared_ptr< FaultBase > Fault