gem5  v20.1.0.0
faults.hh
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28 
29 #ifndef __SPARC_FAULTS_HH__
30 #define __SPARC_FAULTS_HH__
31 
32 #include "cpu/static_inst.hh"
33 #include "sim/faults.hh"
34 
35 // The design of the "name" and "vect" functions is in sim/faults.hh
36 
37 namespace SparcISA
38 {
39 
40 typedef uint32_t TrapType;
41 typedef uint32_t FaultPriority;
42 
43 class ITB;
44 
45 class SparcFaultBase : public FaultBase
46 {
47  public:
49  {
50  U, User = U,
54  SH = -1,
56  };
57  using PrivilegeLevelSpec = std::array<PrivilegeLevel, NumLevels>;
58  struct FaultVals
59  {
60  const FaultName name;
65  FaultVals(const FaultName& name_, const TrapType& trapType_,
66  const FaultPriority& priority_, const PrivilegeLevelSpec& il)
67  : name(name_), trapType(trapType_), priority(priority_),
69  {}
70  };
71  void invoke(ThreadContext * tc, const StaticInstPtr &inst =
73  virtual TrapType trapType() = 0;
74  virtual FaultPriority priority() = 0;
75  virtual FaultStat & countStat() = 0;
76  virtual PrivilegeLevel getNextLevel(PrivilegeLevel current) = 0;
77 };
78 
79 template<typename T>
80 class SparcFault : public SparcFaultBase
81 {
82  protected:
83  static FaultVals vals;
84  public:
85  FaultName name() const { return vals.name; }
88  FaultStat & countStat() { return vals.count; }
89 
92  {
93  return vals.nextPrivilegeLevel[current];
94  }
95 };
96 
97 class PowerOnReset : public SparcFault<PowerOnReset>
98 {
99  public:
100  void invoke(ThreadContext *tc, const StaticInstPtr &inst =
102 };
103 
104 class WatchDogReset : public SparcFault<WatchDogReset> {};
105 
106 class ExternallyInitiatedReset : public SparcFault<ExternallyInitiatedReset> {};
107 
108 class SoftwareInitiatedReset : public SparcFault<SoftwareInitiatedReset> {};
109 
110 class REDStateException : public SparcFault<REDStateException> {};
111 
112 class StoreError : public SparcFault<StoreError> {};
113 
114 class InstructionAccessException : public SparcFault<InstructionAccessException> {};
115 
116 // class InstructionAccessMMUMiss : public SparcFault<InstructionAccessMMUMiss> {};
117 
118 class InstructionAccessError : public SparcFault<InstructionAccessError> {};
119 
120 class IllegalInstruction : public SparcFault<IllegalInstruction> {};
121 
122 class PrivilegedOpcode : public SparcFault<PrivilegedOpcode> {};
123 
124 // class UnimplementedLDD : public SparcFault<UnimplementedLDD> {};
125 
126 // class UnimplementedSTD : public SparcFault<UnimplementedSTD> {};
127 
128 class FpDisabled : public SparcFault<FpDisabled> {};
129 class VecDisabled : public SparcFault<VecDisabled> {};
130 
131 class FpExceptionIEEE754 : public SparcFault<FpExceptionIEEE754> {};
132 
133 class FpExceptionOther : public SparcFault<FpExceptionOther> {};
134 
135 class TagOverflow : public SparcFault<TagOverflow> {};
136 
137 class CleanWindow : public SparcFault<CleanWindow> {};
138 
139 class DivisionByZero : public SparcFault<DivisionByZero> {};
140 
142  public SparcFault<InternalProcessorError> {};
143 
145  public SparcFault<InstructionInvalidTSBEntry> {};
146 
147 class DataInvalidTSBEntry : public SparcFault<DataInvalidTSBEntry> {};
148 
149 class DataAccessException : public SparcFault<DataAccessException> {};
150 
151 // class DataAccessMMUMiss : public SparcFault<DataAccessMMUMiss> {};
152 
153 class DataAccessError : public SparcFault<DataAccessError> {};
154 
155 class DataAccessProtection : public SparcFault<DataAccessProtection> {};
156 
158  public SparcFault<MemAddressNotAligned> {};
159 
160 class LDDFMemAddressNotAligned : public SparcFault<LDDFMemAddressNotAligned> {};
161 
162 class STDFMemAddressNotAligned : public SparcFault<STDFMemAddressNotAligned> {};
163 
164 class PrivilegedAction : public SparcFault<PrivilegedAction> {};
165 
166 class LDQFMemAddressNotAligned : public SparcFault<LDQFMemAddressNotAligned> {};
167 
168 class STQFMemAddressNotAligned : public SparcFault<STQFMemAddressNotAligned> {};
169 
171  public SparcFault<InstructionRealTranslationMiss> {};
172 
173 class DataRealTranslationMiss : public SparcFault<DataRealTranslationMiss> {};
174 
175 // class AsyncDataError : public SparcFault<AsyncDataError> {};
176 
177 template <class T>
178 class EnumeratedFault : public SparcFault<T>
179 {
180  protected:
181  uint32_t _n;
182  public:
183  EnumeratedFault(uint32_t n) : SparcFault<T>(), _n(n) {}
185 };
186 
187 class InterruptLevelN : public EnumeratedFault<InterruptLevelN>
188 {
189  public:
191  FaultPriority priority() { return 3200 - _n*100; }
192 };
193 
194 class HstickMatch : public SparcFault<HstickMatch> {};
195 
196 class TrapLevelZero : public SparcFault<TrapLevelZero> {};
197 
198 class InterruptVector : public SparcFault<InterruptVector> {};
199 
200 class PAWatchpoint : public SparcFault<PAWatchpoint> {};
201 
202 class VAWatchpoint : public SparcFault<VAWatchpoint> {};
203 
205  public SparcFault<FastInstructionAccessMMUMiss>
206 {
207  protected:
209  public:
211  {}
213  {}
214  void invoke(ThreadContext * tc, const StaticInstPtr &inst =
216 };
217 
218 class FastDataAccessMMUMiss : public SparcFault<FastDataAccessMMUMiss>
219 {
220  protected:
222  public:
224  {}
226  {}
227  void invoke(ThreadContext * tc, const StaticInstPtr &inst =
229 };
230 
231 class FastDataAccessProtection : public SparcFault<FastDataAccessProtection> {};
232 
233 class InstructionBreakpoint : public SparcFault<InstructionBreakpoint> {};
234 
235 class CpuMondo : public SparcFault<CpuMondo> {};
236 
237 class DevMondo : public SparcFault<DevMondo> {};
238 
239 class ResumableError : public SparcFault<ResumableError> {};
240 
241 class SpillNNormal : public EnumeratedFault<SpillNNormal>
242 {
243  public:
245  // These need to be handled specially to enable spill traps in SE
246  void invoke(ThreadContext * tc, const StaticInstPtr &inst =
248 };
249 
250 class SpillNOther : public EnumeratedFault<SpillNOther>
251 {
252  public:
254  {}
255 };
256 
257 class FillNNormal : public EnumeratedFault<FillNNormal>
258 {
259  public:
261  {}
262  // These need to be handled specially to enable fill traps in SE
263  void invoke(ThreadContext * tc, const StaticInstPtr &inst =
265 };
266 
267 class FillNOther : public EnumeratedFault<FillNOther>
268 {
269  public:
271  {}
272 };
273 
274 class TrapInstruction : public EnumeratedFault<TrapInstruction>
275 {
276  public:
278  {}
279  // In SE, trap instructions are requesting services from the OS.
280  void invoke(ThreadContext * tc, const StaticInstPtr &inst =
282 };
283 
284 /*
285  * Explicitly declare template static member variables to avoid warnings
286  * in some clang versions
287  */
290 template<> SparcFaultBase::FaultVals
295 template<> SparcFaultBase::FaultVals
308 template<> SparcFaultBase::FaultVals
315 template<> SparcFaultBase::FaultVals
317 template<> SparcFaultBase::FaultVals
320 template<> SparcFaultBase::FaultVals
322 template<> SparcFaultBase::FaultVals
324 template<> SparcFaultBase::FaultVals
333 template<> SparcFaultBase::FaultVals
336 template<>
347 
348 
349 void enterREDState(ThreadContext *tc);
350 
351 void doREDFault(ThreadContext *tc, TrapType tt);
352 
353 void doNormalFault(ThreadContext *tc, TrapType tt, bool gotoHpriv);
354 
355 void getREDVector(RegVal TT, Addr &PC, Addr &NPC);
356 
357 void getHyperVector(ThreadContext * tc, Addr &PC, Addr &NPC, RegVal TT);
358 
359 void getPrivVector(ThreadContext *tc, Addr &PC, Addr &NPC, RegVal TT,
360  RegVal TL);
361 
362 } // namespace SparcISA
363 
364 #endif // __SPARC_FAULTS_HH__
SparcISA::FastInstructionAccessMMUMiss::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr)
Definition: faults.cc:621
SparcISA::FpDisabled
Definition: faults.hh:128
SparcISA::IllegalInstruction
Definition: faults.hh:120
SparcISA::PrivilegedOpcode
Definition: faults.hh:122
SparcISA::FastDataAccessProtection
Definition: faults.hh:231
SparcISA::InstructionAccessError
Definition: faults.hh:118
SparcISA::n
Bitfield< 7 > n
Definition: miscregs.hh:137
SparcISA::FaultPriority
uint32_t FaultPriority
Definition: faults.hh:41
SparcISA::InstructionInvalidTSBEntry
Definition: faults.hh:144
SparcISA::CpuMondo
Definition: faults.hh:235
SparcISA::getHyperVector
void getHyperVector(ThreadContext *tc, Addr &PC, Addr &NPC, RegVal TT)
Definition: faults.cc:479
SparcISA::SparcFaultBase::PrivilegeLevelSpec
std::array< PrivilegeLevel, NumLevels > PrivilegeLevelSpec
Definition: faults.hh:57
SparcISA::getPrivVector
void getPrivVector(ThreadContext *tc, Addr &PC, Addr &NPC, RegVal TT, RegVal TL)
Definition: faults.cc:487
SparcISA::SparcFaultBase::FaultVals::name
const FaultName name
Definition: faults.hh:60
SparcISA::TrapInstruction::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr)
Definition: faults.cc:802
SparcISA::SparcFault::priority
FaultPriority priority()
Definition: faults.hh:87
SparcISA::FastInstructionAccessMMUMiss::FastInstructionAccessMMUMiss
FastInstructionAccessMMUMiss(Addr addr)
Definition: faults.hh:210
SparcISA::TrapInstruction
Definition: faults.hh:274
SparcISA::PAWatchpoint
Definition: faults.hh:200
SparcISA::CleanWindow
Definition: faults.hh:137
SparcISA::EnumeratedFault::_n
uint32_t _n
Definition: faults.hh:181
SparcISA::StoreError
Definition: faults.hh:112
SparcISA::SpillNNormal
Definition: faults.hh:241
SparcISA::REDStateException
Definition: faults.hh:110
SparcISA::SparcFaultBase::FaultVals::count
FaultStat count
Definition: faults.hh:64
faults.hh
SparcISA::InternalProcessorError
Definition: faults.hh:141
SparcISA::DataInvalidTSBEntry
Definition: faults.hh:147
SparcISA::SparcFaultBase::priority
virtual FaultPriority priority()=0
SparcISA::ResumableError
Definition: faults.hh:239
SparcISA::STQFMemAddressNotAligned
Definition: faults.hh:168
SparcISA::SparcFaultBase::getNextLevel
virtual PrivilegeLevel getNextLevel(PrivilegeLevel current)=0
SparcISA::SpillNOther
Definition: faults.hh:250
SparcISA::TrapType
uint32_t TrapType
Definition: faults.hh:40
SparcISA::SparcFaultBase::P
@ P
Definition: faults.hh:51
SparcISA
Definition: asi.cc:31
Stats::Scalar
This is a simple scalar statistic, like a counter.
Definition: statistics.hh:2533
SparcISA::DataAccessProtection
Definition: faults.hh:155
SparcISA::PowerOnReset::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr)
Definition: faults.cc:558
SparcISA::SparcFaultBase
Definition: faults.hh:45
SparcISA::FillNNormal::FillNNormal
FillNNormal(uint32_t n)
Definition: faults.hh:260
SparcISA::DataAccessError
Definition: faults.hh:153
SparcISA::SparcFault
Definition: faults.hh:80
SparcISA::SparcFaultBase::User
@ User
Definition: faults.hh:50
SparcISA::InterruptLevelN::InterruptLevelN
InterruptLevelN(uint32_t n)
Definition: faults.hh:190
SparcISA::FillNNormal::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr)
Definition: faults.cc:783
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
SparcISA::SparcFault::vals
static FaultVals vals
Definition: faults.hh:83
SparcISA::HstickMatch
Definition: faults.hh:194
SparcISA::InterruptLevelN
Definition: faults.hh:187
FaultName
const typedef char * FaultName
Definition: faults.hh:49
SparcISA::VAWatchpoint
Definition: faults.hh:202
SparcISA::SparcFaultBase::Privileged
@ Privileged
Definition: faults.hh:51
SparcISA::PowerOnReset
Definition: faults.hh:97
SparcISA::SparcFaultBase::FaultVals::nextPrivilegeLevel
const PrivilegeLevelSpec nextPrivilegeLevel
Definition: faults.hh:63
SparcISA::FillNOther
Definition: faults.hh:267
SparcISA::InterruptLevelN::priority
FaultPriority priority()
Definition: faults.hh:191
SparcISA::SpillNNormal::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr)
Definition: faults.cc:764
SparcISA::SparcFaultBase::PrivilegeLevel
PrivilegeLevel
Definition: faults.hh:48
SparcISA::getREDVector
void getREDVector(RegVal TT, Addr &PC, Addr &NPC)
Definition: faults.cc:470
SparcISA::FastDataAccessMMUMiss::vaddr
Addr vaddr
Definition: faults.hh:221
SparcISA::SparcFaultBase::countStat
virtual FaultStat & countStat()=0
SparcISA::TrapInstruction::TrapInstruction
TrapInstruction(uint32_t n)
Definition: faults.hh:277
SparcISA::SpillNNormal::SpillNNormal
SpillNNormal(uint32_t n)
Definition: faults.hh:244
SparcISA::FastDataAccessMMUMiss::FastDataAccessMMUMiss
FastDataAccessMMUMiss(Addr addr)
Definition: faults.hh:223
static_inst.hh
SparcISA::VecDisabled
Definition: faults.hh:129
SparcISA::LDDFMemAddressNotAligned
Definition: faults.hh:160
SparcISA::SparcFaultBase::NumLevels
@ NumLevels
Definition: faults.hh:53
SparcISA::DevMondo
Definition: faults.hh:237
SparcISA::ExternallyInitiatedReset
Definition: faults.hh:106
SparcISA::SoftwareInitiatedReset
Definition: faults.hh:108
SparcISA::SparcFault::trapType
TrapType trapType()
Definition: faults.hh:86
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
SparcISA::FastDataAccessMMUMiss::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr)
Definition: faults.cc:677
SparcISA::EnumeratedFault::trapType
TrapType trapType()
Definition: faults.hh:184
StaticInst::nullStaticInstPtr
static StaticInstPtr nullStaticInstPtr
Pointer to a statically allocated "null" instruction object.
Definition: static_inst.hh:237
SparcISA::FpExceptionOther
Definition: faults.hh:133
SparcISA::InterruptVector
Definition: faults.hh:198
SparcISA::FillNNormal
Definition: faults.hh:257
SparcISA::EnumeratedFault
Definition: faults.hh:178
SparcISA::doREDFault
void doREDFault(ThreadContext *tc, TrapType tt)
This sets everything up for a RED state trap except for actually jumping to the handler.
Definition: faults.cc:300
SparcISA::FastDataAccessMMUMiss::FastDataAccessMMUMiss
FastDataAccessMMUMiss()
Definition: faults.hh:225
SparcISA::SparcFaultBase::FaultVals::FaultVals
FaultVals(const FaultName &name_, const TrapType &trapType_, const FaultPriority &priority_, const PrivilegeLevelSpec &il)
Definition: faults.hh:65
SparcISA::SparcFault::name
FaultName name() const
Definition: faults.hh:85
SparcISA::FastInstructionAccessMMUMiss
Definition: faults.hh:204
SparcISA::SparcFaultBase::SH
@ SH
Definition: faults.hh:54
SparcISA::InstructionRealTranslationMiss
Definition: faults.hh:170
SparcISA::FastInstructionAccessMMUMiss::FastInstructionAccessMMUMiss
FastInstructionAccessMMUMiss()
Definition: faults.hh:212
SparcISA::WatchDogReset
Definition: faults.hh:104
SparcISA::FpExceptionIEEE754
Definition: faults.hh:131
SparcISA::enterREDState
void enterREDState(ThreadContext *tc)
This causes the thread context to enter RED state.
Definition: faults.cc:279
SparcISA::SparcFaultBase::trapType
virtual TrapType trapType()=0
SparcISA::TrapLevelZero
Definition: faults.hh:196
SparcISA::SparcFault::countStat
FaultStat & countStat()
Definition: faults.hh:88
SparcISA::SparcFaultBase::FaultVals
Definition: faults.hh:58
addr
ip6_addr_t addr
Definition: inet.hh:423
SparcISA::SpillNOther::SpillNOther
SpillNOther(uint32_t n)
Definition: faults.hh:253
SparcISA::TagOverflow
Definition: faults.hh:135
SparcISA::MemAddressNotAligned
Definition: faults.hh:157
SparcISA::SparcFaultBase::FaultVals::trapType
const TrapType trapType
Definition: faults.hh:61
SparcISA::DataRealTranslationMiss
Definition: faults.hh:173
SparcISA::FillNOther::FillNOther
FillNOther(uint32_t n)
Definition: faults.hh:270
SparcISA::SparcFault::getNextLevel
PrivilegeLevel getNextLevel(PrivilegeLevel current)
Definition: faults.hh:91
ArmISA::il
Bitfield< 20 > il
Definition: miscregs_types.hh:57
SparcISA::EnumeratedFault::EnumeratedFault
EnumeratedFault(uint32_t n)
Definition: faults.hh:183
RefCountingPtr< StaticInst >
SparcISA::SparcFaultBase::Hyperprivileged
@ Hyperprivileged
Definition: faults.hh:52
SparcISA::FastDataAccessMMUMiss
Definition: faults.hh:218
SparcISA::PrivilegedAction
Definition: faults.hh:164
SparcISA::FastInstructionAccessMMUMiss::vaddr
Addr vaddr
Definition: faults.hh:208
SparcISA::SparcFaultBase::H
@ H
Definition: faults.hh:52
SparcISA::InstructionBreakpoint
Definition: faults.hh:233
FaultBase
Definition: faults.hh:54
SparcISA::InstructionAccessException
Definition: faults.hh:114
SparcISA::SparcFaultBase::U
@ U
Definition: faults.hh:50
SparcISA::LDQFMemAddressNotAligned
Definition: faults.hh:166
SparcISA::doNormalFault
void doNormalFault(ThreadContext *tc, TrapType tt, bool gotoHpriv)
This sets everything up for a normal trap except for actually jumping to the handler.
Definition: faults.cc:379
SparcISA::SparcFaultBase::ShouldntHappen
@ ShouldntHappen
Definition: faults.hh:55
RegVal
uint64_t RegVal
Definition: types.hh:168
SparcISA::SparcFaultBase::invoke
void invoke(ThreadContext *tc, const StaticInstPtr &inst=StaticInst::nullStaticInstPtr)
Definition: faults.cc:497
SparcISA::STDFMemAddressNotAligned
Definition: faults.hh:162
SparcISA::SparcFaultBase::FaultVals::priority
const FaultPriority priority
Definition: faults.hh:62
SparcISA::DivisionByZero
Definition: faults.hh:139
SparcISA::DataAccessException
Definition: faults.hh:149

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