Go to the documentation of this file.
30 #ifndef __ARCH_SPARC_INSTS_STATIC_INST_HH__
31 #define __ARCH_SPARC_INSTS_STATIC_INST_HH__
102 const RegId indexArray[],
int num)
const;
118 #endif //__ARCH_SPARC_INSTS_STATIC_INST_HH__
@ FUnorderedOrLessOrEqual
const char * CondTestAbbrev[]
void printDestReg(std::ostream &os, int reg) const
Base, ISA-independent static instruction class.
size_t asBytes(void *buf, size_t size) override
Instruction classes can override this function to return a a representation of themselves as a blob o...
Register ID: describe an architectural register with its class and index.
static void printReg(std::ostream &os, RegId reg)
void printSrcReg(std::ostream &os, int reg) const
static bool passesCondition(uint32_t codes, uint32_t condition)
StaticInst(const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass)
Constructor.
@ FUnorderedOrGreaterOrEqual
void printRegArray(std::ostream &os, const RegId indexArray[], int num) const
const char * mnemonic
Base mnemonic (e.g., "add").
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
void advancePC(PCState &pcState) const override
Base class for all SPARC static instructions.
size_t simpleAsBytes(void *buf, size_t max_size, const T &t)
static void printMnemonic(std::ostream &os, const char *mnemonic)
static bool passesFpCondition(uint32_t fcc, uint32_t condition)
const ExtMachInst machInst
The binary machine instruction.
Generated on Wed Sep 30 2020 14:02:00 for gem5 by doxygen 1.8.17