gem5  v20.1.0.0
decoder.cc
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40 
41 #include "arch/arm/decoder.hh"
42 
43 #include "arch/arm/isa.hh"
44 #include "arch/arm/isa_traits.hh"
45 #include "arch/arm/utility.hh"
46 #include "base/trace.hh"
47 #include "debug/Decoder.hh"
48 #include "sim/full_system.hh"
49 
50 namespace ArmISA
51 {
52 
54 
56  : data(0), fpscrLen(0), fpscrStride(0),
57  decoderFlavor(isa->decoderFlavor())
58 {
59  reset();
60 
61  // Initialize SVE vector length
62  sveLen = (isa->getCurSveVecLenInBitsAtReset() >> 7) - 1;
63 }
64 
65 void
67 {
68  bigThumb = false;
69  offset = 0;
70  emi = 0;
71  instDone = false;
72  outOfBytes = true;
73  foundIt = false;
74 }
75 
76 void
78 {
79  // emi is typically ready, with some caveats below...
80  instDone = true;
81 
82  if (!emi.thumb) {
83  emi.instBits = data;
84  if (!emi.aarch64) {
85  emi.sevenAndFour = bits(data, 7) && bits(data, 4);
86  emi.isMisc = (bits(data, 24, 23) == 0x2 &&
87  bits(data, 20) == 0);
88  }
89  consumeBytes(4);
90  DPRINTF(Decoder, "Arm inst: %#x.\n", (uint64_t)emi);
91  } else {
92  uint16_t word = (data >> (offset * 8));
93  if (bigThumb) {
94  // A 32 bit thumb inst is half collected.
95  emi.instBits = emi.instBits | word;
96  bigThumb = false;
97  consumeBytes(2);
98  DPRINTF(Decoder, "Second half of 32 bit Thumb: %#x.\n",
99  emi.instBits);
100  } else {
101  uint16_t highBits = word & 0xF800;
102  if (highBits == 0xE800 || highBits == 0xF000 ||
103  highBits == 0xF800) {
104  // The start of a 32 bit thumb inst.
105  emi.bigThumb = 1;
106  if (offset == 0) {
107  // We've got the whole thing.
108  emi.instBits = (data >> 16) | (data << 16);
109  DPRINTF(Decoder, "All of 32 bit Thumb: %#x.\n",
110  emi.instBits);
111  consumeBytes(4);
112  } else {
113  // We only have the first half word.
115  "First half of 32 bit Thumb.\n");
116  emi.instBits = (uint32_t)word << 16;
117  bigThumb = true;
118  consumeBytes(2);
119  // emi not ready yet.
120  instDone = false;
121  }
122  } else {
123  // A 16 bit thumb inst.
124  consumeBytes(2);
125  emi.instBits = word;
126  // Set the condition code field artificially.
127  emi.condCode = COND_UC;
128  DPRINTF(Decoder, "16 bit Thumb: %#x.\n",
129  emi.instBits);
130  if (bits(word, 15, 8) == 0xbf &&
131  bits(word, 3, 0) != 0x0) {
132  foundIt = true;
133  itBits = bits(word, 7, 0);
135  "IT detected, cond = %#x, mask = %#x\n",
136  itBits.cond, itBits.mask);
137  }
138  }
139  }
140  }
141 }
142 
143 void
145 {
146  offset += numBytes;
147  assert(offset <= sizeof(MachInst) || emi.decoderFault);
148  if (offset == sizeof(MachInst))
149  outOfBytes = true;
150 }
151 
152 void
153 Decoder::moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
154 {
155  data = letoh(inst);
156  offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
157  emi.thumb = pc.thumb();
158  emi.aarch64 = pc.aarch64();
159  emi.fpscrLen = fpscrLen;
160  emi.fpscrStride = fpscrStride;
161  emi.sveLen = sveLen;
162 
163  const Addr alignment(pc.thumb() ? 0x1 : 0x3);
164  emi.decoderFault = static_cast<uint8_t>(
165  pc.instAddr() & alignment ? DecoderFault::UNALIGNED : DecoderFault::OK);
166 
167  outOfBytes = false;
168  process();
169 }
170 
173 {
174  if (!instDone)
175  return NULL;
176 
177  const int inst_size((!emi.thumb || emi.bigThumb) ? 4 : 2);
178  ExtMachInst this_emi(emi);
179 
180  pc.npc(pc.pc() + inst_size);
181  if (foundIt)
182  pc.nextItstate(itBits);
183  this_emi.itstate = pc.itstate();
184  this_emi.illegalExecution = pc.illegalExec() ? 1 : 0;
185  this_emi.debugStep = pc.debugStep() ? 1 : 0;
186  pc.size(inst_size);
187 
188  emi = 0;
189  instDone = false;
190  foundIt = false;
191 
192  return decode(this_emi, pc.instAddr());
193 }
194 
195 }
ArmISA::Decoder::emi
ExtMachInst emi
Definition: decoder.hh:62
sc_dt::word
unsigned int word
Definition: scfx_mant.hh:96
ArmISA::Decoder::process
void process()
Pre-decode an instruction from the current state of the decoder.
Definition: decoder.cc:77
data
const char data[]
Definition: circlebuf.test.cc:42
ArmISA::Decoder::data
MachInst data
Definition: decoder.hh:63
ArmISA::Decoder::fpscrLen
int fpscrLen
Definition: decoder.hh:71
ArmISA::Decoder::Decoder
Decoder(ISA *isa=nullptr)
Definition: decoder.cc:55
ArmISA::MachInst
uint32_t MachInst
Definition: types.hh:52
ArmISA::COND_UC
@ COND_UC
Definition: ccregs.hh:79
ArmISA::Decoder::outOfBytes
bool outOfBytes
Definition: decoder.hh:66
GenericISA::BasicDecodeCache
Definition: decode_cache.hh:45
ArmISA::ISA
Definition: isa.hh:65
ArmISA
Definition: ccregs.hh:41
ArmISA::Decoder::offset
int offset
Definition: decoder.hh:67
letoh
T letoh(T value)
Definition: byteswap.hh:141
ArmISA::Decoder::decode
StaticInstPtr decode(ArmISA::PCState &pc)
Decode an instruction or fetch it from the code cache.
Definition: decoder.cc:172
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:234
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
isa.hh
ArmISA::fpscrStride
Bitfield< 41, 40 > fpscrStride
Definition: types.hh:84
ArmISA::Decoder::instDone
bool instDone
Definition: decoder.hh:65
ArmISA::fpscrLen
Bitfield< 39, 37 > fpscrLen
Definition: types.hh:85
ArmISA::Decoder::sveLen
int sveLen
SVE vector length, encoded in the same format as the ZCR_EL<x>.LEN bitfields.
Definition: decoder.hh:78
ArmISA::Decoder::itBits
ITSTATE itBits
Definition: decoder.hh:69
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
ArmISA::Decoder::reset
void reset()
Reset the decoders internal state.
Definition: decoder.cc:66
utility.hh
full_system.hh
ArmISA::Decoder
Definition: decoder.hh:58
ArmISA::OK
@ OK
No fault.
Definition: types.hh:704
ArmISA::Decoder::defaultCache
static GenericISA::BasicDecodeCache defaultCache
A cache of decoded instruction objects.
Definition: decoder.hh:83
MipsISA::PCState
GenericISA::DelaySlotPCState< MachInst > PCState
Definition: types.hh:41
ArmISA::UNALIGNED
@ UNALIGNED
Unaligned instruction fault.
Definition: types.hh:705
isa_traits.hh
RefCountingPtr< StaticInst >
trace.hh
ArmISA::Decoder::fpscrStride
int fpscrStride
Definition: decoder.hh:72
ArmISA::Decoder::foundIt
bool foundIt
Definition: decoder.hh:68
decoder.hh
ArmISA::Decoder::moreBytes
void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
Feed data to the decoder.
Definition: decoder.cc:153
ArmISA::Decoder::bigThumb
bool bigThumb
Definition: decoder.hh:64
ArmISA::Decoder::consumeBytes
void consumeBytes(int numBytes)
Consume bytes by moving the offset into the data word and sanity check the results.
Definition: decoder.cc:144
ArmISA::ISA::getCurSveVecLenInBitsAtReset
unsigned getCurSveVecLenInBitsAtReset() const
Definition: isa.hh:808
bits
T bits(T val, int first, int last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
Definition: bitfield.hh:75
MipsISA::ExtMachInst
uint64_t ExtMachInst
Definition: types.hh:39

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