gem5
v20.1.0.0
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DRAM specific generator is for issuing request with variable page hit length and bank utilization. More...
#include <dram_gen.hh>
Public Member Functions | |
DramGen (SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, Enums::AddrMap addr_mapping, unsigned int nbr_of_ranks) | |
Create a DRAM address sequence generator. More... | |
PacketPtr | getNextPacket () |
Get the next generated packet. More... | |
void | genStartAddr (unsigned int new_bank, unsigned int new_rank) |
Insert bank, rank, and column bits into packed address to create address for 1st command in a series. More... | |
Public Member Functions inherited from RandomGen | |
RandomGen (SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit) | |
Create a random address sequence generator. More... | |
void | enter () |
Enter this generator state. More... | |
PacketPtr | getNextPacket () |
Get the next generated packet. More... | |
Tick | nextPacketTick (bool elastic, Tick delay) const |
Determine the tick when the next packet is available. More... | |
Public Member Functions inherited from StochasticGen | |
StochasticGen (SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit) | |
Public Member Functions inherited from BaseGen | |
BaseGen (SimObject &obj, RequestorID requestor_id, Tick _duration) | |
Create a base generator. More... | |
virtual | ~BaseGen () |
std::string | name () const |
Get the name, useful for DPRINTFs. More... | |
virtual void | exit () |
Exit this generator state. More... | |
Protected Attributes | |
const unsigned int | numSeqPkts |
Number of sequential DRAM packets to be generated per cpu request. More... | |
unsigned int | countNumSeqPkts |
Track number of sequential packets generated for a request More... | |
Addr | addr |
Address of request. More... | |
bool | isRead |
Remember type of requests to be generated in series. More... | |
const unsigned int | pageSize |
Page size of DRAM. More... | |
const unsigned int | pageBits |
Number of page bits in DRAM address. More... | |
const unsigned int | bankBits |
Number of bank bits in DRAM address. More... | |
const unsigned int | blockBits |
Number of block bits in DRAM address. More... | |
const unsigned int | nbrOfBanksDRAM |
Number of banks in DRAM. More... | |
const unsigned int | nbrOfBanksUtil |
Number of banks to be utilized for a given configuration. More... | |
Enums::AddrMap | addrMapping |
Address mapping to be used. More... | |
const unsigned int | rankBits |
Number of rank bits in DRAM address. More... | |
const unsigned int | nbrOfRanks |
Number of ranks to be utilized for a given configuration. More... | |
Protected Attributes inherited from RandomGen | |
Addr | dataManipulated |
Counter to determine the amount of data manipulated. More... | |
Protected Attributes inherited from StochasticGen | |
const Addr | startAddr |
Start of address range. More... | |
const Addr | endAddr |
End of address range. More... | |
const Addr | blocksize |
Blocksize and address increment. More... | |
const Addr | cacheLineSize |
Cache line size in the simulated system. More... | |
const Tick | minPeriod |
Request generation period. More... | |
const Tick | maxPeriod |
const uint8_t | readPercent |
Percent of generated transactions that should be reads. More... | |
const Addr | dataLimit |
Maximum amount of data to manipulate. More... | |
Protected Attributes inherited from BaseGen | |
const std::string | _name |
Name to use for status and debug printing. More... | |
const RequestorID | requestorId |
The RequestorID used for generating requests. More... | |
Additional Inherited Members | |
Public Attributes inherited from BaseGen | |
const Tick | duration |
Time to spend in this state. More... | |
Protected Member Functions inherited from BaseGen | |
PacketPtr | getPacket (Addr addr, unsigned size, const MemCmd &cmd, Request::FlagsType flags=0) |
Generate a new request and associated packet. More... | |
DRAM specific generator is for issuing request with variable page hit length and bank utilization.
Currently assumes a single channel configuration.
Definition at line 58 of file dram_gen.hh.
DramGen::DramGen | ( | SimObject & | obj, |
RequestorID | requestor_id, | ||
Tick | _duration, | ||
Addr | start_addr, | ||
Addr | end_addr, | ||
Addr | _blocksize, | ||
Addr | cacheline_size, | ||
Tick | min_period, | ||
Tick | max_period, | ||
uint8_t | read_percent, | ||
Addr | data_limit, | ||
unsigned int | num_seq_pkts, | ||
unsigned int | page_size, | ||
unsigned int | nbr_of_banks_DRAM, | ||
unsigned int | nbr_of_banks_util, | ||
Enums::AddrMap | addr_mapping, | ||
unsigned int | nbr_of_ranks | ||
) |
Create a DRAM address sequence generator.
obj | SimObject owning this sequence generator |
requestor_id | RequestorID related to the memory requests |
_duration | duration of this state before transitioning |
start_addr | Start address |
end_addr | End address |
_blocksize | Size used for transactions injected |
cacheline_size | cache line size in the system |
min_period | Lower limit of random inter-transaction time |
max_period | Upper limit of random inter-transaction time |
read_percent | Percent of transactions that are reads |
data_limit | Upper limit on how much data to read/write |
num_seq_pkts | Number of packets per stride, each of _blocksize |
page_size | Page size (bytes) used in the DRAM |
nbr_of_banks_DRAM | Total number of banks in DRAM |
nbr_of_banks_util | Number of banks to utilized, for N banks, we will use banks: 0->(N-1) |
addr_mapping | Address mapping to be used, assumes single channel system |
Definition at line 47 of file dram_gen.cc.
References fatal.
void DramGen::genStartAddr | ( | unsigned int | new_bank, |
unsigned int | new_rank | ||
) |
Insert bank, rank, and column bits into packed address to create address for 1st command in a series.
new_bank | Bank number of next packet series |
new_rank | Rank value of next packet series |
Definition at line 143 of file dram_gen.cc.
References addr, addrMapping, bankBits, blockBits, StochasticGen::blocksize, StochasticGen::endAddr, numSeqPkts, pageBits, pageSize, Random::random(), random_mt, rankBits, replaceBits(), and StochasticGen::startAddr.
Referenced by getNextPacket(), and DramRotGen::getNextPacket().
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Get the next generated packet.
Implements BaseGen.
Reimplemented in DramRotGen.
Definition at line 78 of file dram_gen.cc.
References addr, addrMapping, bankBits, blockBits, StochasticGen::blocksize, countNumSeqPkts, RandomGen::dataManipulated, DPRINTF, genStartAddr(), BaseGen::getPacket(), isRead, nbrOfBanksDRAM, nbrOfBanksUtil, nbrOfRanks, numSeqPkts, pageBits, pageSize, Random::random(), random_mt, rankBits, StochasticGen::readPercent, MemCmd::ReadReq, replaceBits(), and MemCmd::WriteReq.
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Address of request.
Definition at line 115 of file dram_gen.hh.
Referenced by genStartAddr(), getNextPacket(), and DramRotGen::getNextPacket().
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Address mapping to be used.
Definition at line 139 of file dram_gen.hh.
Referenced by genStartAddr(), getNextPacket(), and DramRotGen::getNextPacket().
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Number of bank bits in DRAM address.
Definition at line 127 of file dram_gen.hh.
Referenced by genStartAddr(), getNextPacket(), and DramRotGen::getNextPacket().
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Number of block bits in DRAM address.
Definition at line 130 of file dram_gen.hh.
Referenced by genStartAddr(), getNextPacket(), and DramRotGen::getNextPacket().
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Track number of sequential packets generated for a request
Definition at line 112 of file dram_gen.hh.
Referenced by getNextPacket(), and DramRotGen::getNextPacket().
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Remember type of requests to be generated in series.
Definition at line 118 of file dram_gen.hh.
Referenced by getNextPacket(), and DramRotGen::getNextPacket().
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Number of banks in DRAM.
Definition at line 133 of file dram_gen.hh.
Referenced by getNextPacket(), and DramRotGen::getNextPacket().
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Number of banks to be utilized for a given configuration.
Definition at line 136 of file dram_gen.hh.
Referenced by getNextPacket(), and DramRotGen::getNextPacket().
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Number of ranks to be utilized for a given configuration.
Definition at line 145 of file dram_gen.hh.
Referenced by getNextPacket(), and DramRotGen::getNextPacket().
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Number of sequential DRAM packets to be generated per cpu request.
Definition at line 109 of file dram_gen.hh.
Referenced by genStartAddr(), getNextPacket(), and DramRotGen::getNextPacket().
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Number of page bits in DRAM address.
Definition at line 124 of file dram_gen.hh.
Referenced by genStartAddr(), getNextPacket(), and DramRotGen::getNextPacket().
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Page size of DRAM.
Definition at line 121 of file dram_gen.hh.
Referenced by genStartAddr(), getNextPacket(), and DramRotGen::getNextPacket().
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Number of rank bits in DRAM address.
Definition at line 142 of file dram_gen.hh.
Referenced by genStartAddr(), getNextPacket(), and DramRotGen::getNextPacket().