gem5
v20.1.0.0
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#include <gic_v3_distributor.hh>
Public Member Functions | |
Gicv3Distributor (Gicv3 *gic, uint32_t it_lines) | |
void | sendInt (uint32_t int_id) |
void | clearInt (uint32_t int_id) |
void | deassertSPI (uint32_t int_id) |
void | clearIrqCpuInterface (uint32_t int_id) |
void | init () |
uint64_t | read (Addr addr, size_t size, bool is_secure_access) |
void | write (Addr addr, uint64_t data, size_t size, bool is_secure_access) |
Public Member Functions inherited from Serializable | |
Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. More... | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. More... | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Static Public Attributes | |
static const uint32_t | ADDR_RANGE_SIZE = 0x10000 |
static const uint32_t | IDBITS = 0xf |
Protected Types | |
enum | { GICD_CTLR = 0x0000, GICD_TYPER = 0x0004, GICD_IIDR = 0x0008, GICD_STATUSR = 0x0010, GICD_SETSPI_NSR = 0x0040, GICD_CLRSPI_NSR = 0x0048, GICD_SETSPI_SR = 0x0050, GICD_CLRSPI_SR = 0x0058, GICD_SGIR = 0x0f00, GICD_PIDR0 = 0xffe0, GICD_PIDR1 = 0xffe4, GICD_PIDR2 = 0xffe8, GICD_PIDR3 = 0xffec, GICD_PIDR4 = 0xffd0, GICD_PIDR5 = 0xffd4, GICD_PIDR6 = 0xffd8, GICD_PIDR7 = 0xffdc } |
Protected Member Functions | |
BitUnion64 (IROUTER) Bitfield< 63 | |
EndBitUnion (IROUTER) static const uint32_t GICD_CTLR_ENABLEGRP0 | |
void | activateIRQ (uint32_t int_id) |
void | deactivateIRQ (uint32_t int_id) |
void | fullUpdate () |
Gicv3::GroupId | getIntGroup (int int_id) const |
bool | groupEnabled (Gicv3::GroupId group) const |
Gicv3::IntStatus | intStatus (uint32_t int_id) const |
bool | isNotSPI (uint32_t int_id) const |
bool | isLevelSensitive (uint32_t int_id) const |
bool | treatAsEdgeTriggered (uint32_t int_id) const |
This helper is used to check if an interrupt should be treated as edge triggered in the following scenarios: More... | |
bool | nsAccessToSecInt (uint32_t int_id, bool is_secure_access) const |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
void | update () |
Gicv3CPUInterface * | route (uint32_t int_id) |
Protected Attributes | |
Gicv3 * | gic |
const uint32_t | itLines |
res0_1 | |
Bitfield< 39, 32 > | Aff3 |
Bitfield< 31 > | IRM |
Bitfield< 30, 24 > | res0_2 |
Bitfield< 23, 16 > | Aff2 |
Bitfield< 15, 8 > | Aff1 |
Bitfield< 7, 0 > | Aff0 |
bool | ARE |
bool | DS |
bool | EnableGrp1S |
bool | EnableGrp1NS |
bool | EnableGrp0 |
std::vector< uint8_t > | irqGroup |
std::vector< bool > | irqEnabled |
std::vector< bool > | irqPending |
std::vector< bool > | irqPendingIspendr |
std::vector< bool > | irqActive |
std::vector< uint8_t > | irqPriority |
std::vector< Gicv3::IntTriggerType > | irqConfig |
std::vector< uint8_t > | irqGrpmod |
std::vector< uint8_t > | irqNsacr |
std::vector< IROUTER > | irqAffinityRouting |
uint32_t | gicdTyper |
uint32_t | gicdPidr0 |
uint32_t | gicdPidr1 |
uint32_t | gicdPidr2 |
uint32_t | gicdPidr3 |
uint32_t | gicdPidr4 |
Static Protected Attributes | |
static const AddrRange | GICD_IGROUPR |
static const AddrRange | GICD_ISENABLER |
static const AddrRange | GICD_ICENABLER |
static const AddrRange | GICD_ISPENDR |
static const AddrRange | GICD_ICPENDR |
static const AddrRange | GICD_ISACTIVER |
static const AddrRange | GICD_ICACTIVER |
static const AddrRange | GICD_IPRIORITYR |
static const AddrRange | GICD_ITARGETSR |
static const AddrRange | GICD_ICFGR |
static const AddrRange | GICD_IGRPMODR |
static const AddrRange | GICD_NSACR |
static const AddrRange | GICD_CPENDSGIR |
static const AddrRange | GICD_SPENDSGIR |
static const AddrRange | GICD_IROUTER |
static const uint32_t | GICD_CTLR_ENABLEGRP1 = 1 << 0 |
static const uint32_t | GICD_CTLR_ENABLEGRP1NS = 1 << 1 |
static const uint32_t | GICD_CTLR_ENABLEGRP1A = 1 << 1 |
static const uint32_t | GICD_CTLR_ENABLEGRP1S = 1 << 2 |
static const uint32_t | GICD_CTLR_DS = 1 << 6 |
Friends | |
class | Gicv3Redistributor |
class | Gicv3CPUInterface |
class | Gicv3Its |
Additional Inherited Members | |
Static Public Member Functions inherited from Serializable | |
static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. More... | |
static void | serializeAll (const std::string &cpt_dir) |
Serializes all the SimObjects. More... | |
static void | unserializeGlobals (CheckpointIn &cp) |
Definition at line 48 of file gic_v3_distributor.hh.
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Definition at line 61 of file gic_v3_distributor.hh.
Gicv3Distributor::Gicv3Distributor | ( | Gicv3 * | gic, |
uint32_t | it_lines | ||
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Definition at line 67 of file gic_v3_distributor.cc.
References divCeil(), DS, BaseGic::getSystem(), gic, gicdTyper, ArmSystem::haveSecurity(), IDBITS, Gicv3::INTID_SECURE, itLines, and panic_if.
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Definition at line 1159 of file gic_v3_distributor.cc.
References irqActive, irqPending, and treatAsEdgeTriggered().
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void Gicv3Distributor::clearInt | ( | uint32_t | int_id | ) |
Definition at line 1012 of file gic_v3_distributor.cc.
References deassertSPI(), and isLevelSensitive().
Referenced by Gicv3::clearInt().
void Gicv3Distributor::clearIrqCpuInterface | ( | uint32_t | int_id | ) |
Definition at line 1070 of file gic_v3_distributor.cc.
References route().
Referenced by deassertSPI(), and write().
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Definition at line 1168 of file gic_v3_distributor.cc.
References irqActive.
Referenced by Gicv3CPUInterface::deactivateIRQ().
void Gicv3Distributor::deassertSPI | ( | uint32_t | int_id | ) |
Definition at line 1022 of file gic_v3_distributor.cc.
References clearIrqCpuInterface(), irqPending, itLines, panic_if, Gicv3::PPI_MAX, Gicv3::SGI_MAX, and update().
Referenced by clearInt(), and write().
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Definition at line 1132 of file gic_v3_distributor.cc.
References DS, Gicv3::G0S, Gicv3::G1NS, Gicv3::G1S, irqGroup, irqGrpmod, itLines, panic_if, Gicv3::PPI_MAX, and Gicv3::SGI_MAX.
Referenced by nsAccessToSecInt(), read(), route(), Gicv3CPUInterface::setMiscReg(), update(), Gicv3CPUInterface::virtualDeactivateIRQ(), and write().
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Definition at line 182 of file gic_v3_distributor.hh.
References DS, EnableGrp0, EnableGrp1NS, EnableGrp1S, Gicv3::G0S, Gicv3::G1NS, Gicv3::G1S, and panic.
Referenced by Gicv3Redistributor::canBeSelectedFor1toNInterrupt(), Gicv3Redistributor::update(), and update().
void Gicv3Distributor::init | ( | ) |
Definition at line 132 of file gic_v3_distributor.cc.
Referenced by Gicv3::init().
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Definition at line 1113 of file gic_v3_distributor.cc.
References Gicv3::INT_ACTIVE, Gicv3::INT_ACTIVE_PENDING, Gicv3::INT_INACTIVE, Gicv3::INT_PENDING, irqActive, irqPending, itLines, panic_if, Gicv3::PPI_MAX, and Gicv3::SGI_MAX.
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Definition at line 226 of file gic_v3_distributor.hh.
References Gicv3::INT_LEVEL_SENSITIVE, and irqConfig.
Referenced by clearInt(), and treatAsEdgeTriggered().
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Definition at line 217 of file gic_v3_distributor.hh.
References itLines, Gicv3::PPI_MAX, and Gicv3::SGI_MAX.
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Definition at line 247 of file gic_v3_distributor.hh.
References DS, Gicv3::G1NS, and getIntGroup().
uint64_t Gicv3Distributor::read | ( | Addr | addr, |
size_t | size, | ||
bool | is_secure_access | ||
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Definition at line 137 of file gic_v3_distributor.cc.
References addr, ARE, AddrRange::contains(), DS, EnableGrp0, EnableGrp1NS, EnableGrp1S, Gicv3::G1NS, getIntGroup(), GICD_CPENDSGIR, GICD_CTLR, GICD_ICACTIVER, GICD_ICENABLER, GICD_ICFGR, GICD_ICPENDR, GICD_IGROUPR, GICD_IGRPMODR, GICD_IIDR, GICD_IPRIORITYR, GICD_IROUTER, GICD_ISACTIVER, GICD_ISENABLER, GICD_ISPENDR, GICD_ITARGETSR, GICD_NSACR, GICD_PIDR0, GICD_PIDR1, GICD_PIDR2, GICD_PIDR3, GICD_PIDR4, GICD_PIDR5, GICD_PIDR6, GICD_PIDR7, GICD_SPENDSGIR, GICD_STATUSR, GICD_TYPER, gicdPidr0, gicdPidr1, gicdPidr2, gicdPidr3, gicdPidr4, gicdTyper, ArmISA::i, Gicv3::INT_EDGE_TRIGGERED, irqActive, irqAffinityRouting, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPriority, isNotSPI(), itLines, nsAccessToSecInt(), panic, AddrRange::start(), X86ISA::val, and warn.
Referenced by Gicv3::read().
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Definition at line 1033 of file gic_v3_distributor.cc.
References Gicv3Redistributor::canBeSelectedFor1toNInterrupt(), Gicv3Redistributor::getCPUInterface(), getIntGroup(), Gicv3::getRedistributor(), Gicv3::getRedistributorByAffinity(), BaseGic::getSystem(), gic, ArmISA::i, and irqAffinityRouting.
Referenced by clearIrqCpuInterface(), and update().
void Gicv3Distributor::sendInt | ( | uint32_t | int_id | ) |
Definition at line 1000 of file gic_v3_distributor.cc.
References DPRINTF, irqPending, irqPendingIspendr, itLines, panic_if, Gicv3::PPI_MAX, Gicv3::SGI_MAX, and update().
Referenced by Gicv3::sendInt(), and write().
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Serialize an object.
Output an object's state into the current checkpoint section.
cp | Checkpoint state |
Implements Serializable.
Definition at line 1174 of file gic_v3_distributor.cc.
References ARE, DS, EnableGrp0, EnableGrp1NS, EnableGrp1S, irqActive, irqAffinityRouting, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPendingIspendr, irqPriority, SERIALIZE_CONTAINER, and SERIALIZE_SCALAR.
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This helper is used to check if an interrupt should be treated as edge triggered in the following scenarios:
a) While activating the interrupt b) While clearing an interrupt via ICPENDR
In fact, in these two situations, a level sensitive interrupt which had been made pending via a write to ISPENDR, will be treated as it if was edge triggered.
Definition at line 242 of file gic_v3_distributor.hh.
References irqPendingIspendr, and isLevelSensitive().
Referenced by activateIRQ(), and write().
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Unserialize an object.
Read an object's state from the current checkpoint section.
cp | Checkpoint state |
Implements Serializable.
Definition at line 1194 of file gic_v3_distributor.cc.
References ARE, DS, EnableGrp0, EnableGrp1NS, EnableGrp1S, irqActive, irqAffinityRouting, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPendingIspendr, irqPriority, UNSERIALIZE_CONTAINER, and UNSERIALIZE_SCALAR.
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Definition at line 1078 of file gic_v3_distributor.cc.
References getIntGroup(), Gicv3::getRedistributor(), BaseGic::getSystem(), gic, Gicv3CPUInterface::hppi_t::group, groupEnabled(), Gicv3CPUInterface::hppi, ArmISA::i, Gicv3CPUInterface::hppi_t::intid, irqActive, irqEnabled, irqPending, irqPriority, itLines, Gicv3::PPI_MAX, Gicv3CPUInterface::hppi_t::prio, route(), Gicv3::SGI_MAX, and Gicv3Redistributor::update().
Referenced by deassertSPI(), sendInt(), Gicv3Redistributor::updateDistributor(), Gicv3CPUInterface::updateDistributor(), and write().
void Gicv3Distributor::write | ( | Addr | addr, |
uint64_t | data, | ||
size_t | size, | ||
bool | is_secure_access | ||
) |
Definition at line 506 of file gic_v3_distributor.cc.
References addr, bits(), clearIrqCpuInterface(), AddrRange::contains(), data, deassertSPI(), Trace::disable(), DPRINTF, DS, X86ISA::enable, EnableGrp0, EnableGrp1NS, EnableGrp1S, Gicv3::G1NS, getIntGroup(), GICD_CLRSPI_NSR, GICD_CLRSPI_SR, GICD_CTLR, GICD_CTLR_DS, GICD_CTLR_ENABLEGRP1A, GICD_CTLR_ENABLEGRP1NS, GICD_CTLR_ENABLEGRP1S, GICD_ICACTIVER, GICD_ICENABLER, GICD_ICFGR, GICD_ICPENDR, GICD_IGROUPR, GICD_IGRPMODR, GICD_IPRIORITYR, GICD_IROUTER, GICD_ISACTIVER, GICD_ISENABLER, GICD_ISPENDR, GICD_ITARGETSR, GICD_NSACR, GICD_SETSPI_NSR, GICD_SETSPI_SR, GICD_SGIR, ArmISA::i, Gicv3::INT_EDGE_TRIGGERED, Gicv3::INT_LEVEL_SENSITIVE, irqActive, irqAffinityRouting, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPendingIspendr, irqPriority, isNotSPI(), itLines, nsAccessToSecInt(), panic, sendInt(), AddrRange::start(), treatAsEdgeTriggered(), update(), and warn.
Referenced by Gicv3::write().
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Definition at line 53 of file gic_v3_distributor.hh.
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Definition at line 54 of file gic_v3_distributor.hh.
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Definition at line 52 of file gic_v3_distributor.hh.
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Definition at line 171 of file gic_v3_distributor.hh.
Referenced by Gicv3::init().
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Definition at line 136 of file gic_v3_distributor.hh.
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Definition at line 135 of file gic_v3_distributor.hh.
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Definition at line 134 of file gic_v3_distributor.hh.
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Definition at line 131 of file gic_v3_distributor.hh.
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Definition at line 146 of file gic_v3_distributor.hh.
Referenced by read(), serialize(), and unserialize().
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Definition at line 147 of file gic_v3_distributor.hh.
Referenced by Gicv3CPUInterface::getHPPIR0(), Gicv3CPUInterface::getHPPIR1(), getIntGroup(), Gicv3Redistributor::getIntGroup(), Gicv3Distributor(), groupEnabled(), Gicv3CPUInterface::intSignalType(), nsAccessToSecInt(), Gicv3Redistributor::read(), read(), Gicv3Redistributor::sendSGI(), serialize(), Gicv3CPUInterface::setMiscReg(), unserialize(), Gicv3Redistributor::write(), and write().
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Definition at line 150 of file gic_v3_distributor.hh.
Referenced by groupEnabled(), Gicv3CPUInterface::groupEnabled(), read(), serialize(), unserialize(), and write().
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Definition at line 149 of file gic_v3_distributor.hh.
Referenced by groupEnabled(), Gicv3CPUInterface::groupEnabled(), read(), serialize(), unserialize(), and write().
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Definition at line 148 of file gic_v3_distributor.hh.
Referenced by groupEnabled(), Gicv3CPUInterface::groupEnabled(), read(), serialize(), unserialize(), and write().
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Definition at line 58 of file gic_v3_distributor.hh.
Referenced by Gicv3Distributor(), route(), and update().
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Definition at line 123 of file gic_v3_distributor.hh.
Referenced by read().
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Definition at line 144 of file gic_v3_distributor.hh.
Referenced by write().
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Definition at line 140 of file gic_v3_distributor.hh.
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Definition at line 142 of file gic_v3_distributor.hh.
Referenced by write().
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Definition at line 141 of file gic_v3_distributor.hh.
Referenced by write().
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Definition at line 143 of file gic_v3_distributor.hh.
Referenced by write().
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Definition at line 111 of file gic_v3_distributor.hh.
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Definition at line 103 of file gic_v3_distributor.hh.
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Definition at line 117 of file gic_v3_distributor.hh.
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Definition at line 107 of file gic_v3_distributor.hh.
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Definition at line 99 of file gic_v3_distributor.hh.
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Definition at line 119 of file gic_v3_distributor.hh.
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Definition at line 113 of file gic_v3_distributor.hh.
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Definition at line 127 of file gic_v3_distributor.hh.
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Definition at line 109 of file gic_v3_distributor.hh.
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Definition at line 101 of file gic_v3_distributor.hh.
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Definition at line 105 of file gic_v3_distributor.hh.
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Definition at line 115 of file gic_v3_distributor.hh.
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Definition at line 121 of file gic_v3_distributor.hh.
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Definition at line 125 of file gic_v3_distributor.hh.
Referenced by read().
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Definition at line 163 of file gic_v3_distributor.hh.
Referenced by read().
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Definition at line 164 of file gic_v3_distributor.hh.
Referenced by read().
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Definition at line 165 of file gic_v3_distributor.hh.
Referenced by Gicv3Its::read(), and read().
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Definition at line 166 of file gic_v3_distributor.hh.
Referenced by read().
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Definition at line 167 of file gic_v3_distributor.hh.
Referenced by read().
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Definition at line 162 of file gic_v3_distributor.hh.
Referenced by Gicv3Distributor(), and read().
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Definition at line 172 of file gic_v3_distributor.hh.
Referenced by Gicv3Distributor(), and Gicv3Its::lpiOutOfRange().
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Definition at line 132 of file gic_v3_distributor.hh.
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Definition at line 155 of file gic_v3_distributor.hh.
Referenced by activateIRQ(), deactivateIRQ(), intStatus(), read(), serialize(), unserialize(), update(), and write().
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Definition at line 160 of file gic_v3_distributor.hh.
Referenced by read(), route(), serialize(), unserialize(), and write().
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Definition at line 157 of file gic_v3_distributor.hh.
Referenced by isLevelSensitive(), read(), serialize(), unserialize(), and write().
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Definition at line 152 of file gic_v3_distributor.hh.
Referenced by read(), serialize(), unserialize(), update(), and write().
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Definition at line 151 of file gic_v3_distributor.hh.
Referenced by getIntGroup(), read(), serialize(), unserialize(), and write().
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Definition at line 158 of file gic_v3_distributor.hh.
Referenced by getIntGroup(), read(), serialize(), unserialize(), and write().
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Definition at line 159 of file gic_v3_distributor.hh.
Referenced by read(), serialize(), unserialize(), and write().
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Definition at line 153 of file gic_v3_distributor.hh.
Referenced by activateIRQ(), deassertSPI(), intStatus(), read(), sendInt(), serialize(), unserialize(), update(), and write().
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Definition at line 154 of file gic_v3_distributor.hh.
Referenced by sendInt(), serialize(), treatAsEdgeTriggered(), unserialize(), and write().
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Definition at line 156 of file gic_v3_distributor.hh.
Referenced by read(), serialize(), unserialize(), update(), and write().
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Definition at line 59 of file gic_v3_distributor.hh.
Referenced by deassertSPI(), getIntGroup(), Gicv3Distributor(), intStatus(), isNotSPI(), read(), sendInt(), update(), and write().
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Definition at line 130 of file gic_v3_distributor.hh.
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Definition at line 133 of file gic_v3_distributor.hh.