gem5
v20.1.0.0
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#include <gic_v3_redistributor.hh>
Public Member Functions | |
void | activateIRQ (uint32_t int_id) |
bool | canBeSelectedFor1toNInterrupt (Gicv3::GroupId group) const |
void | deactivateIRQ (uint32_t int_id) |
Gicv3CPUInterface * | getCPUInterface () const |
uint32_t | processorNumber () const |
Gicv3::GroupId | getIntGroup (int int_id) const |
Gicv3::IntStatus | intStatus (uint32_t int_id) const |
uint8_t | readEntryLPI (uint32_t intid) |
void | writeEntryLPI (uint32_t intid, uint8_t lpi_entry) |
bool | isPendingLPI (uint32_t intid) |
void | setClrLPI (uint64_t data, bool set) |
void | sendSGI (uint32_t int_id, Gicv3::GroupId group, bool ns) |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
void | update () |
void | updateDistributor () |
Gicv3Redistributor (Gicv3 *gic, uint32_t cpu_id) | |
uint32_t | getAffinity () const |
void | init () |
uint64_t | read (Addr addr, size_t size, bool is_secure_access) |
void | sendPPInt (uint32_t int_id) |
void | clearPPInt (uint32_t int_id) |
void | write (Addr addr, uint64_t data, size_t size, bool is_secure_access) |
Public Member Functions inherited from Serializable | |
Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. More... | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. More... | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Attributes | |
const uint32_t | addrRangeSize |
Static Public Attributes | |
static const uint32_t | SMALLEST_LPI_ID = 8192 |
Protected Types | |
enum | { GICR_CTLR = RD_base + 0x0000, GICR_IIDR = RD_base + 0x0004, GICR_TYPER = RD_base + 0x0008, GICR_WAKER = RD_base + 0x0014, GICR_PIDR0 = RD_base + 0xffe0, GICR_PIDR1 = RD_base + 0xffe4, GICR_PIDR2 = RD_base + 0xffe8, GICR_PIDR3 = RD_base + 0xffec, GICR_PIDR4 = RD_base + 0xffd0, GICR_PIDR5 = RD_base + 0xffd4, GICR_PIDR6 = RD_base + 0xffd8, GICR_PIDR7 = RD_base + 0xffdc } |
enum | { GICR_IGROUPR0 = SGI_base + 0x0080, GICR_ISENABLER0 = SGI_base + 0x0100, GICR_ICENABLER0 = SGI_base + 0x0180, GICR_ISPENDR0 = SGI_base + 0x0200, GICR_ICPENDR0 = SGI_base + 0x0280, GICR_ISACTIVER0 = SGI_base + 0x0300, GICR_ICACTIVER0 = SGI_base + 0x0380, GICR_ICFGR0 = SGI_base + 0x0c00, GICR_ICFGR1 = SGI_base + 0x0c04, GICR_IGRPMODR0 = SGI_base + 0x0d00, GICR_NSACR = SGI_base + 0x0e00 } |
enum | { GICR_SETLPIR = RD_base + 0x0040, GICR_CLRLPIR = RD_base + 0x0048, GICR_PROPBASER = RD_base + 0x0070, GICR_PENDBASER = RD_base + 0x0078, GICR_INVLPIR = RD_base + 0x00A0, GICR_INVALLR = RD_base + 0x00B0, GICR_SYNCR = RD_base + 0x00C0 } |
Protected Member Functions | |
BitUnion8 (LPIConfigurationTableEntry) Bitfield< 7 | |
EndBitUnion (LPIConfigurationTableEntry) static const uint32_t GICR_CTLR_ENABLE_LPIS | |
bool | isLevelSensitive (uint32_t int_id) const |
bool | treatAsEdgeTriggered (uint32_t int_id) const |
This helper is used to check if an interrupt should be treated as edge triggered in the following scenarios: More... | |
Protected Attributes | |
Gicv3 * | gic |
Gicv3Distributor * | distributor |
Gicv3CPUInterface * | cpuInterface |
uint32_t | cpuId |
PortProxy * | memProxy |
bool | peInLowPowerState |
std::vector< uint8_t > | irqGroup |
std::vector< bool > | irqEnabled |
std::vector< bool > | irqPending |
std::vector< bool > | irqPendingIspendr |
std::vector< bool > | irqActive |
std::vector< uint8_t > | irqPriority |
std::vector< Gicv3::IntTriggerType > | irqConfig |
std::vector< uint8_t > | irqGrpmod |
std::vector< uint8_t > | irqNsacr |
bool | DPG1S |
bool | DPG1NS |
bool | DPG0 |
bool | EnableLPIs |
Addr | lpiConfigurationTablePtr |
uint8_t | lpiIDBits |
Addr | lpiPendingTablePtr |
priority | |
Bitfield< 1 > | res1 |
Bitfield< 0 > | enable |
Static Protected Attributes | |
static const uint32_t | RD_base = 0x0 |
static const uint32_t | SGI_base = 0x10000 |
static const uint32_t | GICR_WAKER_ProcessorSleep = 1 << 1 |
static const uint32_t | GICR_WAKER_ChildrenAsleep = 1 << 2 |
static const AddrRange | GICR_IPRIORITYR |
static const uint32_t | GICR_CTLR_DPG0 = 1 << 24 |
static const uint32_t | GICR_CTLR_DPG1NS = 1 << 25 |
static const uint32_t | GICR_CTLR_DPG1S = 1 << 26 |
Friends | |
class | Gicv3CPUInterface |
class | Gicv3Distributor |
class | Gicv3Its |
Additional Inherited Members | |
Static Public Member Functions inherited from Serializable | |
static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. More... | |
static void | serializeAll (const std::string &cpt_dir) |
Serializes all the SimObjects. More... | |
static void | unserializeGlobals (CheckpointIn &cp) |
Definition at line 52 of file gic_v3_redistributor.hh.
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Enumerator | |
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GICR_CTLR | |
GICR_IIDR | |
GICR_TYPER | |
GICR_WAKER | |
GICR_PIDR0 | |
GICR_PIDR1 | |
GICR_PIDR2 | |
GICR_PIDR3 | |
GICR_PIDR4 | |
GICR_PIDR5 | |
GICR_PIDR6 | |
GICR_PIDR7 |
Definition at line 75 of file gic_v3_redistributor.hh.
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Enumerator | |
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GICR_IGROUPR0 | |
GICR_ISENABLER0 | |
GICR_ICENABLER0 | |
GICR_ISPENDR0 | |
GICR_ICPENDR0 | |
GICR_ISACTIVER0 | |
GICR_ICACTIVER0 | |
GICR_ICFGR0 | |
GICR_ICFGR1 | |
GICR_IGRPMODR0 | |
GICR_NSACR |
Definition at line 107 of file gic_v3_redistributor.hh.
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Enumerator | |
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GICR_SETLPIR | |
GICR_CLRLPIR | |
GICR_PROPBASER | |
GICR_PENDBASER | |
GICR_INVLPIR | |
GICR_INVALLR | |
GICR_SYNCR |
Definition at line 136 of file gic_v3_redistributor.hh.
Gicv3Redistributor::Gicv3Redistributor | ( | Gicv3 * | gic, |
uint32_t | cpu_id | ||
) |
Definition at line 53 of file gic_v3_redistributor.cc.
void Gicv3Redistributor::activateIRQ | ( | uint32_t | int_id | ) |
Definition at line 995 of file gic_v3_redistributor.cc.
References irqActive, irqPending, and treatAsEdgeTriggered().
Referenced by Gicv3CPUInterface::readMiscReg().
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bool Gicv3Redistributor::canBeSelectedFor1toNInterrupt | ( | Gicv3::GroupId | group | ) | const |
Definition at line 1027 of file gic_v3_redistributor.cc.
References distributor, DPG0, DPG1NS, DPG1S, Gicv3::G0S, Gicv3::G1NS, Gicv3::G1S, Gicv3Distributor::groupEnabled(), and peInLowPowerState.
Referenced by Gicv3Distributor::route().
void Gicv3Redistributor::clearPPInt | ( | uint32_t | int_id | ) |
Definition at line 724 of file gic_v3_redistributor.cc.
References irqPending, isLevelSensitive(), Gicv3::PPI_MAX, and Gicv3::SGI_MAX.
void Gicv3Redistributor::deactivateIRQ | ( | uint32_t | int_id | ) |
Definition at line 1004 of file gic_v3_redistributor.cc.
References irqActive.
Referenced by Gicv3CPUInterface::deactivateIRQ().
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uint32_t Gicv3Redistributor::getAffinity | ( | ) | const |
Definition at line 1010 of file gic_v3_redistributor.cc.
References cpuId, ArmISA::getMPIDR(), BaseGic::getSystem(), gic, and System::threads.
Referenced by Gicv3CPUInterface::generateSGI(), and read().
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Definition at line 202 of file gic_v3_redistributor.hh.
References cpuInterface.
Referenced by Gicv3Distributor::route().
Gicv3::GroupId Gicv3Redistributor::getIntGroup | ( | int | int_id | ) | const |
Definition at line 969 of file gic_v3_redistributor.cc.
References distributor, Gicv3Distributor::DS, Gicv3::G0S, Gicv3::G1NS, Gicv3::G1S, irqGroup, irqGrpmod, Gicv3::PPI_MAX, and Gicv3::SGI_MAX.
Referenced by read(), sendSGI(), Gicv3CPUInterface::setMiscReg(), update(), Gicv3CPUInterface::virtualDeactivateIRQ(), and write().
void Gicv3Redistributor::init | ( | ) |
Definition at line 81 of file gic_v3_redistributor.cc.
References cpuId, cpuInterface, distributor, Gicv3::getCPUInterface(), Gicv3::getDistributor(), BaseGic::getSystem(), gic, memProxy, and System::physProxy.
Gicv3::IntStatus Gicv3Redistributor::intStatus | ( | uint32_t | int_id | ) | const |
Definition at line 773 of file gic_v3_redistributor.cc.
References Gicv3::INT_ACTIVE, Gicv3::INT_ACTIVE_PENDING, Gicv3::INT_INACTIVE, Gicv3::INT_PENDING, irqActive, irqPending, Gicv3::PPI_MAX, and Gicv3::SGI_MAX.
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Definition at line 227 of file gic_v3_redistributor.hh.
References Gicv3::INT_LEVEL_SENSITIVE, and irqConfig.
Referenced by clearPPInt(), and treatAsEdgeTriggered().
bool Gicv3Redistributor::isPendingLPI | ( | uint32_t | intid | ) |
Definition at line 907 of file gic_v3_redistributor.cc.
References readEntryLPI().
Referenced by ItsCommand::movi().
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Definition at line 208 of file gic_v3_redistributor.hh.
References cpuId.
Referenced by Gicv3::read(), and Gicv3::write().
uint64_t Gicv3Redistributor::read | ( | Addr | addr, |
size_t | size, | ||
bool | is_secure_access | ||
) |
Definition at line 90 of file gic_v3_redistributor.cc.
References addr, AddrRange::contains(), cpuId, distributor, DPG0, DPG1NS, DPG1S, Gicv3Distributor::DS, EnableLPIs, Gicv3::G1NS, getAffinity(), getIntGroup(), BaseGic::getSystem(), gic, GICR_CTLR, GICR_CTLR_DPG0, GICR_CTLR_DPG1NS, GICR_CTLR_DPG1S, GICR_ICACTIVER0, GICR_ICENABLER0, GICR_ICFGR0, GICR_ICFGR1, GICR_ICPENDR0, GICR_IGROUPR0, GICR_IGRPMODR0, GICR_IIDR, GICR_IPRIORITYR, GICR_ISACTIVER0, GICR_ISENABLER0, GICR_ISPENDR0, GICR_NSACR, GICR_PENDBASER, GICR_PIDR0, GICR_PIDR1, GICR_PIDR2, GICR_PIDR3, GICR_PIDR4, GICR_PIDR5, GICR_PIDR6, GICR_PIDR7, GICR_PROPBASER, GICR_SYNCR, GICR_TYPER, GICR_WAKER, GICR_WAKER_ChildrenAsleep, GICR_WAKER_ProcessorSleep, ArmISA::i, Gicv3::INT_EDGE_TRIGGERED, irqActive, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPriority, lpiConfigurationTablePtr, lpiIDBits, lpiPendingTablePtr, panic, peInLowPowerState, Gicv3::SGI_MAX, System::Threads::size(), AddrRange::start(), and System::threads.
Referenced by Gicv3::read().
uint8_t Gicv3Redistributor::readEntryLPI | ( | uint32_t | intid | ) |
Definition at line 884 of file gic_v3_redistributor.cc.
References lpiPendingTablePtr, memProxy, and PortProxy::readBlob().
Referenced by isPendingLPI(), and setClrLPI().
void Gicv3Redistributor::sendPPInt | ( | uint32_t | int_id | ) |
Definition at line 712 of file gic_v3_redistributor.cc.
References DPRINTF, irqPending, irqPendingIspendr, Gicv3::PPI_MAX, Gicv3::SGI_MAX, and updateDistributor().
void Gicv3Redistributor::sendSGI | ( | uint32_t | int_id, |
Gicv3::GroupId | group, | ||
bool | ns | ||
) |
Definition at line 735 of file gic_v3_redistributor.cc.
References distributor, DPRINTF, Gicv3Distributor::DS, Gicv3::G0S, Gicv3::G1NS, Gicv3::G1S, getIntGroup(), irqNsacr, irqPending, irqPendingIspendr, ArmISA::ns, Gicv3::SGI_MAX, and updateDistributor().
Referenced by Gicv3CPUInterface::generateSGI().
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Serialize an object.
Output an object's state into the current checkpoint section.
cp | Checkpoint state |
Implements Serializable.
Definition at line 1053 of file gic_v3_redistributor.cc.
References DPG0, DPG1NS, DPG1S, EnableLPIs, irqActive, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPendingIspendr, irqPriority, lpiConfigurationTablePtr, lpiIDBits, lpiPendingTablePtr, peInLowPowerState, SERIALIZE_CONTAINER, and SERIALIZE_SCALAR.
void Gicv3Redistributor::setClrLPI | ( | uint64_t | data, |
bool | set | ||
) |
Definition at line 919 of file gic_v3_redistributor.cc.
References cpuInterface, data, EnableLPIs, lpiIDBits, readEntryLPI(), Gicv3CPUInterface::resetHppi(), updateDistributor(), and writeEntryLPI().
Referenced by ItsCommand::clear(), ItsCommand::discard(), ItsCommand::doInt(), ItsTranslation::main(), ItsCommand::movi(), and write().
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This helper is used to check if an interrupt should be treated as edge triggered in the following scenarios:
a) While activating the interrupt b) While clearing an interrupt via ICPENDR
In fact, in these two situations, a level sensitive interrupt which had been made pending via a write to ISPENDR, will be treated as it if was edge triggered.
Definition at line 243 of file gic_v3_redistributor.hh.
References irqPendingIspendr, and isLevelSensitive().
Referenced by activateIRQ(), and write().
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Unserialize an object.
Read an object's state from the current checkpoint section.
cp | Checkpoint state |
Implements Serializable.
Definition at line 1075 of file gic_v3_redistributor.cc.
References DPG0, DPG1NS, DPG1S, EnableLPIs, irqActive, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPendingIspendr, irqPriority, lpiConfigurationTablePtr, lpiIDBits, lpiPendingTablePtr, peInLowPowerState, UNSERIALIZE_CONTAINER, and UNSERIALIZE_SCALAR.
void Gicv3Redistributor::update | ( | ) |
Definition at line 801 of file gic_v3_redistributor.cc.
References Gicv3CPUInterface::assertWakeRequest(), Gicv3CPUInterface::clearPendingInterrupts(), cpuInterface, distributor, EnableLPIs, Gicv3::G1NS, getIntGroup(), Gicv3CPUInterface::hppi_t::group, Gicv3Distributor::groupEnabled(), Gicv3CPUInterface::havePendingInterrupts(), Gicv3CPUInterface::hppi, Gicv3CPUInterface::hppi_t::intid, irqActive, irqEnabled, irqPending, irqPriority, lpiConfigurationTablePtr, lpiIDBits, lpiPendingTablePtr, memProxy, peInLowPowerState, Gicv3::PPI_MAX, Gicv3CPUInterface::hppi_t::prio, PortProxy::readBlob(), Gicv3::SGI_MAX, SMALLEST_LPI_ID, and Gicv3CPUInterface::update().
Referenced by Gicv3Distributor::update().
void Gicv3Redistributor::updateDistributor | ( | ) |
Definition at line 791 of file gic_v3_redistributor.cc.
References distributor, and Gicv3Distributor::update().
Referenced by Gicv3Its::moveAllPendingState(), sendPPInt(), sendSGI(), setClrLPI(), and write().
void Gicv3Redistributor::write | ( | Addr | addr, |
uint64_t | data, | ||
size_t | size, | ||
bool | is_secure_access | ||
) |
Definition at line 385 of file gic_v3_redistributor.cc.
References addr, bits(), AddrRange::contains(), cpuInterface, data, Gicv3CPUInterface::deassertWakeRequest(), Trace::disable(), distributor, DPG0, DPG1NS, DPG1S, DPRINTF, Gicv3Distributor::DS, enable, EnableLPIs, Gicv3::G1NS, getIntGroup(), GICR_CLRLPIR, GICR_CTLR, GICR_CTLR_DPG0, GICR_CTLR_DPG1NS, GICR_CTLR_DPG1S, GICR_ICACTIVER0, GICR_ICENABLER0, GICR_ICFGR0, GICR_ICFGR1, GICR_ICPENDR0, GICR_IGROUPR0, GICR_IGRPMODR0, GICR_INVALLR, GICR_INVLPIR, GICR_IPRIORITYR, GICR_ISACTIVER0, GICR_ISENABLER0, GICR_ISPENDR0, GICR_NSACR, GICR_PENDBASER, GICR_PROPBASER, GICR_SETLPIR, GICR_WAKER, GICR_WAKER_ProcessorSleep, ArmISA::i, Gicv3::INT_EDGE_TRIGGERED, Gicv3::INT_LEVEL_SENSITIVE, irqActive, irqConfig, irqEnabled, irqGroup, irqGrpmod, irqNsacr, irqPending, irqPendingIspendr, irqPriority, lpiConfigurationTablePtr, lpiIDBits, lpiPendingTablePtr, panic, peInLowPowerState, setClrLPI(), Gicv3::SGI_MAX, AddrRange::start(), treatAsEdgeTriggered(), and updateDistributor().
Referenced by Gicv3::write().
void Gicv3Redistributor::writeEntryLPI | ( | uint32_t | intid, |
uint8_t | lpi_entry | ||
) |
Definition at line 897 of file gic_v3_redistributor.cc.
References lpiPendingTablePtr, memProxy, and PortProxy::writeBlob().
Referenced by setClrLPI().
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Definition at line 56 of file gic_v3_redistributor.hh.
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Definition at line 57 of file gic_v3_redistributor.hh.
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Definition at line 58 of file gic_v3_redistributor.hh.
const uint32_t Gicv3Redistributor::addrRangeSize |
Definition at line 192 of file gic_v3_redistributor.hh.
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Definition at line 65 of file gic_v3_redistributor.hh.
Referenced by getAffinity(), init(), processorNumber(), and read().
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Definition at line 64 of file gic_v3_redistributor.hh.
Referenced by getCPUInterface(), init(), setClrLPI(), update(), and write().
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Definition at line 63 of file gic_v3_redistributor.hh.
Referenced by canBeSelectedFor1toNInterrupt(), getIntGroup(), init(), read(), sendSGI(), update(), updateDistributor(), and write().
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Definition at line 165 of file gic_v3_redistributor.hh.
Referenced by canBeSelectedFor1toNInterrupt(), read(), serialize(), unserialize(), and write().
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Definition at line 164 of file gic_v3_redistributor.hh.
Referenced by canBeSelectedFor1toNInterrupt(), read(), serialize(), unserialize(), and write().
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Definition at line 163 of file gic_v3_redistributor.hh.
Referenced by canBeSelectedFor1toNInterrupt(), read(), serialize(), unserialize(), and write().
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Definition at line 175 of file gic_v3_redistributor.hh.
Referenced by write().
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Definition at line 166 of file gic_v3_redistributor.hh.
Referenced by read(), serialize(), setClrLPI(), unserialize(), update(), and write().
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Definition at line 62 of file gic_v3_redistributor.hh.
Referenced by getAffinity(), init(), and read().
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Definition at line 179 of file gic_v3_redistributor.hh.
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Definition at line 180 of file gic_v3_redistributor.hh.
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Definition at line 181 of file gic_v3_redistributor.hh.
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Definition at line 133 of file gic_v3_redistributor.hh.
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Definition at line 103 of file gic_v3_redistributor.hh.
Referenced by read().
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Definition at line 102 of file gic_v3_redistributor.hh.
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Definition at line 157 of file gic_v3_redistributor.hh.
Referenced by activateIRQ(), deactivateIRQ(), intStatus(), read(), serialize(), unserialize(), update(), and write().
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Definition at line 159 of file gic_v3_redistributor.hh.
Referenced by isLevelSensitive(), read(), serialize(), unserialize(), and write().
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Definition at line 154 of file gic_v3_redistributor.hh.
Referenced by read(), serialize(), unserialize(), update(), and write().
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Definition at line 153 of file gic_v3_redistributor.hh.
Referenced by getIntGroup(), read(), serialize(), unserialize(), and write().
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Definition at line 160 of file gic_v3_redistributor.hh.
Referenced by getIntGroup(), read(), serialize(), unserialize(), and write().
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Definition at line 161 of file gic_v3_redistributor.hh.
Referenced by read(), sendSGI(), serialize(), unserialize(), and write().
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Definition at line 155 of file gic_v3_redistributor.hh.
Referenced by activateIRQ(), clearPPInt(), intStatus(), read(), sendPPInt(), sendSGI(), serialize(), Gicv3CPUInterface::setThreadContext(), unserialize(), update(), Gicv3CPUInterface::virtualUpdate(), and write().
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Definition at line 156 of file gic_v3_redistributor.hh.
Referenced by sendPPInt(), sendSGI(), serialize(), treatAsEdgeTriggered(), unserialize(), and write().
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Definition at line 158 of file gic_v3_redistributor.hh.
Referenced by read(), serialize(), unserialize(), update(), and write().
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Definition at line 168 of file gic_v3_redistributor.hh.
Referenced by read(), serialize(), unserialize(), update(), and write().
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Definition at line 169 of file gic_v3_redistributor.hh.
Referenced by Gicv3Its::moveAllPendingState(), read(), serialize(), setClrLPI(), unserialize(), update(), and write().
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Definition at line 170 of file gic_v3_redistributor.hh.
Referenced by Gicv3Its::moveAllPendingState(), read(), readEntryLPI(), serialize(), unserialize(), update(), write(), and writeEntryLPI().
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Definition at line 66 of file gic_v3_redistributor.hh.
Referenced by init(), Gicv3Its::moveAllPendingState(), readEntryLPI(), update(), and writeEntryLPI().
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Definition at line 105 of file gic_v3_redistributor.hh.
Referenced by canBeSelectedFor1toNInterrupt(), read(), serialize(), unserialize(), update(), and write().
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Definition at line 173 of file gic_v3_redistributor.hh.
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Definition at line 72 of file gic_v3_redistributor.hh.
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Definition at line 174 of file gic_v3_redistributor.hh.
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Definition at line 73 of file gic_v3_redistributor.hh.
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Definition at line 194 of file gic_v3_redistributor.hh.
Referenced by Gicv3Its::lpiOutOfRange(), Gicv3CPUInterface::readMiscReg(), and update().