#include <isa.hh>

Inheritance diagram for MipsISA::ISA:

Public Types
enum	CP0EventType { UpdateCP0 }

typedef ISA	CP0

typedef MipsISAParams	Params

Public Types inherited from SimObject
typedef SimObjectParams	Params

Public Member Functions
void	clear ()

void	configCP ()

unsigned	getVPENum (ThreadID tid) const

void	updateCP0ReadView (int misc_reg, ThreadID tid)

RegVal	readMiscRegNoEffect (int misc_reg, ThreadID tid=0) const

RegVal	readMiscReg (int misc_reg, ThreadID tid=0)

RegVal	filterCP0Write (int misc_reg, int reg_sel, RegVal val)
	This method doesn't need to adjust the Control Register Offset since it has already been done in the calling method (setRegWithEffect) More...

void	setRegMask (int misc_reg, RegVal val, ThreadID tid=0)

void	setMiscRegNoEffect (int misc_reg, RegVal val, ThreadID tid=0)

void	setMiscReg (int misc_reg, RegVal val, ThreadID tid=0)

void	processCP0Event (BaseCPU *cpu, CP0EventType)
	Process a CP0 event. More...

void	scheduleCP0Update (BaseCPU *cpu, Cycles delay=Cycles(0))

void	updateCPU (BaseCPU *cpu)

const Params *	params () const

	ISA (Params *p)

RegId	flattenRegId (const RegId &regId) const

int	flattenIntIndex (int reg) const

int	flattenFloatIndex (int reg) const

int	flattenVecIndex (int reg) const

int	flattenVecElemIndex (int reg) const

int	flattenVecPredIndex (int reg) const

int	flattenCCIndex (int reg) const

int	flattenMiscIndex (int reg) const

Public Member Functions inherited from BaseISA
virtual void	takeOverFrom (ThreadContext new_tc, ThreadContext old_tc)

virtual void	setThreadContext (ThreadContext *_tc)

Public Member Functions inherited from SimObject
const Params *	params () const

	SimObject (const Params *_params)

virtual	~SimObject ()

virtual const std::string	name () const

virtual void	init ()
	init() is called after all C++ SimObjects have been created and all ports are connected. More...

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint. More...

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint. More...

virtual void	regProbePoints ()
	Register probe points for this object. More...

virtual void	regProbeListeners ()
	Register probe listeners for this object. More...

ProbeManager *	getProbeManager ()
	Get the probe manager for this object. More...

virtual Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID)
	Get a port with a given name and index. More...

virtual void	startup ()
	startup() is the final initialization call before simulation. More...

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining. More...

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes. More...

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers. More...

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

Public Member Functions inherited from EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue. More...

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section. More...

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object. More...

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from Drainable
DrainState	drainState () const
	Return the current drain state of an object. More...

virtual void	notifyFork ()
	Notify a child process of a fork. More...

Public Member Functions inherited from Stats::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group. More...

virtual	~Group ()

virtual void	regStats ()
	Callback to set stat parameters. More...

virtual void	resetStats ()
	Callback to reset stats. More...

virtual void	preDumpStats ()
	Callback before stats are dumped. More...

void	addStat (Stats::Info *info)
	Register a stat with this group. More...

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object. More...

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object. More...

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block. More...

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group. More...

	Group ()=delete

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Public Attributes
bool	cp0Updated

Static Public Attributes
static std::string	miscRegNames [NumMiscRegs]

Protected Types
enum	BankType { perProcessor, perThreadContext, perVirtProcessor }

Protected Attributes
uint8_t	numThreads

uint8_t	numVpes

std::vector< std::vector< RegVal > >	miscRegFile

std::vector< std::vector< RegVal > >	miscRegFile_WriteMask

std::vector< BankType >	bankType

Protected Attributes inherited from BaseISA
ThreadContext *	tc = nullptr

Protected Attributes inherited from SimObject
const SimObjectParams *	_params
	Cached copy of the object parameters. More...

Protected Attributes inherited from EventManager
EventQueue *	eventq
	A pointer to this object's event queue. More...

Additional Inherited Members
Static Public Member Functions inherited from SimObject
static void	serializeAll (CheckpointOut &cp)
	Serialize all SimObjects in the system. More...

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it. More...

Static Public Member Functions inherited from Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section. More...

static void	serializeAll (const std::string &cpt_dir)
	Serializes all the SimObjects. More...

static void	unserializeGlobals (CheckpointIn &cp)

Protected Member Functions inherited from BaseISA
	SimObject (const Params *_params)

Protected Member Functions inherited from Drainable
	Drainable ()

virtual	~Drainable ()

virtual void	drainResume ()
	Resume execution after a successful drain. More...

void	signalDrainDone () const
	Signal that an object is drained. More...

Detailed Description

Definition at line 51 of file isa.hh.

Member Typedef Documentation

◆ CP0

typedef ISA MipsISA::ISA::CP0

Definition at line 55 of file isa.hh.

◆ Params

typedef MipsISAParams MipsISA::ISA::Params

Definition at line 57 of file isa.hh.

Member Enumeration Documentation

◆ BankType

enum MipsISA::ISA::BankType

protected

Enumerator
perProcessor
perThreadContext
perVirtProcessor

Definition at line 64 of file isa.hh.

◆ CP0EventType

enum MipsISA::ISA::CP0EventType

Enumerator
UpdateCP0

Definition at line 114 of file isa.hh.

Constructor & Destructor Documentation

◆ ISA()

MipsISA::ISA::ISA ( Params * p )

Definition at line 90 of file isa.cc.

References bankType, clear(), MipsISA::i, MipsISA::MISCREG_DEBUG, MipsISA::MISCREG_EBASE, MipsISA::MISCREG_LLADDR, MipsISA::MISCREG_SRS_CONF0, MipsISA::MISCREG_SRS_CONF1, MipsISA::MISCREG_SRS_CONF2, MipsISA::MISCREG_SRS_CONF3, MipsISA::MISCREG_SRS_CONF4, MipsISA::MISCREG_STATUS, MipsISA::MISCREG_TC_BIND, MipsISA::MISCREG_TC_CONTEXT, MipsISA::MISCREG_TC_HALT, MipsISA::MISCREG_TC_RESTART, MipsISA::MISCREG_TC_SCHEDULE, MipsISA::MISCREG_TC_SCHEFBACK, MipsISA::MISCREG_TC_STATUS, MipsISA::MISCREG_VPE_CONF0, MipsISA::MISCREG_VPE_CONF1, MipsISA::MISCREG_VPE_CONTROL, MipsISA::MISCREG_VPE_OPT, MipsISA::MISCREG_VPE_SCHEDULE, MipsISA::MISCREG_VPE_SCHEFBACK, MipsISA::MISCREG_YQMASK, miscRegFile, miscRegFile_WriteMask, MipsISA::NumMiscRegs, numThreads, numVpes, perProcessor, perThreadContext, and perVirtProcessor.

Member Function Documentation

◆ clear()

void MipsISA::ISA::clear ( )

Definition at line 150 of file isa.cc.

References MipsISA::i, ArmISA::j, MipsISA::k, miscRegFile, miscRegFile_WriteMask, and MipsISA::NumMiscRegs.

Referenced by ISA().

◆ configCP()

void MipsISA::ISA::configCP ( )

Definition at line 163 of file isa.cc.

References DPRINTF, MipsISA::mask, MipsISA::MISCREG_BADVADDR, MipsISA::MISCREG_CAUSE, MipsISA::MISCREG_CONFIG, MipsISA::MISCREG_CONFIG1, MipsISA::MISCREG_CONFIG2, MipsISA::MISCREG_CONFIG3, MipsISA::MISCREG_CONTEXT, MipsISA::MISCREG_CP0_RANDOM, MipsISA::MISCREG_EBASE, MipsISA::MISCREG_ENTRYLO0, MipsISA::MISCREG_ENTRYLO1, MipsISA::MISCREG_INDEX, MipsISA::MISCREG_INTCTL, MipsISA::MISCREG_LLADDR, MipsISA::MISCREG_MVP_CONF0, MipsISA::MISCREG_PAGEGRAIN, MipsISA::MISCREG_PAGEMASK, MipsISA::MISCREG_PERFCNT0, MipsISA::MISCREG_PRID, MipsISA::MISCREG_SRSCTL, MipsISA::MISCREG_STATUS, MipsISA::MISCREG_TC_BIND, MipsISA::MISCREG_TC_HALT, MipsISA::MISCREG_TC_STATUS, MipsISA::MISCREG_VPE_CONF0, MipsISA::MISCREG_WATCHHI0, numThreads, numVpes, panic, MipsISA::procId, readMiscRegNoEffect(), replaceBits(), setMiscRegNoEffect(), setRegMask(), and ArmISA::status.

◆ filterCP0Write()

RegVal MipsISA::ISA::filterCP0Write	(	int	misc_reg,
		int	reg_sel,
		RegVal	val
	)

This method doesn't need to adjust the Control Register Offset since it has already been done in the calling method (setRegWithEffect)

Definition at line 497 of file isa.cc.

References DPRINTF, miscRegFile, miscRegFile_WriteMask, and X86ISA::val.

Referenced by setMiscReg().

◆ flattenCCIndex()

int MipsISA::ISA::flattenCCIndex ( int reg ) const

inline

Definition at line 143 of file isa.hh.

References X86ISA::reg.

◆ flattenFloatIndex()

int MipsISA::ISA::flattenFloatIndex ( int reg ) const

inline

Definition at line 138 of file isa.hh.

References X86ISA::reg.

◆ flattenIntIndex()

int MipsISA::ISA::flattenIntIndex ( int reg ) const

inline

Definition at line 137 of file isa.hh.

References X86ISA::reg.

◆ flattenMiscIndex()

int MipsISA::ISA::flattenMiscIndex ( int reg ) const

inline

Definition at line 144 of file isa.hh.

References X86ISA::reg.

◆ flattenRegId()

RegId MipsISA::ISA::flattenRegId ( const RegId & regId ) const

inline

Definition at line 135 of file isa.hh.

◆ flattenVecElemIndex()

int MipsISA::ISA::flattenVecElemIndex ( int reg ) const

inline

Definition at line 140 of file isa.hh.

References X86ISA::reg.

◆ flattenVecIndex()

int MipsISA::ISA::flattenVecIndex ( int reg ) const

inline

Definition at line 139 of file isa.hh.

References X86ISA::reg.

◆ flattenVecPredIndex()

int MipsISA::ISA::flattenVecPredIndex ( int reg ) const

inline

Definition at line 141 of file isa.hh.

References X86ISA::reg.

◆ getVPENum()

unsigned MipsISA::ISA::getVPENum ( ThreadID tid ) const

inline

Definition at line 412 of file isa.cc.

References MipsISA::MISCREG_TC_BIND, and miscRegFile.

Referenced by readMiscReg(), readMiscRegNoEffect(), setMiscReg(), setMiscRegNoEffect(), and setRegMask().

◆ params()

const MipsISAParams * MipsISA::ISA::params ( ) const

Definition at line 144 of file isa.cc.

References SimObject::_params.

◆ processCP0Event()

void MipsISA::ISA::processCP0Event	(	BaseCPU *	cpu,
		CP0EventType	cp0EventType
	)

Process a CP0 event.

Definition at line 560 of file isa.cc.

References UpdateCP0, and updateCPU().

Referenced by scheduleCP0Update().

◆ readMiscReg()

RegVal MipsISA::ISA::readMiscReg	(	int	misc_reg,
		ThreadID	tid = `0`
	)

Definition at line 433 of file isa.cc.

References bankType, DPRINTF, getVPENum(), miscRegFile, miscRegNames, and perThreadContext.

◆ readMiscRegNoEffect()

RegVal MipsISA::ISA::readMiscRegNoEffect	(	int	misc_reg,
		ThreadID	tid = `0`
	)		const

Definition at line 419 of file isa.cc.

References bankType, DPRINTF, getVPENum(), miscRegFile, miscRegNames, and perThreadContext.

Referenced by configCP(), and updateCPU().

◆ scheduleCP0Update()

void MipsISA::ISA::scheduleCP0Update	(	BaseCPU *	cpu,
		Cycles	delay = `Cycles(0)`
	)

Definition at line 517 of file isa.cc.

References cp0Updated, EventBase::CPU_Tick_Pri, processCP0Event(), and UpdateCP0.

Referenced by setMiscReg().

◆ setMiscReg()

void MipsISA::ISA::setMiscReg	(	int	misc_reg,
		RegVal	val,
		ThreadID	tid = `0`
	)

Definition at line 474 of file isa.cc.

References bankType, DPRINTF, filterCP0Write(), ThreadContext::getCpuPtr(), getVPENum(), miscRegFile, miscRegNames, perThreadContext, scheduleCP0Update(), BaseISA::tc, and X86ISA::val.

◆ setMiscRegNoEffect()

void MipsISA::ISA::setMiscRegNoEffect	(	int	misc_reg,
		RegVal	val,
		ThreadID	tid = `0`
	)

Definition at line 446 of file isa.cc.

References bankType, DPRINTF, getVPENum(), miscRegFile, miscRegNames, perThreadContext, and X86ISA::val.

Referenced by configCP().

◆ setRegMask()

void MipsISA::ISA::setRegMask	(	int	misc_reg,
		RegVal	val,
		ThreadID	tid = `0`
	)

Definition at line 459 of file isa.cc.

References bankType, DPRINTF, getVPENum(), miscRegFile_WriteMask, miscRegNames, perThreadContext, and X86ISA::val.

Referenced by configCP().

◆ updateCP0ReadView()

void MipsISA::ISA::updateCP0ReadView	(	int	misc_reg,
		ThreadID	tid
	)

inline

Definition at line 90 of file isa.hh.

◆ updateCPU()

void MipsISA::ISA::updateCPU ( BaseCPU * cpu )

Definition at line 531 of file isa.cc.

References cp0Updated, BaseCPU::getContext(), MipsISA::haltThread(), MipsISA::MISCREG_MVP_CONF0, MipsISA::MISCREG_TC_HALT, MipsISA::MISCREG_TC_STATUS, readMiscRegNoEffect(), and MipsISA::restoreThread().

Referenced by processCP0Event().

Member Data Documentation

◆ bankType

std::vector<BankType> MipsISA::ISA::bankType

protected

Definition at line 72 of file isa.hh.

Referenced by ISA(), readMiscReg(), readMiscRegNoEffect(), setMiscReg(), setMiscRegNoEffect(), and setRegMask().

◆ cp0Updated

bool MipsISA::ISA::cp0Updated

Definition at line 111 of file isa.hh.

Referenced by scheduleCP0Update(), and updateCPU().

◆ miscRegFile

std::vector<std::vector<RegVal> > MipsISA::ISA::miscRegFile

protected

Definition at line 70 of file isa.hh.

Referenced by clear(), filterCP0Write(), getVPENum(), ISA(), readMiscReg(), readMiscRegNoEffect(), setMiscReg(), and setMiscRegNoEffect().

◆ miscRegFile_WriteMask

std::vector<std::vector<RegVal> > MipsISA::ISA::miscRegFile_WriteMask

protected

Definition at line 71 of file isa.hh.

Referenced by clear(), filterCP0Write(), ISA(), and setRegMask().

◆ miscRegNames

std::string MipsISA::ISA::miscRegNames

static

Definition at line 128 of file isa.hh.

Referenced by readMiscReg(), readMiscRegNoEffect(), setMiscReg(), setMiscRegNoEffect(), and setRegMask().

◆ numThreads

uint8_t MipsISA::ISA::numThreads

protected

Definition at line 61 of file isa.hh.

Referenced by configCP(), and ISA().

◆ numVpes

uint8_t MipsISA::ISA::numVpes

protected

Definition at line 62 of file isa.hh.

Referenced by configCP(), and ISA().

The documentation for this class was generated from the following files:

arch/mips/isa.hh
arch/mips/isa.cc

Public Types

Public Member Functions

Public Attributes

Static Public Attributes

Protected Types

Protected Attributes

Additional Inherited Members

Detailed Description

Member Typedef Documentation

◆ CP0

◆ Params

Member Enumeration Documentation

◆ BankType

◆ CP0EventType

Constructor & Destructor Documentation

◆ ISA()

Member Function Documentation

◆ clear()

◆ configCP()

◆ filterCP0Write()

◆ flattenCCIndex()

◆ flattenFloatIndex()

◆ flattenIntIndex()

◆ flattenMiscIndex()

◆ flattenRegId()

◆ flattenVecElemIndex()

◆ flattenVecIndex()

◆ flattenVecPredIndex()

◆ getVPENum()

◆ params()

◆ processCP0Event()

◆ readMiscReg()

◆ readMiscRegNoEffect()

◆ scheduleCP0Update()

◆ setMiscReg()

◆ setMiscRegNoEffect()

◆ setRegMask()

◆ updateCP0ReadView()

◆ updateCPU()

Member Data Documentation

◆ bankType

◆ cp0Updated

◆ miscRegFile

◆ miscRegFile_WriteMask

◆ miscRegNames

◆ numThreads

◆ numVpes