gem5
v20.1.0.0
arch
power
insts
condition.cc
Go to the documentation of this file.
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/*
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* Copyright (c) 2009 The University of Edinburgh
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "
arch/power/insts/condition.hh
"
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using namespace
PowerISA
;
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std::string
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CondLogicOp::generateDisassembly
(
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Addr
pc
,
const
Loader::SymbolTable
*symtab)
const
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{
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std::stringstream
ss
;
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ccprintf
(
ss
,
"%-10s "
,
mnemonic
);
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// Format is <mnemonic> bt, ba, bb
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ss
<<
bt
<<
", "
<<
ba
<<
", "
<<
bb
;
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return
ss
.str();
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}
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std::string
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CondMoveOp::generateDisassembly
(
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Addr
pc
,
const
Loader::SymbolTable
*symtab)
const
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{
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std::stringstream
ss
;
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ccprintf
(
ss
,
"%-10s "
,
mnemonic
);
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// Format is <mnemonic> bf, bfa
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ss
<<
bf
<<
", "
<<
bfa
;
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return
ss
.str();
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}
PowerISA::CondLogicOp::bb
uint32_t bb
Definition:
condition.hh:46
PowerISA::CondMoveOp::bfa
uint32_t bfa
Definition:
condition.hh:70
Loader::SymbolTable
Definition:
symtab.hh:59
PowerISA::CondLogicOp::bt
uint32_t bt
Definition:
condition.hh:47
ArmISA::ss
Bitfield< 21 > ss
Definition:
miscregs_types.hh:56
PowerISA
Definition:
decoder.cc:31
MipsISA::pc
Bitfield< 4 > pc
Definition:
pra_constants.hh:240
StaticInst::mnemonic
const char * mnemonic
Base mnemonic (e.g., "add").
Definition:
static_inst.hh:258
condition.hh
PowerISA::CondMoveOp::bf
uint32_t bf
Definition:
condition.hh:69
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:142
ccprintf
void ccprintf(cp::Print &print)
Definition:
cprintf.hh:127
PowerISA::CondLogicOp::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition:
condition.cc:34
PowerISA::CondLogicOp::ba
uint32_t ba
Definition:
condition.hh:45
PowerISA::CondMoveOp::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition:
condition.cc:48
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