gem5  v20.1.0.0
condition.hh
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28 
29 #ifndef __ARCH_POWER_INSTS_CONDITION_HH__
30 #define __ARCH_POWER_INSTS_CONDITION_HH__
31 
33 #include "base/cprintf.hh"
34 
35 namespace PowerISA
36 {
37 
42 {
43  protected:
44 
45  uint32_t ba;
46  uint32_t bb;
47  uint32_t bt;
48 
50  CondLogicOp(const char *mnem, MachInst _machInst, OpClass __opClass)
51  : PowerStaticInst(mnem, _machInst, __opClass),
52  ba(machInst.ba),
53  bb(machInst.bb),
54  bt(machInst.bt)
55  {
56  }
57 
58  std::string generateDisassembly(
59  Addr pc, const Loader::SymbolTable *symtab) const override;
60 };
61 
66 {
67  protected:
68 
69  uint32_t bf;
70  uint32_t bfa;
71 
73  CondMoveOp(const char *mnem, MachInst _machInst, OpClass __opClass)
74  : PowerStaticInst(mnem, _machInst, __opClass),
75  bf(machInst.bf),
77  {
78  }
79 
80  std::string generateDisassembly(
81  Addr pc, const Loader::SymbolTable *symtab) const override;
82 };
83 
84 } // namespace PowerISA
85 
86 #endif //__ARCH_POWER_INSTS_CONDITION_HH__
PowerISA::CondLogicOp::bb
uint32_t bb
Definition: condition.hh:46
PowerISA::CondLogicOp::CondLogicOp
CondLogicOp(const char *mnem, MachInst _machInst, OpClass __opClass)
Constructor.
Definition: condition.hh:50
PowerISA::CondMoveOp::bfa
uint32_t bfa
Definition: condition.hh:70
Loader::SymbolTable
Definition: symtab.hh:59
PowerISA::CondMoveOp::CondMoveOp
CondMoveOp(const char *mnem, MachInst _machInst, OpClass __opClass)
Constructor.
Definition: condition.hh:73
PowerISA::CondLogicOp::bt
uint32_t bt
Definition: condition.hh:47
PowerISA::CondMoveOp
Class for condition register move operations.
Definition: condition.hh:65
PowerISA::MachInst
uint32_t MachInst
Definition: types.hh:39
PowerISA
Definition: decoder.cc:31
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
cprintf.hh
PowerISA::CondMoveOp::bf
uint32_t bf
Definition: condition.hh:69
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
PowerISA::CondLogicOp
Class for condition register logical operations.
Definition: condition.hh:41
StaticInst::machInst
const ExtMachInst machInst
The binary machine instruction.
Definition: static_inst.hh:243
PowerISA::PowerStaticInst
Definition: static_inst.hh:38
PowerISA::CondLogicOp::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: condition.cc:34
static_inst.hh
PowerISA::CondLogicOp::ba
uint32_t ba
Definition: condition.hh:45
PowerISA::CondMoveOp::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: condition.cc:48

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