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29 #ifndef __ARCH_POWER_INSTS_STATICINST_HH__
30 #define __ARCH_POWER_INSTS_STATICINST_HH__
52 uint32_t
bits = value << ((7 -
bf) * 4);
53 uint32_t
mask = ~(0xf << ((7 -
bf) * 4));
72 asBytes(
void *buf,
size_t max_size)
override
80 #endif //__ARCH_POWER_INSTS_STATICINST_HH__
uint32_t insertCRField(uint32_t cr, uint32_t bf, uint32_t value) const
Base, ISA-independent static instruction class.
Register ID: describe an architectural register with its class and index.
void printReg(std::ostream &os, RegId reg) const
Print a register name for disassembly given the unique dependence tag number (FP or int).
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
size_t simpleAsBytes(void *buf, size_t max_size, const T &t)
const ExtMachInst machInst
The binary machine instruction.
GenericISA::DelaySlotPCState< MachInst > PCState
PowerStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
size_t asBytes(void *buf, size_t max_size) override
Instruction classes can override this function to return a a representation of themselves as a blob o...
void advancePC(PowerISA::PCState &pcState) const override
T bits(T val, int first, int last)
Extract the bitfield from position 'first' to 'last' (inclusive) from 'val' and right justify it.
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