gem5  v20.1.0.0
dram_rot_gen.hh
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37 
44 #ifndef __CPU_TRAFFIC_GEN_DRAM_ROT_GEN_HH__
45 #define __CPU_TRAFFIC_GEN_DRAM_ROT_GEN_HH__
46 
47 #include "base/bitfield.hh"
48 #include "base/intmath.hh"
49 #include "dram_gen.hh"
50 #include "enums/AddrMap.hh"
51 #include "mem/packet.hh"
52 
53 class DramRotGen : public DramGen
54 {
55 
56  public:
57 
85  DramRotGen(SimObject &obj, RequestorID requestor_id, Tick _duration,
86  Addr start_addr, Addr end_addr,
87  Addr _blocksize, Addr cacheline_size,
88  Tick min_period, Tick max_period,
89  uint8_t read_percent, Addr data_limit,
90  unsigned int num_seq_pkts, unsigned int page_size,
91  unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util,
92  Enums::AddrMap addr_mapping,
93  unsigned int nbr_of_ranks,
94  unsigned int max_seq_count_per_rank)
95  : DramGen(obj, requestor_id, _duration, start_addr, end_addr,
96  _blocksize, cacheline_size, min_period, max_period,
97  read_percent, data_limit,
98  num_seq_pkts, page_size, nbr_of_banks_DRAM,
99  nbr_of_banks_util, addr_mapping,
100  nbr_of_ranks),
101  maxSeqCountPerRank(max_seq_count_per_rank),
102  nextSeqCount(0)
103  {
104  // Rotating traffic generation can only support a read
105  // percentage of 0, 50, or 100
106  if (readPercent != 50 && readPercent != 100 && readPercent != 0) {
107  fatal("%s: Unsupported read percentage for DramRotGen: %d",
108  _name, readPercent);
109  }
110  }
111 
113 
114  private:
118  const unsigned int maxSeqCountPerRank;
119 
123  unsigned int nextSeqCount;
124 };
125 
126 #endif
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:183
DramRotGen::getNextPacket
PacketPtr getNextPacket()
Get the next generated packet.
Definition: dram_rot_gen.cc:48
DramRotGen::nextSeqCount
unsigned int nextSeqCount
Next packet series count used to set rank and bank, and update isRead Incremented at the start of a n...
Definition: dram_rot_gen.hh:123
dram_gen.hh
Tick
uint64_t Tick
Tick count type.
Definition: types.hh:63
DramGen
DRAM specific generator is for issuing request with variable page hit length and bank utilization.
Definition: dram_gen.hh:58
packet.hh
StochasticGen::readPercent
const uint8_t readPercent
Percent of generated transactions that should be reads.
Definition: base_gen.hh:162
RequestorID
uint16_t RequestorID
Definition: request.hh:85
bitfield.hh
DramRotGen
Definition: dram_rot_gen.hh:53
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:257
DramRotGen::maxSeqCountPerRank
const unsigned int maxSeqCountPerRank
Number of command series issued before the rank is changed.
Definition: dram_rot_gen.hh:118
BaseGen::_name
const std::string _name
Name to use for status and debug printing.
Definition: base_gen.hh:63
intmath.hh
DramRotGen::DramRotGen
DramRotGen(SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts, unsigned int page_size, unsigned int nbr_of_banks_DRAM, unsigned int nbr_of_banks_util, Enums::AddrMap addr_mapping, unsigned int nbr_of_ranks, unsigned int max_seq_count_per_rank)
Create a DRAM address sequence generator.
Definition: dram_rot_gen.hh:85
SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:92

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