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45 #ifndef __CPU_MINOR_EXECUTE_HH__
46 #define __CPU_MINOR_EXECUTE_HH__
246 bool &failed_predicate,
Fault &fault);
294 bool &completed_mem_issue);
303 void commit(
ThreadID thread_id,
bool only_commit_microops,
bool discard,
315 Execute(
const std::string &name_,
317 MinorCPUParams ¶ms,
349 unsigned int drain();
Queue< QueuedInst, ReportTraitsAdaptor< QueuedInst > > * inFUMemInsts
Memory ref instructions still in the FUs.
std::vector< InputBuffer< ForwardInstData > > inputBuffer
bool isInterrupted(ThreadID thread_id) const
Has an interrupt been raised.
Latch< BranchData >::Input out
Input port carrying stream changes to Fetch1.
Forward flowing data between Fetch2,Decode,Execute carrying a packet of instructions of a width appro...
bool tryPCEvents(ThreadID thread_id)
Try to act on PC-related events.
ExecuteThreadInfo(const ExecuteThreadInfo &other)
bool lastCommitWasEndOfMacroop
The last commit was the end of a full instruction so an interrupt can safely happen.
bool processMoreThanOneInput
If true, more than one input line can be processed each cycle if there is room to execute more instru...
int16_t ThreadID
Thread index/ID type.
ThreadID checkInterrupts(BranchData &branch, bool &interrupted)
Check all threads for possible interrupts.
MinorFUPool & fuDescriptions
Descriptions of the functional units we want to generate.
LSQ lsq
Dcache port to pass on to the CPU.
bool hasInterrupt(ThreadID thread_id)
Checks if a specific thread has an interrupt.
bool instIsRightStream(MinorDynInstPtr inst)
Does the given instruction have the right stream sequence number to be committed?
bool isInbetweenInsts(ThreadID thread_id) const
Are we between instructions? Can we be interrupted?
ThreadID interruptPriority
InstSeqNum streamSeqNum
Source of sequence number for instuction streams.
std::vector< Scoreboard > scoreboard
Scoreboard of instruction dependencies.
bool executeMemRefInst(MinorDynInstPtr inst, BranchData &branch, bool &failed_predicate, Fault &fault)
Execute a memory reference instruction.
bool isDrained()
After thread suspension, has Execute been drained of in-flight instructions and memory accesses.
bool commitInst(MinorDynInstPtr inst, bool early_memory_issue, BranchData &branch, Fault &fault, bool &committed, bool &completed_mem_issue)
Commit a single instruction.
Latch< ForwardInstData >::Output inp
Input port carrying instructions from Decode.
unsigned int inputIndex
Index that we've completed upto in getInput data.
std::vector< ExecuteThreadInfo > executeInfo
InstSeqNum lastPredictionSeqNum
A prediction number for use where one isn't available from an instruction.
MinorCPU::MinorCPUPort & getDcachePort()
Returns the DcachePort owned by this Execute to pass upwards.
MinorCPU is an in-order CPU model with four fixed pipeline stages:
DrainState
Stage cycle-by-cycle state.
Wrapper for a queue type to act as a pipeline stage input queue.
void handleMemResponse(MinorDynInstPtr inst, LSQ::LSQRequestPtr response, BranchData &branch, Fault &fault)
Handle extracting mem ref responses from the memory queues and completing the associated instructions...
std::shared_ptr< FaultBase > Fault
void evaluate()
Pass on input/buffer data to the output if you can.
unsigned int drain()
Like the drain interface on SimObject.
friend std::ostream & operator<<(std::ostream &os, DrainState state)
bool setTraceTimeOnIssue
Modify instruction trace times on issue.
unsigned int issueLimit
Number of instructions that can be issued per cycle.
void updateBranchData(ThreadID tid, BranchData::Reason reason, MinorDynInstPtr inst, const TheISA::PCState &target, BranchData &branch)
Actually create a branch to communicate to Fetch1/Fetch2 and, if that is a stream-changing branch upd...
const ForwardInstData * getInput(ThreadID tid)
Get a piece of data to work on from the inputBuffer, or 0 if there is no data.
Provide a non-protected base class for Minor's Ports as derived classes are created by Fetch1 and Exe...
void popInput(ThreadID tid)
Pop an element off the input buffer, if there are any.
unsigned int memoryCommitLimit
Number of memory instructions that can be committed per cycle.
void commit(ThreadID thread_id, bool only_commit_microops, bool discard, BranchData &branch)
Try and commit instructions from the ends of the functional unit pipelines.
MinorCPU & cpu
Pointer back to the containing CPU.
Queue< QueuedInst, ReportTraitsAdaptor< QueuedInst > > * inFlightInsts
In-order instructions either in FUs or the LSQ.
void setDrainState(ThreadID thread_id, DrainState state)
Set the drain state (with useful debugging messages)
void tryToBranch(MinorDynInstPtr inst, Fault fault, BranchData &branch)
Generate Branch data based (into branch) on an observed (or not) change in PC while executing an inst...
bool allowEarlyMemIssue
Allow mem refs to leave their FUs before reaching the head of the in flight insts queue if their depe...
bool setTraceTimeOnCommit
Modify instruction trace times on commit.
LSQ & getLSQ()
To allow ExecContext to find the LSQ.
unsigned int issue(ThreadID thread_id)
Try and issue instructions from the inputBuffer.
Forward data betwen Execute and Fetch1 carrying change-of-address/stream information.
ExecuteThreadInfo(unsigned int insts_committed)
Constructor.
ForwardInstData instsBeingCommitted
Structure for reporting insts currently being processed/retired for MinorTrace.
void doInstCommitAccounting(MinorDynInstPtr inst)
Do the stats handling and instruction count and PC event events related to the new instruction/op cou...
bool instIsHeadInst(MinorDynInstPtr inst)
Returns true if the given instruction is at the head of the inFlightInsts instruction queue.
GenericISA::DelaySlotPCState< MachInst > PCState
unsigned int commitLimit
Number of instructions that can be committed per cycle.
ThreadID getCommittingThread()
Use the current threading policy to determine the next thread to decode from.
unsigned int memoryIssueLimit
Number of memory ops that can be issued per cycle.
Cycles is a wrapper class for representing cycle counts, i.e.
std::vector< FUPipeline * > funcUnits
The execution functional units.
unsigned int numFuncUnits
Number of functional units to produce.
A collection of MinorFUs.
bool takeInterrupt(ThreadID thread_id, BranchData &branch)
Act on an interrupt.
DrainState drainState
State progression for draining NotDraining -> ...
Execute(const std::string &name_, MinorCPU &cpu_, MinorCPUParams ¶ms, Latch< ForwardInstData >::Output inp_, Latch< BranchData >::Input out_)
Id for lines and instructions.
Derived SenderState to carry data access info.
ThreadID getIssuingThread()
unsigned int noCostFUIndex
The FU index of the non-existent costless FU for instructions which pass the MinorDynInst::isNoCostIn...
Cycles longestFuLatency
Longest latency of any FU, useful for setting up the activity recoder.
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