gem5
v20.1.0.0
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MinorCPU is an in-order CPU model with four fixed pipeline stages: More...
#include <cpu.hh>
Classes | |
class | MinorCPUPort |
Provide a non-protected base class for Minor's Ports as derived classes are created by Fetch1 and Execute. More... | |
Public Member Functions | |
MinorCPU (MinorCPUParams *params) | |
~MinorCPU () | |
void | init () override |
Starting, waking and initialisation. More... | |
void | startup () override |
void | wakeup (ThreadID tid) override |
void | regStats () override |
Stats interface from SimObject (by way of BaseCPU) More... | |
Counter | totalInsts () const override |
Simple inst count interface from BaseCPU. More... | |
Counter | totalOps () const override |
void | serializeThread (CheckpointOut &cp, ThreadID tid) const override |
Serialize a single thread. More... | |
void | unserializeThread (CheckpointIn &cp, ThreadID tid) override |
Unserialize one thread. More... | |
void | serialize (CheckpointOut &cp) const override |
Serialize pipeline data. More... | |
void | unserialize (CheckpointIn &cp) override |
DrainState | drain () override |
Drain interface. More... | |
void | drainResume () override |
void | signalDrainDone () |
Signal from Pipeline that MinorCPU should signal that a drain is complete and set its drainState. More... | |
void | memWriteback () override |
void | switchOut () override |
Switching interface from BaseCPU. More... | |
void | takeOverFrom (BaseCPU *old_cpu) override |
Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in. More... | |
void | activateContext (ThreadID thread_id) override |
Thread activation interface from BaseCPU. More... | |
void | suspendContext (ThreadID thread_id) override |
Notify the CPU that the indicated context is now suspended. More... | |
std::vector< ThreadID > | roundRobinPriority (ThreadID priority) |
Thread scheduling utility functions. More... | |
std::vector< ThreadID > | randomPriority () |
void | wakeupOnEvent (unsigned int stage_id) |
Interface for stages to signal that they have become active after a callback or eventq event where the pipeline itself may have already been idled. More... | |
Public Member Functions inherited from BaseCPU | |
virtual PortProxy::SendFunctionalFunc | getSendFunctional () |
Returns a sendFunctional delegate for use with port proxies. More... | |
int | cpuId () const |
Reads this CPU's ID. More... | |
uint32_t | socketId () const |
Reads this CPU's Socket ID. More... | |
RequestorID | dataRequestorId () const |
Reads this CPU's unique data requestor ID. More... | |
RequestorID | instRequestorId () const |
Reads this CPU's unique instruction requestor ID. More... | |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a port on this CPU. More... | |
uint32_t | taskId () const |
Get cpu task id. More... | |
void | taskId (uint32_t id) |
Set cpu task id. More... | |
uint32_t | getPid () const |
void | setPid (uint32_t pid) |
void | workItemBegin () |
void | workItemEnd () |
Tick | instCount () |
BaseInterrupts * | getInterruptController (ThreadID tid) |
void | postInterrupt (ThreadID tid, int int_num, int index) |
void | clearInterrupt (ThreadID tid, int int_num, int index) |
void | clearInterrupts (ThreadID tid) |
bool | checkInterrupts (ThreadID tid) const |
Trace::InstTracer * | getTracer () |
Provide access to the tracer pointer. More... | |
virtual void | haltContext (ThreadID thread_num) |
Notify the CPU that the indicated context is now halted. More... | |
int | findContext (ThreadContext *tc) |
Given a Thread Context pointer return the thread num. More... | |
virtual ThreadContext * | getContext (int tn) |
Given a thread num get tho thread context for it. More... | |
unsigned | numContexts () |
Get the number of thread contexts available. More... | |
ThreadID | contextToThread (ContextID cid) |
Convert ContextID to threadID. More... | |
const Params * | params () const |
BaseCPU (Params *params, bool is_checker=false) | |
virtual | ~BaseCPU () |
void | init () override |
void | startup () override |
void | regStats () override |
void | regProbePoints () override |
void | registerThreadContexts () |
void | deschedulePowerGatingEvent () |
void | schedulePowerGatingEvent () |
void | flushTLBs () |
Flush all TLBs in the CPU. More... | |
bool | switchedOut () const |
Determine if the CPU is switched out. More... | |
virtual void | verifyMemoryMode () const |
Verify that the system is in a memory mode supported by the CPU. More... | |
unsigned int | cacheLineSize () const |
Get the cache line size of the system. More... | |
void | serialize (CheckpointOut &cp) const override |
Serialize this object to the given output stream. More... | |
void | unserialize (CheckpointIn &cp) override |
Reconstruct the state of this object from a checkpoint. More... | |
void | scheduleInstStop (ThreadID tid, Counter insts, const char *cause) |
Schedule an event that exits the simulation loops after a predefined number of instructions. More... | |
uint64_t | getCurrentInstCount (ThreadID tid) |
Get the number of instructions executed by the specified thread on this CPU. More... | |
void | traceFunctions (Addr pc) |
void | armMonitor (ThreadID tid, Addr address) |
bool | mwait (ThreadID tid, PacketPtr pkt) |
void | mwaitAtomic (ThreadID tid, ThreadContext *tc, BaseTLB *dtb) |
AddressMonitor * | getCpuAddrMonitor (ThreadID tid) |
bool | waitForRemoteGDB () const |
virtual void | probeInstCommit (const StaticInstPtr &inst, Addr pc) |
Helper method to trigger PMU probes for a committed instruction. More... | |
Public Attributes | |
Minor::MinorActivityRecorder * | activityRecorder |
Activity recording for pipeline. More... | |
std::vector< Minor::MinorThread * > | threads |
These are thread state-representing objects for this CPU. More... | |
Enums::ThreadPolicy | threadPolicy |
Thread Scheduling Policy (RoundRobin, Random, etc) More... | |
Minor::MinorStats | stats |
Processor-specific statistics. More... | |
Public Attributes inherited from BaseCPU | |
ThreadID | numThreads |
Number of threads we're actually simulating (<= SMT_MAX_THREADS). More... | |
System * | system |
Stats::Scalar | numCycles |
Stats::Scalar | numWorkItemsStarted |
Stats::Scalar | numWorkItemsCompleted |
Cycles | syscallRetryLatency |
Protected Member Functions | |
Port & | getDataPort () override |
Return a reference to the data port. More... | |
Port & | getInstPort () override |
Return a reference to the instruction port. More... | |
Protected Member Functions inherited from BaseCPU | |
void | updateCycleCounters (CPUState state) |
base method keeping track of cycle progression More... | |
void | enterPwrGating () |
ProbePoints::PMUUPtr | pmuProbePoint (const char *name) |
Helper method to instantiate probe points belonging to this object. More... | |
Protected Attributes | |
Minor::Pipeline * | pipeline |
pipeline is a container for the clockable pipeline stage objects. More... | |
Protected Attributes inherited from BaseCPU | |
Tick | instCnt |
Instruction count used for SPARC misc register. More... | |
int | _cpuId |
const uint32_t | _socketId |
Each cpu will have a socket ID that corresponds to its physical location in the system. More... | |
RequestorID | _instRequestorId |
instruction side request id that must be placed in all requests More... | |
RequestorID | _dataRequestorId |
data side request id that must be placed in all requests More... | |
uint32_t | _taskId |
An intrenal representation of a task identifier within gem5. More... | |
uint32_t | _pid |
The current OS process ID that is executing on this processor. More... | |
bool | _switchedOut |
Is the CPU switched out or active? More... | |
const unsigned int | _cacheLineSize |
Cache the cache line size that we get from the system. More... | |
std::vector< BaseInterrupts * > | interrupts |
std::vector< ThreadContext * > | threadContexts |
Trace::InstTracer * | tracer |
Cycles | previousCycle |
CPUState | previousState |
const Cycles | pwrGatingLatency |
const bool | powerGatingOnIdle |
EventFunctionWrapper | enterPwrGatingEvent |
ProbePoints::PMUUPtr | ppRetiredInsts |
Instruction commit probe point. More... | |
ProbePoints::PMUUPtr | ppRetiredInstsPC |
ProbePoints::PMUUPtr | ppRetiredLoads |
Retired load instructions. More... | |
ProbePoints::PMUUPtr | ppRetiredStores |
Retired store instructions. More... | |
ProbePoints::PMUUPtr | ppRetiredBranches |
Retired branches (any type) More... | |
ProbePoints::PMUUPtr | ppAllCycles |
CPU cycle counter even if any thread Context is suspended. More... | |
ProbePoints::PMUUPtr | ppActiveCycles |
CPU cycle counter, only counts if any thread contexts is active. More... | |
ProbePointArg< bool > * | ppSleeping |
ProbePoint that signals transitions of threadContexts sets. More... | |
Additional Inherited Members | |
Public Types inherited from BaseCPU | |
typedef BaseCPUParams | Params |
Static Public Member Functions inherited from BaseCPU | |
static int | numSimulatedInsts () |
static int | numSimulatedOps () |
static void | wakeup (ThreadID tid) |
static int | numSimulatedCPUs () |
static Counter | numSimulatedInsts () |
static Counter | numSimulatedOps () |
Static Public Attributes inherited from BaseCPU | |
static const uint32_t | invldPid = std::numeric_limits<uint32_t>::max() |
Invalid or unknown Pid. More... | |
static const Addr | PCMask = ~((Addr)sizeof(TheISA::MachInst) - 1) |
Protected Types inherited from BaseCPU | |
enum | CPUState { CPU_STATE_ON, CPU_STATE_SLEEP, CPU_STATE_WAKEUP } |
MinorCPU is an in-order CPU model with four fixed pipeline stages:
Fetch1 - fetches lines from memory Fetch2 - decomposes lines into macro-op instructions Decode - decomposes macro-ops into micro-ops Execute - executes those micro-ops
This pipeline is carried in the MinorCPU::pipeline object. The exec_context interface is not carried by MinorCPU but by Minor::ExecContext objects created by Minor::Execute.
MinorCPU::MinorCPU | ( | MinorCPUParams * | params | ) |
Definition at line 48 of file cpu.cc.
References activityRecorder, fatal, FullSystem, SimpleThread::getTC(), ThreadContext::Halted, ArmISA::i, Minor::MinorDynInst::init(), BaseCPU::numThreads, BaseCPU::params(), SimpleThread::setStatus(), BaseCPU::threadContexts, and threads.
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overridevirtual |
Thread activation interface from BaseCPU.
Reimplemented from BaseCPU.
Definition at line 256 of file cpu.cc.
References BaseCPU::activateContext(), Minor::Pipeline::CPUStageId, DPRINTF, Minor::MinorStats::quiesceCycles, stats, threads, and wakeupOnEvent().
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override |
Drain interface.
Definition at line 169 of file cpu.cc.
References BaseCPU::deschedulePowerGatingEvent(), DPRINTF, Drained, Draining, and BaseCPU::switchedOut().
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override |
Definition at line 200 of file cpu.cc.
References DPRINTF, fatal, System::isTimingMode(), BaseCPU::numThreads, BaseCPU::schedulePowerGatingEvent(), BaseCPU::switchedOut(), BaseCPU::system, and wakeup().
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overrideprotectedvirtual |
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overrideprotectedvirtual |
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override |
Starting, waking and initialisation.
Definition at line 92 of file cpu.cc.
References fatal, BaseCPU::getContext(), System::getMemoryMode(), BaseCPU::init(), ThreadContext::initMemProxies(), BaseCPU::params(), BaseCPU::system, and threads.
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inline |
Definition at line 174 of file cpu.hh.
References ArmISA::i, and BaseCPU::numThreads.
Referenced by Minor::Execute::getCommittingThread(), Minor::Execute::getIssuingThread(), Minor::Decode::getScheduledThread(), Minor::Fetch2::getScheduledThread(), and Minor::Fetch1::getScheduledThread().
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override |
Stats interface from SimObject (by way of BaseCPU)
Definition at line 113 of file cpu.cc.
References name(), Minor::MinorStats::regStats(), BaseCPU::regStats(), and stats.
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inline |
Thread scheduling utility functions.
Definition at line 165 of file cpu.hh.
References ArmISA::i, and BaseCPU::numThreads.
Referenced by Minor::Execute::getCommittingThread(), Minor::Execute::getIssuingThread(), Minor::Decode::getScheduledThread(), Minor::Fetch2::getScheduledThread(), and Minor::Fetch1::getScheduledThread().
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override |
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overridevirtual |
void MinorCPU::signalDrainDone | ( | ) |
Signal from Pipeline that MinorCPU should signal that a drain is complete and set its drainState.
Definition at line 193 of file cpu.cc.
References DPRINTF, and Drainable::signalDrainDone().
Referenced by Minor::Pipeline::evaluate().
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override |
Definition at line 158 of file cpu.cc.
References DPRINTF, BaseCPU::numThreads, and BaseCPU::startup().
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overridevirtual |
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overridevirtual |
Switching interface from BaseCPU.
Reimplemented from BaseCPU.
Definition at line 236 of file cpu.cc.
References activityRecorder, DPRINTF, ActivityRecorder::reset(), BaseCPU::switchedOut(), and BaseCPU::switchOut().
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overridevirtual |
Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in.
A CPU model implementing this method is expected to initialize its state from the old CPU and connect its memory (unless they are already connected) to the memories connected to the old CPU.
cpu | CPU to initialize read state from. |
Reimplemented from BaseCPU.
Definition at line 248 of file cpu.cc.
References DPRINTF, and BaseCPU::takeOverFrom().
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overridevirtual |
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overridevirtual |
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override |
Definition at line 140 of file cpu.cc.
References BaseCPU::unserialize().
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overridevirtual |
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overridevirtual |
Implements BaseCPU.
Definition at line 147 of file cpu.cc.
References DPRINTF, BaseCPU::numThreads, ArmISA::status, ThreadContext::Suspended, and threads.
Referenced by drainResume(), Minor::LSQ::recvTimingSnoopReq(), and Minor::LSQ::threadSnoop().
void MinorCPU::wakeupOnEvent | ( | unsigned int | stage_id | ) |
Interface for stages to signal that they have become active after a callback or eventq event where the pipeline itself may have already been idled.
The stage argument should be from the enumeration Pipeline::StageId
Definition at line 285 of file cpu.cc.
References ActivityRecorder::activateStage(), activityRecorder, and DPRINTF.
Referenced by activateContext(), Minor::Execute::drain(), Minor::Execute::drainResume(), Minor::Execute::evaluate(), Minor::Fetch1::evaluate(), Minor::Fetch1::recvTimingResp(), Minor::LSQ::recvTimingResp(), Minor::Fetch1::tryToSendToTransfers(), and Minor::Fetch1::wakeupFetch().
Minor::MinorActivityRecorder* MinorCPU::activityRecorder |
Activity recording for pipeline.
This belongs to Pipeline but stages will access it through the CPU as the MinorCPU object actually mediates idling behaviour
Definition at line 88 of file cpu.hh.
Referenced by Minor::Decode::evaluate(), Minor::Fetch2::evaluate(), Minor::Execute::evaluate(), Minor::Fetch1::evaluate(), Minor::Execute::issue(), MinorCPU(), switchOut(), and wakeupOnEvent().
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protected |
pipeline is a container for the clockable pipeline stage objects.
Elements of pipeline call TheISA to implement the model.
Definition at line 82 of file cpu.hh.
Referenced by ~MinorCPU().
Minor::MinorStats MinorCPU::stats |
Processor-specific statistics.
Definition at line 132 of file cpu.hh.
Referenced by activateContext(), Minor::Execute::commit(), Minor::Execute::commitInst(), Minor::Execute::doInstCommitAccounting(), and regStats().
Enums::ThreadPolicy MinorCPU::threadPolicy |
Thread Scheduling Policy (RoundRobin, Random, etc)
Definition at line 112 of file cpu.hh.
Referenced by Minor::Execute::getCommittingThread(), Minor::Execute::getIssuingThread(), Minor::Decode::getScheduledThread(), Minor::Fetch2::getScheduledThread(), and Minor::Fetch1::getScheduledThread().
std::vector<Minor::MinorThread *> MinorCPU::threads |
These are thread state-representing objects for this CPU.
If you need a ThreadContext for any reason, use threads[threadId]->getTC()
Definition at line 93 of file cpu.hh.
Referenced by activateContext(), Minor::Execute::commitInst(), Minor::Execute::doInstCommitAccounting(), Minor::Execute::executeMemRefInst(), Minor::Fetch1::fetchLine(), Minor::Execute::handleMemResponse(), init(), MinorCPU(), Minor::LSQ::pushRequest(), serializeThread(), suspendContext(), totalInsts(), totalOps(), Minor::Execute::tryPCEvents(), Minor::LSQ::tryToSendToTransfers(), unserializeThread(), wakeup(), and ~MinorCPU().