gem5  v20.1.0.0
floating.cc
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28 
30 
31 using namespace PowerISA;
32 
33 std::string
35 {
36  std::stringstream ss;
37 
38  ccprintf(ss, "%-10s ", mnemonic);
39 
40  // Print the first destination only
41  if (_numDestRegs > 0) {
42  printReg(ss, _destRegIdx[0]);
43  }
44 
45  // Print the (possibly) two source registers
46  if (_numSrcRegs > 0) {
47  if (_numDestRegs > 0) {
48  ss << ", ";
49  }
50  printReg(ss, _srcRegIdx[0]);
51  if (_numSrcRegs > 1) {
52  ss << ", ";
53  printReg(ss, _srcRegIdx[1]);
54  }
55  }
56 
57  return ss.str();
58 }
Loader::SymbolTable
Definition: symtab.hh:59
ArmISA::ss
Bitfield< 21 > ss
Definition: miscregs_types.hh:56
PowerISA
Definition: decoder.cc:31
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
StaticInst::_srcRegIdx
RegId _srcRegIdx[MaxInstSrcRegs]
See srcRegIdx().
Definition: static_inst.hh:250
StaticInst::_destRegIdx
RegId _destRegIdx[MaxInstDestRegs]
See destRegIdx().
Definition: static_inst.hh:248
PowerISA::PowerStaticInst::printReg
void printReg(std::ostream &os, RegId reg) const
Print a register name for disassembly given the unique dependence tag number (FP or int).
Definition: static_inst.cc:37
StaticInst::mnemonic
const char * mnemonic
Base mnemonic (e.g., "add").
Definition: static_inst.hh:258
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
floating.hh
ccprintf
void ccprintf(cp::Print &print)
Definition: cprintf.hh:127
StaticInst::_numSrcRegs
int8_t _numSrcRegs
See numSrcRegs().
Definition: static_inst.hh:105
PowerISA::FloatOp::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: floating.cc:34
StaticInst::_numDestRegs
int8_t _numDestRegs
See numDestRegs().
Definition: static_inst.hh:108

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