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39 #ifndef __ARCH_X86_INSTS_MICROLDSTOP_HH__
40 #define __ARCH_X86_INSTS_MICROLDSTOP_HH__
68 const char * mnem,
const char * _instMnem,
72 uint8_t _dataSize, uint8_t _addressSize,
83 (
dataSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
85 (
addressSize == 1 && !_machInst.rex.present) ? 1 << 6 : 0;
99 const char * mnem,
const char * _instMnem,
104 uint8_t _dataSize, uint8_t _addressSize,
107 MemOp(_machInst, mnem, _instMnem, setFlags,
108 _scale, _index, _base, _disp, _segment,
109 _dataSize, _addressSize, _memFlags,
132 const char * mnem,
const char * _instMnem,
137 uint8_t _dataSize, uint8_t _addressSize,
140 MemOp(_machInst, mnem, _instMnem, setFlags,
141 _scale, _index, _base, _disp, _segment,
142 _dataSize, _addressSize, _memFlags,
154 #endif //__ARCH_X86_INSTS_MICROLDSTOP_HH__
LdStOp(ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, uint8_t _scale, InstRegIndex _index, InstRegIndex _base, uint64_t _disp, InstRegIndex _segment, InstRegIndex _data, uint8_t _dataSize, uint8_t _addressSize, Request::FlagsType _memFlags, OpClass __opClass)
Base class for load and store ops using one register.
MemOp(ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, uint8_t _scale, InstRegIndex _index, InstRegIndex _base, uint64_t _disp, InstRegIndex _segment, uint8_t _dataSize, uint8_t _addressSize, Request::FlagsType _memFlags, OpClass __opClass)
const uint8_t addressSize
Class for register indices passed to instruction constructors.
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
LdStSplitOp(ExtMachInst _machInst, const char *mnem, const char *_instMnem, uint64_t setFlags, uint8_t _scale, InstRegIndex _index, InstRegIndex _base, uint64_t _disp, InstRegIndex _segment, InstRegIndex _dataLow, InstRegIndex _dataHi, uint8_t _dataSize, uint8_t _addressSize, Request::FlagsType _memFlags, OpClass __opClass)
Base class for load and store ops using two registers, we will call them split ops for this reason.
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Base class for memory ops.
TheISA::ExtMachInst ExtMachInst
Binary extended machine instruction type.
This is exposed globally, independent of the ISA.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
const Request::FlagsType memFlags
const RegIndex & index() const
Index accessors.
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