gem5  v20.1.0.0
priv.cc
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29 
30 #include "arch/sparc/insts/priv.hh"
31 
32 namespace SparcISA
33 {
34 
35 std::string
37 {
38  std::stringstream response;
39 
40  printMnemonic(response, mnemonic);
41 
42  return response.str();
43 }
44 
45 std::string
47 {
48  std::stringstream response;
49 
50  printMnemonic(response, mnemonic);
51 
52  ccprintf(response, " %%%s, ", regName);
53  printDestReg(response, 0);
54 
55  return response.str();
56 }
57 
58 std::string
60 {
61  std::stringstream response;
62 
63  printMnemonic(response, mnemonic);
64 
65  ccprintf(response, " ");
66  // If the first reg is %g0, don't print it.
67  // This improves readability
68  if (_srcRegIdx[0].index() != 0) {
69  printSrcReg(response, 0);
70  ccprintf(response, ", ");
71  }
72  printSrcReg(response, 1);
73  ccprintf(response, ", %%%s", regName);
74 
75  return response.str();
76 }
77 
78 std::string
80  Addr pc, const Loader::SymbolTable *symtab) const
81 {
82  std::stringstream response;
83 
84  printMnemonic(response, mnemonic);
85 
86  ccprintf(response, " ");
87  // If the first reg is %g0, don't print it.
88  // This improves readability
89  if (_srcRegIdx[0].index() != 0) {
90  printSrcReg(response, 0);
91  ccprintf(response, ", ");
92  }
93  ccprintf(response, "%#x, %%%s", imm, regName);
94 
95  return response.str();
96 }
97 
98 }
SparcISA::PrivImm::imm
int32_t imm
Definition: priv.hh:91
MipsISA::index
Bitfield< 30, 0 > index
Definition: pra_constants.hh:44
SparcISA::Priv::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: priv.cc:36
SparcISA::WrPriv::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: priv.cc:59
SparcISA::SparcStaticInst::printDestReg
void printDestReg(std::ostream &os, int reg) const
Definition: static_inst.cc:88
Loader::SymbolTable
Definition: symtab.hh:59
priv.hh
SparcISA
Definition: asi.cc:31
SparcISA::SparcStaticInst::printSrcReg
void printSrcReg(std::ostream &os, int reg) const
Definition: static_inst.cc:81
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
StaticInst::_srcRegIdx
RegId _srcRegIdx[MaxInstSrcRegs]
See srcRegIdx().
Definition: static_inst.hh:250
StaticInst::mnemonic
const char * mnemonic
Base mnemonic (e.g., "add").
Definition: static_inst.hh:258
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
SparcISA::WrPrivImm::regName
const char * regName
Definition: priv.hh:108
SparcISA::SparcStaticInst::printMnemonic
static void printMnemonic(std::ostream &os, const char *mnemonic)
Definition: static_inst.cc:56
SparcISA::RdPriv::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: priv.cc:46
SparcISA::WrPrivImm::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: priv.cc:79
ccprintf
void ccprintf(cp::Print &print)
Definition: cprintf.hh:127
SparcISA::PrivReg::regName
const char * regName
Definition: priv.hh:57

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