gem5  v20.1.0.0
unknown.hh
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28 
29 #ifndef __ARCH_SPARC_INSTS_UNKNOWN_HH__
30 #define __ARCH_SPARC_INSTS_UNKNOWN_HH__
31 
33 
34 namespace SparcISA
35 {
36 
40 class Unknown : public SparcStaticInst
41 {
42  public:
43 
44  // Constructor
45  Unknown(ExtMachInst _machInst) :
46  SparcStaticInst("unknown", _machInst, No_OpClass)
47  {}
48 
49  Fault
50  execute(ExecContext *, Trace::InstRecord *) const override
51  {
52  return std::make_shared<IllegalInstruction>();
53  }
54 
55  std::string
57  Addr pc, const Loader::SymbolTable *symtab) const override
58  {
59  return "Unknown instruction";
60  }
61 
62 };
63 
64 }
65 
66 #endif // __ARCH_SPARC_INSTS_UNKNOWN_HH__
SparcISA::Unknown::generateDisassembly
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: unknown.hh:56
Loader::SymbolTable
Definition: symtab.hh:59
Trace::InstRecord
Definition: insttracer.hh:55
SparcISA::Unknown::execute
Fault execute(ExecContext *, Trace::InstRecord *) const override
Definition: unknown.hh:50
SparcISA::Unknown::Unknown
Unknown(ExtMachInst _machInst)
Definition: unknown.hh:45
SparcISA
Definition: asi.cc:31
Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:240
MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:240
ExecContext
The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate th...
Definition: exec_context.hh:70
SparcISA::Unknown
Class for Unknown/Illegal instructions.
Definition: unknown.hh:40
StaticInst::ExtMachInst
TheISA::ExtMachInst ExtMachInst
Binary extended machine instruction type.
Definition: static_inst.hh:89
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:142
SparcISA::SparcStaticInst
Base class for all SPARC static instructions.
Definition: static_inst.hh:87
static_inst.hh

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